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cf665a99f3
better handling of naming exceptions.
Dario Nieuwenhuis
2021-11-29 01:56:41 +01:00
620afab503
more complete rcc info: clock, and enable/reset registers
Dario Nieuwenhuis
2021-11-29 01:55:53 +01:00
f93860b894
Do not output kind
to the yamls.
Dario Nieuwenhuis
2021-11-28 23:47:45 +01:00
a83949d082
Only parse rcc from the registers, not the modes xml.
Dario Nieuwenhuis
2021-11-28 23:37:14 +01:00
2d6befa3a4
Unify handling of "ghost peripherals" missing from the XMLs.
Dario Nieuwenhuis
2021-11-28 23:36:36 +01:00
a447451969
Ban STM32GBK1CB.
Dario Nieuwenhuis
2021-11-28 23:34:12 +01:00
df6b1a13b0
rcc_f3: add lots of missing stuff.
Dario Nieuwenhuis
2021-11-28 23:25:16 +01:00
3780dbab57
rcc_l5: fix typo
Dario Nieuwenhuis
2021-11-28 22:45:06 +01:00
b4191f4d1c
clocks: accept regs like xxENR1 (previously it'd only accept xxENR)
Dario Nieuwenhuis
2021-11-28 22:26:22 +01:00
ac50274c95
Ensure consistent order for dmamuxes.
Dario Nieuwenhuis
2021-11-28 21:56:02 +01:00
2e8c0bc791
Fix stm32u5 accidentally removed fieldset/PRIVCFGR
Dario Nieuwenhuis
2021-11-27 02:32:51 +01:00
b643072930
Merge pull request #104 from embassy-rs/stm32g4
Dario Nieuwenhuis
2021-11-27 02:21:32 +01:00
353411841c
stm32g4 support.
Dario Nieuwenhuis
2021-11-27 02:20:17 +01:00
6af084d858
SYSCFG_H7: random typo fix
Dario Nieuwenhuis
2021-11-27 02:19:55 +01:00
b630a96365
PWR: arrayify PUCRx, PDCRx
Dario Nieuwenhuis
2021-11-27 02:19:38 +01:00
064d70c85c
Merge pull request #103 from embassy-rs/add-overrides
Ulf Lilleengen
2021-11-22 13:29:44 +01:00
6e3877238c
Add overrides for missing GPIO blocks for STM32L432
Ulf Lilleengen
2021-11-22 13:27:04 +01:00
0dcaaa07fe
cleanup spi v1/f1, add missing i2s stuff
Dario Nieuwenhuis
2021-11-17 21:30:52 +01:00
c6c5c099bb
fmt all register yamls
Dario Nieuwenhuis
2021-11-17 21:23:26 +01:00
e00ad29955
Merge pull request #102 from bobmcwhirter/u5_i2c
Dario Nieuwenhuis
2021-11-12 03:19:36 +01:00
2f142fadef
Adjust to apply I2C for U5.
Bob McWhirter
2021-11-11 15:52:31 -05:00
5ee8e96dd0
Merge pull request #101 from bobmcwhirter/u5_rcc_enum
Dario Nieuwenhuis
2021-11-11 20:59:45 +01:00
e501a9746f
Complete enum cleanup.
Bob McWhirter
2021-11-11 14:52:45 -05:00
91c77958bd
Remove some useless enums. Apply better variant names to some enums.
Bob McWhirter
2021-11-11 14:09:49 -05:00
117e3f3f4b
Clean up some enum variants, reduce some enums that duplicate.
Bob McWhirter
2021-11-11 10:25:04 -05:00
ca1fa7e249
Merge pull request #100 from matoushybl/fix/dcmi-rst
Dario Nieuwenhuis
2021-11-10 23:30:41 +01:00
bfc7856d75
Fix DCMI reset.
Matous Hybl
2021-11-10 17:31:06 +01:00
6229ccf12a
Merge pull request #99 from bobmcwhirter/u5supportmore
Dario Nieuwenhuis
2021-11-09 14:58:27 +01:00
e09a3aa06e
Update README for new python parser module.
Bob McWhirter
2021-11-08 14:05:49 -05:00
d2e9ef3622
U5 FLASH and RCC.
Bob McWhirter
2021-11-08 13:47:05 -05:00
46513a50f8
Further adjustment for U5.
Bob McWhirter
2021-11-08 11:40:16 -05:00
5984d8a712
Merge pull request #98 from embassy-rs/python-refactor
Dario Nieuwenhuis
2021-11-05 19:30:36 +01:00
c34409d6f8
Add analog pins for all analog peris, not just ADC
Dario Nieuwenhuis
2021-11-05 19:18:58 +01:00
8833e7a8df
Add stub stm32f1 gpio parsing
Dario Nieuwenhuis
2021-11-05 18:20:53 +01:00
8b5f735c6d
Remove duplicated gpio maps
Dario Nieuwenhuis
2021-11-05 17:38:02 +01:00
5cd5d2b110
Add back parsing for ADC pins.
Dario Nieuwenhuis
2021-11-05 17:18:36 +01:00
ffc40c718a
Unify all docs under the docs
key, sort them.
Dario Nieuwenhuis
2021-11-05 02:19:33 +01:00
ae9ff6f3a5
Simplify main parsing code, fix AF parsing missing stuff.
Dario Nieuwenhuis
2021-11-05 02:05:04 +01:00
5eb3c378ef
Sort pins to make diffing easier.
Dario Nieuwenhuis
2021-11-05 00:45:21 +01:00
cf494447ff
Ignore pins with broken names. Only Pxyy.
Dario Nieuwenhuis
2021-11-05 00:39:36 +01:00
ca3da1b2de
Split python code in a few modules
Dario Nieuwenhuis
2021-11-04 19:25:43 +01:00
b645ff267c
Merge pull request #97 from matoushybl/h7
Dario Nieuwenhuis
2021-11-04 15:59:10 +01:00
6ef7659b9d
Add support for H723 RCC differences.
Matous Hybl
2021-11-03 16:39:29 +01:00
dac1140b17
Fix pin names by removing pin functions in brackets.
Matous Hybl
2021-11-03 16:37:00 +01:00
2e06408221
Merge pull request #96 from matoushybl/f7-support
Dario Nieuwenhuis
2021-11-04 00:23:50 +01:00
3d7e46e6c9
Fix v1c ethernet definition.
Matous Hybl
2021-10-28 14:22:02 +02:00
c40960c953
Merge pull request #95 from bobmcwhirter/weird_u5_headers
Dario Nieuwenhuis
2021-11-02 17:35:16 +01:00
21f31372a6
Adjust the d
script. Extract some peripherals for U5. Update parse.py for some U5 perculiarities.
Bob McWhirter
2021-11-02 12:02:38 -04:00
dc4a94e868
Parse out U5xx packages. Avoid barfing if we're not yet parsing DMA, because we aren't for GPDMA.
Bob McWhirter
2021-10-29 13:08:21 -04:00
dca5886b25
Parse decimal in the form of '08U'. Parse division such as FLASH_BANK_SIZE / FLASH_SOMETHING in defines.
Bob McWhirter
2021-10-29 11:45:27 -04:00
0358c950da
Change d
to just clone the -sources repository.
Bob McWhirter
2021-10-28 13:47:22 -04:00
09c1a7102a
Merge pull request #93 from bgamari/wip/lptim
Dario Nieuwenhuis
2021-10-26 17:57:15 +02:00
2f42ebcd2c
Add support for LPTIM peripherals
Ben Gamari
2021-10-24 13:25:21 -04:00
6bedd95ce1
Merge pull request #92 from matoushybl/f7-support
Dario Nieuwenhuis
2021-10-26 17:21:47 +02:00
2e1302c4e8
Support for STM32F767ZI and basic support for the rest of the family.
Matous Hybl
2021-10-21 14:54:44 +02:00
a90f756dda
Merge pull request #91 from topisani/main
Ulf Lilleengen
2021-10-07 13:54:48 +02:00
b8de47fa04
feat: Add F1 SPI registers
Tobias Pisani
2021-10-06 20:51:27 +02:00
6caf69650a
Merge pull request #90 from mryndzionek/dev
Dario Nieuwenhuis
2021-09-27 16:04:27 +02:00
9e6eff587c
Correct AFIO support (code review request)
Mariusz Ryndzionek
2021-09-27 15:30:03 +02:00
fccbab0aae
Merge pull request #89 from theunkn0wn1/feature/crc32
Dario Nieuwenhuis
2021-09-27 00:30:21 +02:00
f6ce6dc36b
CRC register cleanup
Dario Nieuwenhuis
2021-09-27 00:26:04 +02:00
fb4d8b7033
Add CRC rules to parse.py
Joshua Salzedo
2021-09-26 15:09:45 -07:00
24dabf68e5
Add three distinct versions of CRC - remove F4 specific version
Joshua Salzedo
2021-09-26 14:58:47 -07:00
a8a8b88661
add CRC32 peripheral for the F4 family
Joshua Salzedo
2021-09-24 16:59:18 -07:00
9752672268
Merge pull request #88 from FrozenDroid/add-l4-flash
Dario Nieuwenhuis
2021-09-24 18:30:52 +02:00
97fd020941
add l4 flash register
Vincent Stakenburg
2021-09-24 16:45:59 +02:00
f699571831
add l4 flash parse line
Vincent Stakenburg
2021-09-24 16:45:17 +02:00
e317d781d8
Merge pull request #87 from mryndzionek/stm32f1_support
Dario Nieuwenhuis
2021-09-23 18:57:52 +02:00
8dde100c15
Updated register mapping for STM32 F1 AFIO
Mariusz Ryndzionek
2021-09-23 18:54:22 +02:00
5dec590202
Merge pull request #85 from mryndzionek/stm32f1_support
Dario Nieuwenhuis
2021-09-23 17:36:38 +02:00
f1e7e9ef84
Merge pull request #86 from lulf/stm32l1-pwr-and-fix
Ulf Lilleengen
2021-09-23 14:42:49 +02:00
a302947e87
Add PWR register block and fix RCC register block
Ulf Lilleengen
2021-09-23 14:40:59 +02:00
fbea23bd00
Added missing FLASH registers (generated automatically)
Mariusz Ryndzionek
2021-09-23 07:09:11 +02:00
c0938c9102
Add initial register mapping for STM32 F1 AFIO and FLASH
Mariusz Ryndzionek
2021-09-22 18:22:36 +02:00
1d62ba5e14
Merge pull request #84 from lulf/l1-regs
Dario Nieuwenhuis
2021-09-15 14:55:09 +02:00
9f1bd7d0d0
Update chip yaml
Ulf Lilleengen
2021-09-15 14:47:33 +02:00
e2bf041808
Add register mapping for STM32 L1 SYSCFG and DBGMCU
Ulf Lilleengen
2021-09-15 14:47:01 +02:00
616a2779d0
Merge pull request #82 from bgamari/stm32g0
Dario Nieuwenhuis
2021-08-31 22:21:51 +02:00
96c902c66c
Merge pull request #83 from lulf/stm32wl55-pwr
Dario Nieuwenhuis
2021-08-31 22:18:57 +02:00
201510407c
Handle SUBGHZSPI peripheral so it is recognized as an SPI peripheral
Ulf Lilleengen
2021-08-31 14:43:02 +02:00
902b9a6986
Add PWR peripheral for STM32WL5
Ulf Lilleengen
2021-08-31 14:34:54 +02:00
3a88360dc6
Add PWR registers for STM32G0
Ben Gamari
2021-08-31 01:46:26 -04:00
5366833cbd
Introduce ADC register set for STM32G0
Ben Gamari
2021-08-30 15:09:35 -04:00
deb37365d7
exti: g0 and l5 are 8 bits per line...
Dario Nieuwenhuis
2021-08-20 01:26:21 +02:00
8534ae884d
rcc: make GPIO EN/RST regs naming consistent.
Dario Nieuwenhuis
2021-08-19 23:50:42 +02:00
3b6363dffb
wl rcc: rename SPI2S2 -> SPI2
Dario Nieuwenhuis
2021-08-19 22:37:07 +02:00
49e579e97f
Add F2 RCC
Dario Nieuwenhuis
2021-08-19 22:12:39 +02:00
e289dd883f
Cleanup EXTI
Dario Nieuwenhuis
2021-08-19 21:34:16 +02:00
701ab04c2a
Cleanup SYSCFG naming
Dario Nieuwenhuis
2021-08-19 21:28:32 +02:00
31997049ea
Fix wrong register offsets in WB SYSCFG
Dario Nieuwenhuis
2021-08-19 19:20:13 +02:00
6af9f2c0d1
Add RCC for F3, F7, G4, H7AB, L1, L5, WB*, WL5, WLE
Dario Nieuwenhuis
2021-08-19 19:13:30 +02:00
bd402a58f2
Merge pull request #72 from bgamari/stm32g0
Dario Nieuwenhuis
2021-08-19 16:05:29 +02:00
254c59c064
Introduce STM32G0 ADC support
Ben Gamari
2021-07-30 23:25:49 -04:00
f57a268b9f
Add STM32G0 support
Ben Gamari
2021-07-30 14:08:31 -04:00
075d283354
parse: Drop duplicate pin definitions
Ben Gamari
2021-07-30 17:07:30 -04:00
9c753da57b
Add a bit of documentation for register extraction process
Ben Gamari
2021-07-30 13:50:56 -04:00
f5808de749
Add RCC support for STM32G0
Ben Gamari
2021-07-30 12:43:32 -04:00
e735ea9769
Fix hash-bangs
Ben Gamari
2021-07-30 12:41:50 -04:00
8bb9c26d38
Update README.md
Dario Nieuwenhuis
2021-08-18 22:17:16 +02:00
f0e85a7e0d
Merge pull request #81 from embassy-rs/add-wl55-radio-spi
Dario Nieuwenhuis
2021-08-18 15:21:45 +02:00