Cleanup SYSCFG naming

data/registers/syscfg_wle.yaml

@@ -0,0 +1,154 @@
+---
+block/SYSCFG:
+  description: System configuration controller
+  items:
+    - name: MEMRMP
+      description: memory remap register
+      byte_offset: 0
+      fieldset: MEMRMP
+    - name: CFGR1
+      description: configuration register 1
+      byte_offset: 4
+      fieldset: CFGR1
+    - name: EXTICR
+      description: external interrupt configuration register 1
+      array:
+        len: 4
+        stride: 4
+      byte_offset: 8
+      fieldset: EXTICR
+    - name: SCSR
+      description: SCSR
+      byte_offset: 24
+      fieldset: SCSR
+    - name: CFGR2
+      description: CFGR2
+      byte_offset: 28
+      fieldset: CFGR2
+    - name: SWPR
+      description: SWPR
+      byte_offset: 32
+      fieldset: SWPR
+    - name: SKR
+      description: SKR
+      byte_offset: 36
+      access: Write
+      fieldset: SKR
+    - name: RFDCR
+      description: radio debug control register
+      byte_offset: 520
+      fieldset: RFDCR
+fieldset/CFGR1:
+  description: configuration register 1
+  fields:
+    - name: BOOSTEN
+      description: I/O analog switch voltage booster enable
+      bit_offset: 8
+      bit_size: 1
+    - name: I2C_PB6_FMP
+      description: Fast-mode Plus (Fm+) driving capability activation on PB6
+      bit_offset: 16
+      bit_size: 1
+    - name: I2C_PB7_FMP
+      description: Fast-mode Plus (Fm+) driving capability activation on PB7
+      bit_offset: 17
+      bit_size: 1
+    - name: I2C_PB8_FMP
+      description: Fast-mode Plus (Fm+) driving capability activation on PB8
+      bit_offset: 18
+      bit_size: 1
+    - name: I2C_PB9_FMP
+      description: Fast-mode Plus (Fm+) driving capability activation on PB9
+      bit_offset: 19
+      bit_size: 1
+    - name: I2C1_FMP
+      description: I2C1 Fast-mode Plus driving capability activation
+      bit_offset: 20
+      bit_size: 1
+    - name: I2C2_FMP
+      description: I2C2 Fast-mode Plus driving capability activation
+      bit_offset: 21
+      bit_size: 1
+    - name: I2C3_FMP
+      description: I2C3 Fast-mode Plus driving capability activation
+      bit_offset: 22
+      bit_size: 1
+fieldset/CFGR2:
+  description: CFGR2
+  fields:
+    - name: CLL
+      description: CPU1 LOCKUP (Hardfault) output enable bit
+      bit_offset: 0
+      bit_size: 1
+    - name: SPL
+      description: SRAM2 parity lock bit
+      bit_offset: 1
+      bit_size: 1
+    - name: PVDL
+      description: PVD lock enable bit
+      bit_offset: 2
+      bit_size: 1
+    - name: ECCL
+      description: ECC Lock
+      bit_offset: 3
+      bit_size: 1
+    - name: SPF
+      description: SRAM2 parity error flag
+      bit_offset: 8
+      bit_size: 1
+fieldset/EXTICR:
+  description: external interrupt configuration register 4
+  fields:
+    - name: EXTI
+      description: EXTI12 configuration bits
+      bit_offset: 0
+      bit_size: 3
+      array:
+        len: 4
+        stride: 4
+fieldset/MEMRMP:
+  description: memory remap register
+  fields:
+    - name: MEM_MODE
+      description: Memory mapping selection
+      bit_offset: 0
+      bit_size: 3
+fieldset/RFDCR:
+  description: radio debug control register
+  fields:
+    - name: RFTBSEL
+      description: radio debug test bus selection
+      bit_offset: 0
+      bit_size: 1
+fieldset/SCSR:
+  description: SCSR
+  fields:
+    - name: SRAM2ER
+      description: SRAM2 erase
+      bit_offset: 0
+      bit_size: 1
+    - name: SRAMBSY
+      description: "SRAM1, SRAM2 and PKA SRAM busy by erase operation"
+      bit_offset: 1
+      bit_size: 1
+    - name: PKASRAMBSY
+      description: PKA SRAM busy by erase operation
+      bit_offset: 8
+      bit_size: 1
+fieldset/SKR:
+  description: SKR
+  fields:
+    - name: KEY
+      description: SRAM2 write protection key for software erase
+      bit_offset: 0
+      bit_size: 8
+fieldset/SWPR:
+  description: SWPR
+  fields:
+    - name: PWP
+      description: SRAM2 1Kbyte page 0 write protection
+      bit_offset: 0
+      bit_size: 1
+      array:
+        len: 32
+        stride: 1

parse.py

@@ -350,8 +350,9 @@ perimap = [
     ('STM32L0.*:SYS:.*', 'syscfg_l0/SYSCFG'),
     ('STM32H7.*:SYS:.*', 'syscfg_h7/SYSCFG'),
     ('STM32G0.*:SYS:.*', 'syscfg_g0/SYSCFG'),
-    ('STM32WB55.*:SYS:.*', 'syscfg_wb55/SYSCFG'),
-    ('STM32WL.*:SYS:.*', 'syscfg_wl5x/SYSCFG'),
+    ('STM32WB.*:SYS:.*', 'syscfg_wb/SYSCFG'),
+    ('STM32WL5.*:SYS:.*', 'syscfg_wl5/SYSCFG'),
+    ('STM32WLE.*:SYS:.*', 'syscfg_wle/SYSCFG'),
 
     ('STM32F0.0.*:RCC:.*', 'rcc_f0x0/RCC'),
     ('STM32F0.*:RCC:.*', 'rcc_f0/RCC'),