Cleanup EXTI
This commit is contained in:
parent
701ab04c2a
commit
e289dd883f
@ -3,147 +3,61 @@ block/EXTI:
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description: External interrupt/event controller
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items:
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- name: RTSR
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description: Rising Trigger selection register (EXTI_RTSR)
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description: Rising Trigger selection register
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array:
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len: 2
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stride: 40
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byte_offset: 0
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reset_value: 0
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fieldset: RTSR
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array:
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len: 2
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stride: 40
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fieldset: LINES
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- name: FTSR
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description: Falling Trigger selection register (EXTI_FTSR)
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description: Falling Trigger selection register
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array:
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len: 2
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stride: 40
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byte_offset: 4
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reset_value: 0
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fieldset: FTSR
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array:
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len: 2
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stride: 40
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fieldset: LINES
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- name: SWIER
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description: Software interrupt event register (EXTI_SWIER)
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description: Software interrupt event register
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array:
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len: 2
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stride: 40
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byte_offset: 8
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reset_value: 0
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fieldset: SWIER
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array:
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len: 2
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stride: 40
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fieldset: LINES
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- name: RPR
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description: Rising pending register (EXTI_RPR)
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description: Rising pending register
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array:
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len: 2
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stride: 40
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byte_offset: 12
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reset_value: 0
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fieldset: RPR
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array:
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len: 2
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stride: 40
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fieldset: LINES
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- name: FPR
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description: Falling pending register (EXTI_FPR)
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byte_offset: 16
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reset_value: 0
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fieldset: FPR
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description: Falling pending register
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array:
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len: 2
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stride: 40
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byte_offset: 16
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fieldset: LINES
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- name: EXTICR
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description: external interrupt configuration register
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description: Configuration register
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array:
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len: 4
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stride: 4
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byte_offset: 96
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fieldset: EXTICR
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- name: IMR
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description: internal interrupt configuration register 1
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description: Interrupt mask register
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array:
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len: 2
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stride: 16
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byte_offset: 128
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fieldset: IMR
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fieldset: LINES
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- name: EMR
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description: external interrupt configuration register 1
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description: Event mask register
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array:
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len: 2
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stride: 16
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byte_offset: 132
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fieldset: EMR
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fieldset/EMR:
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description: Event mask register (EXTI_EMR)
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fields:
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- name: MR
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description: Event Mask on line 0
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bit_offset: 0
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bit_size: 1
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array:
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len: 32
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stride: 1
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enum: MR
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fieldset/FPR:
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description: Falling Trigger pending register (EXTI_FPR)
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fields:
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- name: FPIF
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description: Falling edge event pending for line 0
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bit_offset: 0
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bit_size: 1
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array:
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len: 32
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stride: 1
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enum: PRR
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fieldset/FTSR:
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description: Falling Trigger selection register (EXTI_FTSR)
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fields:
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- name: TR
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description: Falling trigger event configuration of line 0
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bit_offset: 0
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bit_size: 1
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array:
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len: 32
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stride: 1
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enum: TR
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fieldset/IMR:
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description: Interrupt mask register (EXTI_IMR)
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fields:
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- name: MR
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description: Interrupt Mask on line 0
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bit_offset: 0
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bit_size: 1
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array:
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len: 32
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stride: 1
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enum: MR
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fieldset/RPR:
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description: Rising Trigger pending register (EXTI_RPR)
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fields:
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- name: RPIF
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description: Rising edge event pending for line 0
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bit_offset: 0
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bit_size: 1
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array:
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len: 32
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stride: 1
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enum: PRR
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fieldset/RTSR:
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description: Rising Trigger selection register (EXTI_RTSR)
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fields:
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- name: TR
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description: Rising trigger event configuration of line 0
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bit_offset: 0
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bit_size: 1
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array:
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len: 32
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stride: 1
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enum: TR
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fieldset/SWIER:
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description: Software interrupt event register (EXTI_SWIER)
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fields:
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- name: SWIER
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description: Software Interrupt on line 0
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bit_offset: 0
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bit_size: 1
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array:
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len: 32
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stride: 1
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enum_write: SWIERW
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fieldset: LINES
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fieldset/EXTICR:
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description: external interrupt configuration register 1
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fields:
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@ -154,43 +68,13 @@ fieldset/EXTICR:
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array:
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len: 4
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stride: 4
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enum/MR:
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bit_size: 1
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variants:
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- name: Masked
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description: Interrupt request line is masked
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value: 0
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- name: Unmasked
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description: Interrupt request line is unmasked
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value: 1
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enum/TR:
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bit_size: 1
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variants:
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- name: Disabled
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description: Falling edge trigger is disabled
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value: 0
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- name: Enabled
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description: Falling edge trigger is enabled
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value: 1
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enum/PRR:
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bit_size: 1
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variants:
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- name: NotPending
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description: No trigger request occurred
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value: 0
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- name: Pending
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description: Selected trigger request occurred
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value: 1
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enum/PRW:
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bit_size: 1
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variants:
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- name: Clear
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description: Clears pending bit
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value: 1
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enum/SWIERW:
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bit_size: 1
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variants:
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- name: Pend
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description: Generates an interrupt request
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value: 1
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fieldset/LINES:
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description: EXTI lines register, 1 bit per line
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fields:
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- name: LINE
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description: EXTI line
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bit_offset: 0
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bit_size: 1
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array:
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len: 32
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stride: 1
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@ -2,139 +2,55 @@
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block/EXTI:
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description: External interrupt/event controller
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items:
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- name: IMR
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description: Interrupt mask register (EXTI_IMR)
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byte_offset: 128
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reset_value: 0
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fieldset: IMR
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- name: EMR
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description: Event mask register (EXTI_EMR)
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byte_offset: 132
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reset_value: 0
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fieldset: EMR
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- name: RTSR
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description: Rising Trigger selection register (EXTI_RTSR)
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description: Rising Trigger selection register
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array:
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len: 1
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stride: 0
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byte_offset: 0
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reset_value: 0
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fieldset: RTSR
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fieldset: LINES
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- name: FTSR
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description: Falling Trigger selection register (EXTI_FTSR)
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description: Falling Trigger selection register
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array:
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len: 1
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stride: 0
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byte_offset: 4
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reset_value: 0
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fieldset: FTSR
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fieldset: LINES
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- name: SWIER
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description: Software interrupt event register (EXTI_SWIER)
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description: Software interrupt event register
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array:
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len: 1
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stride: 0
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byte_offset: 8
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reset_value: 0
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fieldset: SWIER
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fieldset: LINES
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- name: IMR
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description: Interrupt mask register
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array:
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len: 1
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stride: 0
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byte_offset: 128
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fieldset: LINES
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- name: EMR
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description: Event mask register
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array:
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len: 1
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stride: 0
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byte_offset: 132
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fieldset: LINES
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- name: PR
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description: Pending register (EXTI_PR)
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description: Pending register
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array:
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len: 1
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stride: 0
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byte_offset: 136
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reset_value: 0
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fieldset: PR
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fieldset/EMR:
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description: Event mask register (EXTI_EMR)
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fieldset: LINES
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fieldset/LINES:
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description: EXTI lines register, 1 bit per line
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fields:
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- name: MR
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description: Event Mask on line 0
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- name: LINE
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description: EXTI line
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bit_offset: 0
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bit_size: 1
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array:
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len: 23
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len: 32
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stride: 1
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enum: MR
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fieldset/FTSR:
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description: Falling Trigger selection register (EXTI_FTSR)
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fields:
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- name: TR
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description: Falling trigger event configuration of line 0
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bit_offset: 0
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bit_size: 1
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array:
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len: 23
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stride: 1
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enum: TR
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fieldset/IMR:
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description: Interrupt mask register (EXTI_IMR)
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fields:
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- name: MR
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description: Interrupt Mask on line 0
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bit_offset: 0
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bit_size: 1
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array:
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len: 23
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stride: 1
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enum: MR
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fieldset/PR:
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description: Pending register (EXTI_PR)
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fields:
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- name: PR
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description: Pending bit 0
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bit_offset: 0
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bit_size: 1
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array:
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len: 23
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stride: 1
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enum_read: PRR
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enum_write: PRW
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fieldset/RTSR:
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description: Rising Trigger selection register (EXTI_RTSR)
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fields:
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- name: TR
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description: Rising trigger event configuration of line 0
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bit_offset: 0
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bit_size: 1
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array:
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len: 23
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stride: 1
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enum: TR
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fieldset/SWIER:
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description: Software interrupt event register (EXTI_SWIER)
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fields:
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- name: SWIER
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description: Software Interrupt on line 0
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bit_offset: 0
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bit_size: 1
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array:
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len: 23
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stride: 1
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enum_write: SWIERW
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enum/MR:
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bit_size: 1
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variants:
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- name: Masked
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description: Interrupt request line is masked
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value: 0
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- name: Unmasked
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description: Interrupt request line is unmasked
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value: 1
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enum/TR:
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bit_size: 1
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variants:
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- name: Disabled
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description: Falling edge trigger is disabled
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value: 0
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- name: Enabled
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description: Falling edge trigger is enabled
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value: 1
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enum/PRR:
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bit_size: 1
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variants:
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- name: NotPending
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description: No trigger request occurred
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value: 0
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- name: Pending
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description: Selected trigger request occurred
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value: 1
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enum/PRW:
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bit_size: 1
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variants:
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- name: Clear
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description: Clears pending bit
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value: 1
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enum/SWIERW:
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bit_size: 1
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variants:
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- name: Pend
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description: Generates an interrupt request
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value: 1
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125
data/registers/exti_l5.yaml
Normal file
125
data/registers/exti_l5.yaml
Normal file
@ -0,0 +1,125 @@
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---
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block/EXTI:
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description: External interrupt/event controller
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items:
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- name: RTSR
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description: Rising Trigger selection register
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array:
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len: 2
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stride: 32
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byte_offset: 0
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fieldset: LINES
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- name: FTSR
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description: Falling Trigger selection register
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array:
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len: 2
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stride: 32
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byte_offset: 4
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fieldset: LINES
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- name: SWIER
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description: Software interrupt event register
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array:
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len: 2
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stride: 32
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byte_offset: 8
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fieldset: LINES
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- name: RPR
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description: Rising pending register
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array:
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len: 2
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stride: 32
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byte_offset: 12
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fieldset: LINES
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- name: FPR
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description: Falling pending register
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array:
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len: 2
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stride: 32
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byte_offset: 16
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fieldset: LINES
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- name: SECCFGR
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description: Security configuration register
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array:
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len: 2
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stride: 36
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byte_offset: 20
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fieldset: SECCFGR
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- name: PRIVCFGR
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description: Privilege configuration register
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array:
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len: 2
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stride: 28
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byte_offset: 24
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fieldset: PRIVCFGR
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- name: EXTICR
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description: Configuration register
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array:
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len: 4
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stride: 4
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byte_offset: 96
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fieldset: EXTICR
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- name: LOCKRG
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description: EXTI lock register
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byte_offset: 112
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fieldset: LOCKRG
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- name: IMR
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description: Interrupt mask register
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array:
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len: 2
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stride: 16
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byte_offset: 128
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fieldset: LINES
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- name: EMR
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description: Event mask register
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array:
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len: 2
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stride: 16
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byte_offset: 132
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fieldset: LINES
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fieldset/EXTICR:
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description: external interrupt configuration register 1
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fields:
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- name: EXTI
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description: EXTI configuration bits
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bit_offset: 0
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bit_size: 4
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array:
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len: 4
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stride: 4
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fieldset/LINES:
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description: EXTI lines register, 1 bit per line
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fields:
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- name: LINE
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description: EXTI line
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bit_offset: 0
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bit_size: 1
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array:
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len: 32
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stride: 1
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fieldset/LOCKRG:
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description: EXTI lock register
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fields:
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- name: LOCK
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description: LOCK
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bit_offset: 0
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bit_size: 1
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fieldset/PRIVCFGR:
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description: Privilege configuration register
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fields:
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- name: PRIV
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description: Security enable on event input x
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bit_offset: 0
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bit_size: 1
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array:
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len: 32
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stride: 1
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fieldset/SECCFGR:
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description: Security configuration register
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fields:
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- name: SEC
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description: Security enable on event input x
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bit_offset: 0
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bit_size: 1
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array:
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len: 32
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stride: 1
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@ -3,138 +3,54 @@ block/EXTI:
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description: External interrupt/event controller
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items:
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- name: IMR
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description: Interrupt mask register (EXTI_IMR)
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description: Interrupt mask register
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array:
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len: 2
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stride: 32
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byte_offset: 0
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reset_value: 0
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fieldset: IMR
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fieldset: LINES
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- name: EMR
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description: Event mask register (EXTI_EMR)
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description: Interrupt mask register
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array:
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len: 2
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stride: 32
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byte_offset: 4
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reset_value: 0
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fieldset: EMR
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fieldset: LINES
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- name: RTSR
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description: Rising Trigger selection register (EXTI_RTSR)
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description: Rising Trigger selection register
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array:
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len: 2
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stride: 32
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byte_offset: 8
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reset_value: 0
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fieldset: RTSR
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fieldset: LINES
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- name: FTSR
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description: Falling Trigger selection register (EXTI_FTSR)
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description: Falling Trigger selection register
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array:
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len: 2
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stride: 32
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byte_offset: 12
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reset_value: 0
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fieldset: FTSR
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fieldset: LINES
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- name: SWIER
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description: Software interrupt event register (EXTI_SWIER)
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description: Software interrupt event register
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array:
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len: 2
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stride: 32
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byte_offset: 16
|
||||
reset_value: 0
|
||||
fieldset: SWIER
|
||||
fieldset: LINES
|
||||
- name: PR
|
||||
description: Pending register (EXTI_PR)
|
||||
description: Pending register
|
||||
array:
|
||||
len: 2
|
||||
stride: 32
|
||||
byte_offset: 20
|
||||
reset_value: 0
|
||||
fieldset: PR
|
||||
fieldset/EMR:
|
||||
description: Event mask register (EXTI_EMR)
|
||||
fieldset: LINES
|
||||
fieldset/LINES:
|
||||
description: EXTI lines register, 1 bit per line
|
||||
fields:
|
||||
- name: MR
|
||||
description: Event Mask on line 0
|
||||
- name: LINE
|
||||
description: EXTI line
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 23
|
||||
len: 32
|
||||
stride: 1
|
||||
enum: MR
|
||||
fieldset/FTSR:
|
||||
description: Falling Trigger selection register (EXTI_FTSR)
|
||||
fields:
|
||||
- name: TR
|
||||
description: Falling trigger event configuration of line 0
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 23
|
||||
stride: 1
|
||||
enum: TR
|
||||
fieldset/IMR:
|
||||
description: Interrupt mask register (EXTI_IMR)
|
||||
fields:
|
||||
- name: MR
|
||||
description: Interrupt Mask on line 0
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 23
|
||||
stride: 1
|
||||
enum: MR
|
||||
fieldset/PR:
|
||||
description: Pending register (EXTI_PR)
|
||||
fields:
|
||||
- name: PR
|
||||
description: Pending bit 0
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 23
|
||||
stride: 1
|
||||
enum_read: PRR
|
||||
enum_write: PRW
|
||||
fieldset/RTSR:
|
||||
description: Rising Trigger selection register (EXTI_RTSR)
|
||||
fields:
|
||||
- name: TR
|
||||
description: Rising trigger event configuration of line 0
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 23
|
||||
stride: 1
|
||||
enum: TR
|
||||
fieldset/SWIER:
|
||||
description: Software interrupt event register (EXTI_SWIER)
|
||||
fields:
|
||||
- name: SWIER
|
||||
description: Software Interrupt on line 0
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 23
|
||||
stride: 1
|
||||
enum_write: SWIERW
|
||||
enum/MR:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: Masked
|
||||
description: Interrupt request line is masked
|
||||
value: 0
|
||||
- name: Unmasked
|
||||
description: Interrupt request line is unmasked
|
||||
value: 1
|
||||
enum/TR:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: Disabled
|
||||
description: Falling edge trigger is disabled
|
||||
value: 0
|
||||
- name: Enabled
|
||||
description: Falling edge trigger is enabled
|
||||
value: 1
|
||||
enum/PRR:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: NotPending
|
||||
description: No trigger request occurred
|
||||
value: 0
|
||||
- name: Pending
|
||||
description: Selected trigger request occurred
|
||||
value: 1
|
||||
enum/PRW:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: Clear
|
||||
description: Clears pending bit
|
||||
value: 1
|
||||
enum/SWIERW:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: Pend
|
||||
description: Generates an interrupt request
|
||||
value: 1
|
66
data/registers/exti_w.yaml
Normal file
66
data/registers/exti_w.yaml
Normal file
@ -0,0 +1,66 @@
|
||||
---
|
||||
block/EXTI:
|
||||
description: External interrupt/event controller
|
||||
items:
|
||||
- name: RTSR
|
||||
description: rising trigger selection register
|
||||
array:
|
||||
len: 2
|
||||
stride: 32
|
||||
byte_offset: 0
|
||||
fieldset: LINES
|
||||
- name: FTSR
|
||||
description: falling trigger selection register
|
||||
array:
|
||||
len: 2
|
||||
stride: 32
|
||||
byte_offset: 4
|
||||
fieldset: LINES
|
||||
- name: SWIER
|
||||
description: software interrupt event register
|
||||
array:
|
||||
len: 2
|
||||
stride: 32
|
||||
byte_offset: 8
|
||||
fieldset: LINES
|
||||
- name: PR
|
||||
description: EXTI pending register
|
||||
array:
|
||||
len: 2
|
||||
stride: 32
|
||||
byte_offset: 12
|
||||
fieldset: LINES
|
||||
- name: CPU
|
||||
description: CPU specific registers
|
||||
byte_offset: 128
|
||||
block: CPU
|
||||
array:
|
||||
len: 2
|
||||
stride: 64
|
||||
block/CPU:
|
||||
description: CPU-specific registers
|
||||
items:
|
||||
- name: IMR
|
||||
description: CPU x interrupt mask register
|
||||
byte_offset: 0
|
||||
fieldset: LINES
|
||||
array:
|
||||
len: 2
|
||||
stride: 16
|
||||
- name: EMR
|
||||
description: CPU x event mask register
|
||||
array:
|
||||
len: 2
|
||||
stride: 16
|
||||
byte_offset: 4
|
||||
fieldset: LINES
|
||||
fieldset/LINES:
|
||||
description: EXTI lines register, 1 bit per line
|
||||
fields:
|
||||
- name: LINE
|
||||
description: EXTI line
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 32
|
||||
stride: 1
|
@ -1,174 +0,0 @@
|
||||
---
|
||||
block/EXTI:
|
||||
description: External interrupt/event controller
|
||||
items:
|
||||
- name: RTSR
|
||||
description: rising trigger selection register
|
||||
byte_offset: 0
|
||||
fieldset: RTSR
|
||||
array:
|
||||
len: 2
|
||||
stride: 32
|
||||
- name: FTSR
|
||||
description: falling trigger selection register
|
||||
byte_offset: 4
|
||||
fieldset: FTSR
|
||||
array:
|
||||
len: 2
|
||||
stride: 32
|
||||
- name: SWIER
|
||||
description: software interrupt event register
|
||||
byte_offset: 8
|
||||
fieldset: SWIER
|
||||
array:
|
||||
len: 2
|
||||
stride: 32
|
||||
- name: PR
|
||||
description: EXTI pending register
|
||||
byte_offset: 12
|
||||
fieldset: PR
|
||||
array:
|
||||
len: 2
|
||||
stride: 32
|
||||
- name: CPU
|
||||
description: CPU specific registers
|
||||
byte_offset: 128
|
||||
block: CPU_MASK
|
||||
array:
|
||||
len: 2
|
||||
stride: 64
|
||||
block/CPU_MASK:
|
||||
description: CPU-specific mask registers
|
||||
items:
|
||||
- name: IMR
|
||||
description: CPUm wakeup with interrupt mask register
|
||||
byte_offset: 0
|
||||
fieldset: C1IMR
|
||||
array:
|
||||
len: 2
|
||||
stride: 16
|
||||
- name: EMR
|
||||
description: CPUm wakeup with event mask register
|
||||
byte_offset: 4
|
||||
fieldset: C1EMR
|
||||
array:
|
||||
len: 2
|
||||
stride: 16
|
||||
fieldset/C1EMR:
|
||||
description: CPUm wakeup with event mask register
|
||||
fields:
|
||||
- name: EM
|
||||
description: CPU(m) Wakeup with event generation Mask on Event input
|
||||
bit_offset: 0
|
||||
bit_size: 16
|
||||
array:
|
||||
len: 32
|
||||
stride: 1
|
||||
fieldset/C1IMR:
|
||||
description: CPUm wakeup with interrupt mask register
|
||||
fields:
|
||||
- name: IM
|
||||
description: CPU(m) wakeup with interrupt Mask on Event input
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 32
|
||||
stride: 1
|
||||
enum: MR
|
||||
fieldset/FTSR:
|
||||
description: falling trigger selection register
|
||||
fields:
|
||||
- name: FT
|
||||
description: Falling trigger event configuration bit of Configurable Event input
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 32
|
||||
stride: 1
|
||||
enum: FT
|
||||
fieldset/PR:
|
||||
description: EXTI pending register
|
||||
fields:
|
||||
- name: PIF
|
||||
description: Configurable event inputs Pending bit
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 32
|
||||
stride: 1
|
||||
enum_read: PRR
|
||||
enum_write: PRW
|
||||
fieldset/RTSR:
|
||||
description: rising trigger selection register
|
||||
fields:
|
||||
- name: RT
|
||||
description: Rising trigger event configuration bit of Configurable Event input
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 32
|
||||
stride: 1
|
||||
enum: RT
|
||||
fieldset/SWIER:
|
||||
description: software interrupt event register
|
||||
fields:
|
||||
- name: SWI
|
||||
description: Software interrupt on event
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 32
|
||||
stride: 1
|
||||
fieldset/VERR:
|
||||
description: EXTI IP Version register
|
||||
fields:
|
||||
- name: MINREV
|
||||
description: Minor Revision number
|
||||
bit_offset: 0
|
||||
bit_size: 4
|
||||
- name: MAJREV
|
||||
description: Major Revision number
|
||||
bit_offset: 4
|
||||
bit_size: 4
|
||||
enum/FT:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: Disabled
|
||||
description: Falling edge trigger is disabled
|
||||
value: 0
|
||||
- name: Enabled
|
||||
description: Falling edge trigger is enabled
|
||||
value: 1
|
||||
enum/RT:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: Disabled
|
||||
description: Falling edge trigger is disabled
|
||||
value: 0
|
||||
- name: Enabled
|
||||
description: Falling edge trigger is enabled
|
||||
value: 1
|
||||
enum/MR:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: Masked
|
||||
description: Interrupt request line is masked
|
||||
value: 0
|
||||
- name: Unmasked
|
||||
description: Interrupt request line is unmasked
|
||||
value: 1
|
||||
enum/PRR:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: NotPending
|
||||
description: No trigger request occurred
|
||||
value: 0
|
||||
- name: Pending
|
||||
description: Selected trigger request occurred
|
||||
value: 1
|
||||
enum/PRW:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: Clear
|
||||
description: Clears pending bit
|
||||
value: 1
|
@ -1,174 +0,0 @@
|
||||
---
|
||||
block/EXTI:
|
||||
description: External interrupt/event controller
|
||||
items:
|
||||
- name: RTSR
|
||||
description: rising trigger selection register
|
||||
byte_offset: 0
|
||||
fieldset: RTSR
|
||||
array:
|
||||
len: 2
|
||||
stride: 32
|
||||
- name: FTSR
|
||||
description: falling trigger selection register
|
||||
byte_offset: 4
|
||||
fieldset: FTSR
|
||||
array:
|
||||
len: 2
|
||||
stride: 32
|
||||
- name: SWIER
|
||||
description: software interrupt event register
|
||||
byte_offset: 8
|
||||
fieldset: SWIER
|
||||
array:
|
||||
len: 2
|
||||
stride: 32
|
||||
- name: PR
|
||||
description: EXTI pending register
|
||||
byte_offset: 12
|
||||
fieldset: PR
|
||||
array:
|
||||
len: 2
|
||||
stride: 32
|
||||
- name: CPU
|
||||
description: CPU specific registers
|
||||
byte_offset: 128
|
||||
block: CPU_MASK
|
||||
array:
|
||||
len: 2
|
||||
stride: 64
|
||||
block/CPU_MASK:
|
||||
description: CPU-specific mask registers
|
||||
items:
|
||||
- name: IMR
|
||||
description: CPUm wakeup with interrupt mask register
|
||||
byte_offset: 0
|
||||
fieldset: C1IMR
|
||||
array:
|
||||
len: 2
|
||||
stride: 16
|
||||
- name: EMR
|
||||
description: CPUm wakeup with event mask register
|
||||
byte_offset: 4
|
||||
fieldset: C1EMR
|
||||
array:
|
||||
len: 2
|
||||
stride: 16
|
||||
fieldset/C1EMR:
|
||||
description: CPUm wakeup with event mask register
|
||||
fields:
|
||||
- name: EM
|
||||
description: CPU(m) Wakeup with event generation Mask on Event input
|
||||
bit_offset: 0
|
||||
bit_size: 16
|
||||
array:
|
||||
len: 32
|
||||
stride: 1
|
||||
fieldset/C1IMR:
|
||||
description: CPUm wakeup with interrupt mask register
|
||||
fields:
|
||||
- name: IM
|
||||
description: CPU(m) wakeup with interrupt Mask on Event input
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 32
|
||||
stride: 1
|
||||
enum: MR
|
||||
fieldset/FTSR:
|
||||
description: falling trigger selection register
|
||||
fields:
|
||||
- name: FT
|
||||
description: Falling trigger event configuration bit of Configurable Event input
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 32
|
||||
stride: 1
|
||||
enum: FT
|
||||
fieldset/PR:
|
||||
description: EXTI pending register
|
||||
fields:
|
||||
- name: PIF
|
||||
description: Configurable event inputs Pending bit
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 32
|
||||
stride: 1
|
||||
enum_read: PRR
|
||||
enum_write: PRW
|
||||
fieldset/RTSR:
|
||||
description: rising trigger selection register
|
||||
fields:
|
||||
- name: RT
|
||||
description: Rising trigger event configuration bit of Configurable Event input
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 32
|
||||
stride: 1
|
||||
enum: RT
|
||||
fieldset/SWIER:
|
||||
description: software interrupt event register
|
||||
fields:
|
||||
- name: SWI
|
||||
description: Software interrupt on event
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 32
|
||||
stride: 1
|
||||
fieldset/VERR:
|
||||
description: EXTI IP Version register
|
||||
fields:
|
||||
- name: MINREV
|
||||
description: Minor Revision number
|
||||
bit_offset: 0
|
||||
bit_size: 4
|
||||
- name: MAJREV
|
||||
description: Major Revision number
|
||||
bit_offset: 4
|
||||
bit_size: 4
|
||||
enum/FT:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: Disabled
|
||||
description: Falling edge trigger is disabled
|
||||
value: 0
|
||||
- name: Enabled
|
||||
description: Falling edge trigger is enabled
|
||||
value: 1
|
||||
enum/RT:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: Disabled
|
||||
description: Falling edge trigger is disabled
|
||||
value: 0
|
||||
- name: Enabled
|
||||
description: Falling edge trigger is enabled
|
||||
value: 1
|
||||
enum/MR:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: Masked
|
||||
description: Interrupt request line is masked
|
||||
value: 0
|
||||
- name: Unmasked
|
||||
description: Interrupt request line is unmasked
|
||||
value: 1
|
||||
enum/PRR:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: NotPending
|
||||
description: No trigger request occurred
|
||||
value: 0
|
||||
- name: Pending
|
||||
description: Selected trigger request occurred
|
||||
value: 1
|
||||
enum/PRW:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: Clear
|
||||
description: Clears pending bit
|
||||
value: 1
|
56
data/registers/exti_wle.yaml
Normal file
56
data/registers/exti_wle.yaml
Normal file
@ -0,0 +1,56 @@
|
||||
---
|
||||
block/EXTI:
|
||||
description: External interrupt/event controller
|
||||
items:
|
||||
- name: RTSR
|
||||
description: Rising Trigger selection register
|
||||
array:
|
||||
len: 2
|
||||
stride: 32
|
||||
byte_offset: 0
|
||||
fieldset: LINES
|
||||
- name: FTSR
|
||||
description: Falling Trigger selection register
|
||||
array:
|
||||
len: 2
|
||||
stride: 32
|
||||
byte_offset: 4
|
||||
fieldset: LINES
|
||||
- name: SWIER
|
||||
description: Software interrupt event register
|
||||
array:
|
||||
len: 2
|
||||
stride: 32
|
||||
byte_offset: 8
|
||||
fieldset: LINES
|
||||
- name: PR
|
||||
description: Pending register
|
||||
array:
|
||||
len: 2
|
||||
stride: 32
|
||||
byte_offset: 12
|
||||
fieldset: LINES
|
||||
- name: IMR
|
||||
description: Interrupt mask register
|
||||
array:
|
||||
len: 2
|
||||
stride: 16
|
||||
byte_offset: 128
|
||||
fieldset: LINES
|
||||
- name: EMR
|
||||
description: Event mask register
|
||||
array:
|
||||
len: 2
|
||||
stride: 16
|
||||
byte_offset: 132
|
||||
fieldset: LINES
|
||||
fieldset/LINES:
|
||||
description: EXTI lines register, 1 bit per line
|
||||
fields:
|
||||
- name: LINE
|
||||
description: EXTI line
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 32
|
||||
stride: 1
|
25
parse.py
25
parse.py
@ -373,6 +373,14 @@ perimap = [
|
||||
('STM32WL5.*:RCC:.*', 'rcc_wl5/RCC'),
|
||||
('STM32WLE.*:RCC:.*', 'rcc_wle/RCC'),
|
||||
|
||||
('STM32L5.*:EXTI:.*', 'exti_l5/EXTI'),
|
||||
('STM32G0.*:EXTI:.*', 'exti_g0/EXTI'),
|
||||
('STM32H7.*:EXTI:.*', 'exti_h7/EXTI'),
|
||||
('STM32WB.*:EXTI:.*', 'exti_w/EXTI'),
|
||||
('STM32WL5.*:EXTI:.*', 'exti_w/EXTI'),
|
||||
('STM32WLE.*:EXTI:.*', 'exti_wle/EXTI'),
|
||||
('.*:EXTI:.*', 'exti_v1/EXTI'),
|
||||
|
||||
('.*:STM32L0_crs_v1_0', 'crs_l0/CRS'),
|
||||
('.*SDMMC:sdmmc2_v1_0', 'sdmmc_v2/SDMMC'),
|
||||
('STM32H7(42|43|53|50).*:STM32H7_pwr_v1_0', 'pwr_h7/PWR'),
|
||||
@ -905,22 +913,13 @@ def parse_chips():
|
||||
|
||||
# EXTI is not in the cubedb XMLs
|
||||
if addr := defines.get('EXTI_BASE'):
|
||||
if chip_name.startswith("STM32WB55"):
|
||||
block = 'exti_wb55/EXTI'
|
||||
elif chip_name.startswith("STM32WL5"):
|
||||
block = 'exti_wl5x/EXTI'
|
||||
elif chip_name.startswith("STM32H7"):
|
||||
block = 'exti_h7/EXTI'
|
||||
elif chip_name.startswith("STM32G0"):
|
||||
block = 'exti_g0/EXTI'
|
||||
else:
|
||||
block = 'exti_v1/EXTI'
|
||||
|
||||
peris['EXTI'] = OrderedDict({
|
||||
peri = OrderedDict({
|
||||
'address': addr,
|
||||
'kind': 'EXTI',
|
||||
'block': block,
|
||||
})
|
||||
if block := match_peri(chip_name + ':EXTI:EXTI:v1'):
|
||||
peri['block'] = block
|
||||
peris['EXTI'] = peri
|
||||
|
||||
# FLASH is not in the cubedb XMLs
|
||||
if addr := defines.get('FLASH_R_BASE'):
|
||||
|
Loading…
x
Reference in New Issue
Block a user