17 Commits

Author SHA1 Message Date
Dario Nieuwenhuis
bcc9b6bf9f rcc/wb: add misrange enum 2023-10-23 01:02:53 +02:00
Dario Nieuwenhuis
b59a5c1812 rcc: add missing enums to wb, wl. 2023-10-23 00:30:16 +02:00
Dario Nieuwenhuis
ee64389697 Rename HSI16 -> HSI 2023-10-22 22:32:08 +02:00
xoviat
8bd7ff51b0 rcc: expand checker to all chips 2023-10-18 21:01:57 -05:00
xoviat
8b8686a852 rcc: more mux and enum cleanup 2023-10-15 10:37:36 -05:00
Dario Nieuwenhuis
ff45aa382e rcc: add more missing enums. 2023-10-11 00:07:28 +02:00
Dario Nieuwenhuis
8d112b7a93 rcc: add MCO enums for WB 2023-10-07 00:20:42 +02:00
Dario Nieuwenhuis
11256dc370 chiptool fmt. 2023-10-07 00:09:14 +02:00
Matt Ickstadt
2ceed56e94 RCC: add LSEDRV enums for WB and WL series
These are in the RMs but previously missing.
2023-10-05 11:18:49 -05:00
Dario Nieuwenhuis
2f97514774 pwr: add all VOS enums. 2023-09-18 02:57:23 +02:00
xoviat
a70aa2f06a rcc: use same name for bus psc 2023-09-16 15:43:03 -05:00
Dario Nieuwenhuis
8fec79a722 rcc consistency fixes. 2023-09-16 02:34:03 +02:00
Dario Nieuwenhuis
86fb0cfc2f chiptool fmt. 2023-09-16 02:34:03 +02:00
Dario Nieuwenhuis
78c43e0dba rcc: fix QSPIEN vs QUADSPIEN reg names. 2023-03-27 12:17:47 +02:00
Dario Nieuwenhuis
c90234583e RCC: fix USBFS -> USB 2022-04-09 00:43:48 +02:00
Dario Nieuwenhuis
c2804abc9a rcc: fix inconsistent naming. 2022-02-14 02:07:08 +01:00
Dario Nieuwenhuis
6af9f2c0d1 Add RCC for F3, F7, G4, H7AB, L1, L5, WB*, WL5, WLE 2021-08-19 19:13:30 +02:00