chiptool fmt.
This commit is contained in:
parent
f0f06b4c95
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11256dc370
@ -1,213 +1,212 @@
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---
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block/OPAMP:
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description: Operational Amplifier
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items:
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- name: OPAMPCSR
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description: OPAMP control register
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byte_offset: 0
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fieldset: OPAMP_CSR
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- name: OPAMPCSR
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description: OPAMP control register
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byte_offset: 0
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fieldset: OPAMP_CSR
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fieldset/OPAMP_CSR:
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description: OPAMP control register
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fields:
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- name: OPAMPEN
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description: OPAMP enable
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bit_offset: 0
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bit_size: 1
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- name: FORCE_VP
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description: FORCE_VP
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bit_offset: 1
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bit_size: 1
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- name: VP_SEL
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description: OPAMP Non inverting input selection
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bit_offset: 2
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bit_size: 2
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- name: VM_SEL
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description: OPAMP inverting input selection
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bit_offset: 5
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bit_size: 2
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- name: TCM_EN
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description: Timer controlled Mux mode enable
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bit_offset: 7
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bit_size: 1
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- name: VMS_SEL
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description: OPAMP inverting input secondary selection
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bit_offset: 8
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bit_size: 1
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- name: VPS_SEL
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description: OPAMP Non inverting input secondary selection
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bit_offset: 9
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bit_size: 2
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- name: CALON
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description: Calibration mode enable
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bit_offset: 11
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bit_size: 1
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- name: CALSEL
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description: Calibration selection
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bit_offset: 12
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bit_size: 2
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- name: PGA_GAIN
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description: Gain in PGA mode
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bit_offset: 14
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bit_size: 4
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- name: USER_TRIM
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description: User trimming enable
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bit_offset: 18
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bit_size: 1
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- name: TRIMOFFSETP
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description: Offset trimming value (PMOS)
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bit_offset: 19
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bit_size: 5
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- name: TRIMOFFSETN
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description: Offset trimming value (NMOS)
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bit_offset: 24
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bit_size: 5
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- name: TSTREF
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description: TSTREF
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bit_offset: 29
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bit_size: 1
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- name: OUTCAL
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description: OPAMP ouput status flag
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bit_offset: 30
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bit_size: 1
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- name: LOCK
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description: OPAMP lock
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bit_offset: 31
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bit_size: 1
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- name: OPAMPEN
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description: OPAMP enable
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bit_offset: 0
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bit_size: 1
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- name: FORCE_VP
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description: FORCE_VP
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bit_offset: 1
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bit_size: 1
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- name: VP_SEL
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description: OPAMP Non inverting input selection
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bit_offset: 2
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bit_size: 2
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- name: VM_SEL
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description: OPAMP inverting input selection
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bit_offset: 5
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bit_size: 2
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- name: TCM_EN
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description: Timer controlled Mux mode enable
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bit_offset: 7
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bit_size: 1
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- name: VMS_SEL
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description: OPAMP inverting input secondary selection
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bit_offset: 8
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bit_size: 1
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- name: VPS_SEL
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description: OPAMP Non inverting input secondary selection
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bit_offset: 9
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bit_size: 2
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- name: CALON
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description: Calibration mode enable
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bit_offset: 11
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bit_size: 1
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- name: CALSEL
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description: Calibration selection
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bit_offset: 12
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bit_size: 2
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- name: PGA_GAIN
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description: Gain in PGA mode
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bit_offset: 14
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bit_size: 4
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- name: USER_TRIM
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description: User trimming enable
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bit_offset: 18
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bit_size: 1
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- name: TRIMOFFSETP
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description: Offset trimming value (PMOS)
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bit_offset: 19
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bit_size: 5
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- name: TRIMOFFSETN
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description: Offset trimming value (NMOS)
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bit_offset: 24
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bit_size: 5
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- name: TSTREF
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description: TSTREF
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bit_offset: 29
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bit_size: 1
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- name: OUTCAL
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description: OPAMP ouput status flag
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bit_offset: 30
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bit_size: 1
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- name: LOCK
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description: OPAMP lock
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bit_offset: 31
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bit_size: 1
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enum/CALSEL:
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bit_size: 2
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variants:
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- name: Percent3_3
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description: VREFOPAMP=3.3% VDDA
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value: 0
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- name: Percent10
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description: VREFOPAMP=10% VDDA
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value: 1
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- name: Percent50
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description: VREFOPAMP=50% VDDA
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value: 2
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- name: Percent90
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description: VREFOPAMP=90% VDDA
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value: 3
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- name: Percent3_3
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description: VREFOPAMP=3.3% VDDA
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value: 0
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- name: Percent10
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description: VREFOPAMP=10% VDDA
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value: 1
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- name: Percent50
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description: VREFOPAMP=50% VDDA
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value: 2
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- name: Percent90
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description: VREFOPAMP=90% VDDA
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value: 3
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enum/FORCE_VP:
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bit_size: 1
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variants:
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- name: Normal
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description: Normal operating mode
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value: 0
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- name: Calibration
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description: Calibration mode. Non-inverting input connected to calibration reference
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value: 1
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- name: Normal
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description: Normal operating mode
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value: 0
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- name: Calibration
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description: Calibration mode. Non-inverting input connected to calibration reference
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value: 1
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enum/LOCK:
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bit_size: 1
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variants:
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- name: Unlocked
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description: Comparator CSR bits are read-write
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value: 0
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- name: Locked
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description: Comparator CSR bits are read-only
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value: 1
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- name: Unlocked
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description: Comparator CSR bits are read-write
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value: 0
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- name: Locked
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description: Comparator CSR bits are read-only
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value: 1
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enum/OUTCAL:
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bit_size: 1
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variants:
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- name: Low
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description: Non-inverting < inverting
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value: 0
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- name: High
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description: Non-inverting > inverting
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value: 1
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- name: Low
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description: Non-inverting < inverting
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value: 0
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- name: High
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description: Non-inverting > inverting
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value: 1
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enum/PGA_GAIN:
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bit_size: 4
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variants:
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- name: Gain2
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description: Gain 2
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value: 0
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- name: Gain4
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description: Gain 4
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value: 1
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- name: Gain8
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description: Gain 8
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value: 2
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- name: Gain16
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description: Gain 16
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value: 4
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- name: Gain2_VM0
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description: "Gain 2, feedback connected to VM0"
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value: 8
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- name: Gain4_VM0
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description: "Gain 4, feedback connected to VM0"
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value: 9
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- name: Gain8_VM0
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description: "Gain 8, feedback connected to VM0"
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value: 10
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- name: Gain16_VM0
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description: "Gain 16, feedback connected to VM0"
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value: 11
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- name: Gain2_VM1
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description: "Gain 2, feedback connected to VM1"
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value: 12
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- name: Gain4_VM1
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description: "Gain 4, feedback connected to VM1"
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value: 13
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- name: Gain8_VM1
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description: "Gain 8, feedback connected to VM1"
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value: 14
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- name: Gain16_VM1
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description: "Gain 16, feedback connected to VM1"
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value: 15
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- name: Gain2
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description: Gain 2
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value: 0
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- name: Gain4
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description: Gain 4
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value: 1
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- name: Gain8
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description: Gain 8
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value: 2
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- name: Gain16
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description: Gain 16
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value: 4
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- name: Gain2_VM0
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description: Gain 2, feedback connected to VM0
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value: 8
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- name: Gain4_VM0
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description: Gain 4, feedback connected to VM0
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value: 9
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- name: Gain8_VM0
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description: Gain 8, feedback connected to VM0
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value: 10
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- name: Gain16_VM0
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description: Gain 16, feedback connected to VM0
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value: 11
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- name: Gain2_VM1
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description: Gain 2, feedback connected to VM1
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value: 12
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- name: Gain4_VM1
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description: Gain 4, feedback connected to VM1
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value: 13
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- name: Gain8_VM1
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description: Gain 8, feedback connected to VM1
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value: 14
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- name: Gain16_VM1
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description: Gain 16, feedback connected to VM1
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value: 15
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enum/TSTREF:
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bit_size: 1
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variants:
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- name: Output
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description: VREFOPAMP2 is output
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value: 0
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- name: NotOutput
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description: VREFOPAMP2 is not output
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value: 1
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- name: Output
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description: VREFOPAMP2 is output
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value: 0
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- name: NotOutput
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description: VREFOPAMP2 is not output
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value: 1
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enum/VMS_SEL:
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bit_size: 1
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variants:
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- name: PC5
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description: PC5 (VM0) used as OPAMP2 inverting input when TCM_EN=1
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value: 0
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- name: PA5
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description: PA5 (VM1) used as OPAMP2 inverting input when TCM_EN=1
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value: 1
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- name: PC5
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description: PC5 (VM0) used as OPAMP2 inverting input when TCM_EN=1
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value: 0
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- name: PA5
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description: PA5 (VM1) used as OPAMP2 inverting input when TCM_EN=1
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value: 1
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enum/VM_SEL:
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bit_size: 2
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variants:
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- name: PC5
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description: PC5 (VM0) used as OPAMP2 inverting input
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value: 0
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- name: PA5
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description: PA5 (VM1) used as OPAMP2 inverting input
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value: 1
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- name: PGA
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description: Resistor feedback output (PGA mode)
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value: 2
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- name: Follower
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description: Follower mode
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value: 3
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- name: PC5
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description: PC5 (VM0) used as OPAMP2 inverting input
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value: 0
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- name: PA5
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description: PA5 (VM1) used as OPAMP2 inverting input
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value: 1
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- name: PGA
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description: Resistor feedback output (PGA mode)
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value: 2
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- name: Follower
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description: Follower mode
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value: 3
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enum/VPS_SEL:
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bit_size: 2
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variants:
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- name: PB14
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description: PB14 used as OPAMP2 non-inverting input when TCM_EN=1
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value: 1
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- name: PB0
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description: PB0 used as OPAMP2 non-inverting input when TCM_EN=1
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value: 2
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- name: PA7
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description: PA7 used as OPAMP2 non-inverting input when TCM_EN=1
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value: 3
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- name: PB14
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description: PB14 used as OPAMP2 non-inverting input when TCM_EN=1
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value: 1
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- name: PB0
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description: PB0 used as OPAMP2 non-inverting input when TCM_EN=1
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value: 2
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- name: PA7
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description: PA7 used as OPAMP2 non-inverting input when TCM_EN=1
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value: 3
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enum/VP_SEL:
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bit_size: 2
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variants:
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- name: PB14
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description: PB14 used as OPAMP2 non-inverting input
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value: 1
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- name: PB0
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description: PB0 used as OPAMP2 non-inverting input
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value: 2
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- name: PA7
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description: PA7 used as OPAMP2 non-inverting input
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value: 3
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- name: PB14
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description: PB14 used as OPAMP2 non-inverting input
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value: 1
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- name: PB0
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description: PB0 used as OPAMP2 non-inverting input
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value: 2
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- name: PA7
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description: PA7 used as OPAMP2 non-inverting input
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value: 3
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@ -1,298 +1,297 @@
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---
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block/OPAMP:
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description: Operational amplifiers
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items:
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- name: OPAMP_CSR
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description: OPAMP control/status register
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byte_offset: 0
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fieldset: OPAMP_CSR
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- name: OPAMP_TCMR
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description: OPAMP control/status register
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byte_offset: 24
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fieldset: OPAMP_TCMR
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- name: OPAMP_CSR
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description: OPAMP control/status register
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byte_offset: 0
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fieldset: OPAMP_CSR
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- name: OPAMP_TCMR
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description: OPAMP control/status register
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byte_offset: 24
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fieldset: OPAMP_TCMR
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fieldset/OPAMP_CSR:
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description: OPAMP control/status register
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fields:
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- name: OPAEN
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description: Operational amplifier Enable
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bit_offset: 0
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bit_size: 1
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- name: FORCE_VP
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description: FORCE_VP
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bit_offset: 1
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bit_size: 1
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enum: OPAMP_CSR_FORCE_VP
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- name: VP_SEL
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description: VP_SEL
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bit_offset: 2
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bit_size: 2
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enum: OPAMP_CSR_VP_SEL
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- name: USERTRIM
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description: USERTRIM
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bit_offset: 4
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bit_size: 1
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enum: OPAMP_CSR_USERTRIM
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- name: VM_SEL
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description: VM_SEL
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bit_offset: 5
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bit_size: 2
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enum: OPAMP_CSR_VM_SEL
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- name: OPAHSM
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description: OPAHSM
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bit_offset: 7
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bit_size: 1
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enum: OPAMP_CSR_OPAHSM
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- name: OPAINTOEN
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description: OPAINTOEN
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bit_offset: 8
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bit_size: 1
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enum: OPAMP_CSR_OPAINTOEN
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- name: CALON
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description: CALON
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bit_offset: 11
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bit_size: 1
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- name: CALSEL
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description: CALSEL
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bit_offset: 12
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bit_size: 2
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enum: OPAMP_CSR_CALSEL
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- name: PGA_GAIN
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description: PGA_GAIN
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bit_offset: 14
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bit_size: 5
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enum: OPAMP_CSR_PGA_GAIN
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- name: TRIMOFFSETP
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description: TRIMOFFSETP
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bit_offset: 19
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bit_size: 5
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- name: TRIMOFFSETN
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description: TRIMOFFSETN
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bit_offset: 24
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bit_size: 5
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- name: CALOUT
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description: CALOUT
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bit_offset: 30
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bit_size: 1
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- name: LOCK
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description: LOCK
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bit_offset: 31
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bit_size: 1
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enum: OPAMP_CSR_LOCK
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- name: OPAEN
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description: Operational amplifier Enable
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bit_offset: 0
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bit_size: 1
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- name: FORCE_VP
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description: FORCE_VP
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bit_offset: 1
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bit_size: 1
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enum: OPAMP_CSR_FORCE_VP
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- name: VP_SEL
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description: VP_SEL
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bit_offset: 2
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bit_size: 2
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enum: OPAMP_CSR_VP_SEL
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- name: USERTRIM
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description: USERTRIM
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bit_offset: 4
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bit_size: 1
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enum: OPAMP_CSR_USERTRIM
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- name: VM_SEL
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description: VM_SEL
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bit_offset: 5
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bit_size: 2
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enum: OPAMP_CSR_VM_SEL
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- name: OPAHSM
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description: OPAHSM
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bit_offset: 7
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bit_size: 1
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enum: OPAMP_CSR_OPAHSM
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- name: OPAINTOEN
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description: OPAINTOEN
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bit_offset: 8
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bit_size: 1
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enum: OPAMP_CSR_OPAINTOEN
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- name: CALON
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description: CALON
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bit_offset: 11
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bit_size: 1
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- name: CALSEL
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description: CALSEL
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bit_offset: 12
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bit_size: 2
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enum: OPAMP_CSR_CALSEL
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- name: PGA_GAIN
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description: PGA_GAIN
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bit_offset: 14
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bit_size: 5
|
||||
enum: OPAMP_CSR_PGA_GAIN
|
||||
- name: TRIMOFFSETP
|
||||
description: TRIMOFFSETP
|
||||
bit_offset: 19
|
||||
bit_size: 5
|
||||
- name: TRIMOFFSETN
|
||||
description: TRIMOFFSETN
|
||||
bit_offset: 24
|
||||
bit_size: 5
|
||||
- name: CALOUT
|
||||
description: CALOUT
|
||||
bit_offset: 30
|
||||
bit_size: 1
|
||||
- name: LOCK
|
||||
description: LOCK
|
||||
bit_offset: 31
|
||||
bit_size: 1
|
||||
enum: OPAMP_CSR_LOCK
|
||||
fieldset/OPAMP_TCMR:
|
||||
description: OPAMP timer controlled mode register
|
||||
fields:
|
||||
- name: VMS_SEL
|
||||
description: VMS_SEL
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
- name: VPS_SEL
|
||||
description: VPS_SEL
|
||||
bit_offset: 1
|
||||
bit_size: 2
|
||||
enum: OPAMP_TCMR_VPS_SEL
|
||||
- name: T1CM_EN
|
||||
description: T1CM_EN
|
||||
bit_offset: 3
|
||||
bit_size: 1
|
||||
- name: T8CM_EN
|
||||
description: T8CM_EN
|
||||
bit_offset: 4
|
||||
bit_size: 1
|
||||
- name: T20CM_EN
|
||||
description: T20CM_EN
|
||||
bit_offset: 5
|
||||
bit_size: 1
|
||||
- name: LOCK
|
||||
description: LOCK
|
||||
bit_offset: 31
|
||||
bit_size: 1
|
||||
enum: OPAMP_TCMR_LOCK
|
||||
- name: VMS_SEL
|
||||
description: VMS_SEL
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
- name: VPS_SEL
|
||||
description: VPS_SEL
|
||||
bit_offset: 1
|
||||
bit_size: 2
|
||||
enum: OPAMP_TCMR_VPS_SEL
|
||||
- name: T1CM_EN
|
||||
description: T1CM_EN
|
||||
bit_offset: 3
|
||||
bit_size: 1
|
||||
- name: T8CM_EN
|
||||
description: T8CM_EN
|
||||
bit_offset: 4
|
||||
bit_size: 1
|
||||
- name: T20CM_EN
|
||||
description: T20CM_EN
|
||||
bit_offset: 5
|
||||
bit_size: 1
|
||||
- name: LOCK
|
||||
description: LOCK
|
||||
bit_offset: 31
|
||||
bit_size: 1
|
||||
enum: OPAMP_TCMR_LOCK
|
||||
enum/OPAMP_CSR_CALSEL:
|
||||
bit_size: 2
|
||||
variants:
|
||||
- name: Percent3_3
|
||||
description: 0.033*VDDA applied to OPAMP inputs during calibration
|
||||
value: 0
|
||||
- name: Percent10
|
||||
description: 0.1*VDDA applied to OPAMP inputs during calibration
|
||||
value: 1
|
||||
- name: Percent50
|
||||
description: 0.5*VDDA applied to OPAMP inputs during calibration
|
||||
value: 2
|
||||
- name: Percent90
|
||||
description: 0.9*VDDA applied to OPAMP inputs during calibration
|
||||
value: 3
|
||||
- name: Percent3_3
|
||||
description: 0.033*VDDA applied to OPAMP inputs during calibration
|
||||
value: 0
|
||||
- name: Percent10
|
||||
description: 0.1*VDDA applied to OPAMP inputs during calibration
|
||||
value: 1
|
||||
- name: Percent50
|
||||
description: 0.5*VDDA applied to OPAMP inputs during calibration
|
||||
value: 2
|
||||
- name: Percent90
|
||||
description: 0.9*VDDA applied to OPAMP inputs during calibration
|
||||
value: 3
|
||||
enum/OPAMP_CSR_FORCE_VP:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: Normal
|
||||
description: Non-inverting input connected configured inputs
|
||||
value: 0
|
||||
- name: CalibrationVerification
|
||||
description: Non-inverting input connected to calibration reference voltage
|
||||
value: 1
|
||||
- name: Normal
|
||||
description: Non-inverting input connected configured inputs
|
||||
value: 0
|
||||
- name: CalibrationVerification
|
||||
description: Non-inverting input connected to calibration reference voltage
|
||||
value: 1
|
||||
enum/OPAMP_CSR_LOCK:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: ReadWrite
|
||||
description: CSR is read-write
|
||||
value: 0
|
||||
- name: ReadOnly
|
||||
description: "CSR is read-only, can only be cleared by system reset"
|
||||
value: 1
|
||||
- name: ReadWrite
|
||||
description: CSR is read-write
|
||||
value: 0
|
||||
- name: ReadOnly
|
||||
description: CSR is read-only, can only be cleared by system reset
|
||||
value: 1
|
||||
enum/OPAMP_CSR_OPAHSM:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: Normal
|
||||
description: OpAmp in normal mode
|
||||
value: 0
|
||||
- name: HighSpeed
|
||||
description: OpAmp in high speed mode
|
||||
value: 1
|
||||
- name: Normal
|
||||
description: OpAmp in normal mode
|
||||
value: 0
|
||||
- name: HighSpeed
|
||||
description: OpAmp in high speed mode
|
||||
value: 1
|
||||
enum/OPAMP_CSR_OPAINTOEN:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: OutputPin
|
||||
description: Output is connected to the output Pin
|
||||
value: 0
|
||||
- name: ADCChannel
|
||||
description: Output is connected internally to ADC channel
|
||||
value: 1
|
||||
- name: OutputPin
|
||||
description: Output is connected to the output Pin
|
||||
value: 0
|
||||
- name: ADCChannel
|
||||
description: Output is connected internally to ADC channel
|
||||
value: 1
|
||||
enum/OPAMP_CSR_PGA_GAIN:
|
||||
bit_size: 5
|
||||
variants:
|
||||
- name: Gain2
|
||||
description: Gain 2
|
||||
value: 0
|
||||
- name: Gain4
|
||||
description: Gain 4
|
||||
value: 1
|
||||
- name: Gain8
|
||||
description: Gain 8
|
||||
value: 2
|
||||
- name: Gain16
|
||||
description: Gain 16
|
||||
value: 3
|
||||
- name: Gain32
|
||||
description: Gain 32
|
||||
value: 4
|
||||
- name: Gain64
|
||||
description: Gain 64
|
||||
value: 5
|
||||
- name: Gain2_InputVINM0
|
||||
description: "Gain 2, input/bias connected to VINM0 or inverting gain"
|
||||
value: 8
|
||||
- name: Gain4_InputVINM0
|
||||
description: "Gain 4, input/bias connected to VINM0 or inverting gain"
|
||||
value: 9
|
||||
- name: Gain8_InputVINM0
|
||||
description: "Gain 8, input/bias connected to VINM0 or inverting gain"
|
||||
value: 10
|
||||
- name: Gain16_InputVINM0
|
||||
description: "Gain 16, input/bias connected to VINM0 or inverting gain"
|
||||
value: 11
|
||||
- name: Gain32_InputVINM0
|
||||
description: "Gain 32, input/bias connected to VINM0 or inverting gain"
|
||||
value: 12
|
||||
- name: Gain64_InputVINM0
|
||||
description: "Gain 64, input/bias connected to VINM0 or inverting gain"
|
||||
value: 13
|
||||
- name: Gain2_FilteringVINM0
|
||||
description: "Gain 2, with filtering on VINM0"
|
||||
value: 16
|
||||
- name: Gain4_FilteringVINM0
|
||||
description: "Gain 4, with filtering on VINM0"
|
||||
value: 17
|
||||
- name: Gain8_FilteringVINM0
|
||||
description: "Gain 8, with filtering on VINM0"
|
||||
value: 18
|
||||
- name: Gain16_FilteringVINM0
|
||||
description: "Gain 16, with filtering on VINM0"
|
||||
value: 19
|
||||
- name: Gain32_FilteringVINM0
|
||||
description: "Gain 32, with filtering on VINM0"
|
||||
value: 20
|
||||
- name: Gain64_FilteringVINM0
|
||||
description: "Gain 64, with filtering on VINM0"
|
||||
value: 21
|
||||
- name: Gain2_InputVINM0FilteringVINM1
|
||||
description: "Gain 2, input/bias connected to VINM0 with filtering on VINM1 or inverting gain"
|
||||
value: 24
|
||||
- name: Gain4_InputVINM0FilteringVINM1
|
||||
description: "Gain 4, input/bias connected to VINM0 with filtering on VINM1 or inverting gain"
|
||||
value: 25
|
||||
- name: Gain8_InputVINM0FilteringVINM1
|
||||
description: "Gain 8, input/bias connected to VINM0 with filtering on VINM1 or inverting gain"
|
||||
value: 26
|
||||
- name: Gain16_InputVINM0FilteringVINM1
|
||||
description: "Gain 16, input/bias connected to VINM0 with filtering on VINM1 or inverting gain"
|
||||
value: 27
|
||||
- name: Gain32_InputVINM0FilteringVINM1
|
||||
description: "Gain 32, input/bias connected to VINM0 with filtering on VINM1 or inverting gain"
|
||||
value: 28
|
||||
- name: Gain64_InputVINM0FilteringVINM1
|
||||
description: "Gain 64, input/bias connected to VINM0 with filtering on VINM1 or inverting gain"
|
||||
value: 29
|
||||
- name: Gain2
|
||||
description: Gain 2
|
||||
value: 0
|
||||
- name: Gain4
|
||||
description: Gain 4
|
||||
value: 1
|
||||
- name: Gain8
|
||||
description: Gain 8
|
||||
value: 2
|
||||
- name: Gain16
|
||||
description: Gain 16
|
||||
value: 3
|
||||
- name: Gain32
|
||||
description: Gain 32
|
||||
value: 4
|
||||
- name: Gain64
|
||||
description: Gain 64
|
||||
value: 5
|
||||
- name: Gain2_InputVINM0
|
||||
description: Gain 2, input/bias connected to VINM0 or inverting gain
|
||||
value: 8
|
||||
- name: Gain4_InputVINM0
|
||||
description: Gain 4, input/bias connected to VINM0 or inverting gain
|
||||
value: 9
|
||||
- name: Gain8_InputVINM0
|
||||
description: Gain 8, input/bias connected to VINM0 or inverting gain
|
||||
value: 10
|
||||
- name: Gain16_InputVINM0
|
||||
description: Gain 16, input/bias connected to VINM0 or inverting gain
|
||||
value: 11
|
||||
- name: Gain32_InputVINM0
|
||||
description: Gain 32, input/bias connected to VINM0 or inverting gain
|
||||
value: 12
|
||||
- name: Gain64_InputVINM0
|
||||
description: Gain 64, input/bias connected to VINM0 or inverting gain
|
||||
value: 13
|
||||
- name: Gain2_FilteringVINM0
|
||||
description: Gain 2, with filtering on VINM0
|
||||
value: 16
|
||||
- name: Gain4_FilteringVINM0
|
||||
description: Gain 4, with filtering on VINM0
|
||||
value: 17
|
||||
- name: Gain8_FilteringVINM0
|
||||
description: Gain 8, with filtering on VINM0
|
||||
value: 18
|
||||
- name: Gain16_FilteringVINM0
|
||||
description: Gain 16, with filtering on VINM0
|
||||
value: 19
|
||||
- name: Gain32_FilteringVINM0
|
||||
description: Gain 32, with filtering on VINM0
|
||||
value: 20
|
||||
- name: Gain64_FilteringVINM0
|
||||
description: Gain 64, with filtering on VINM0
|
||||
value: 21
|
||||
- name: Gain2_InputVINM0FilteringVINM1
|
||||
description: Gain 2, input/bias connected to VINM0 with filtering on VINM1 or inverting gain
|
||||
value: 24
|
||||
- name: Gain4_InputVINM0FilteringVINM1
|
||||
description: Gain 4, input/bias connected to VINM0 with filtering on VINM1 or inverting gain
|
||||
value: 25
|
||||
- name: Gain8_InputVINM0FilteringVINM1
|
||||
description: Gain 8, input/bias connected to VINM0 with filtering on VINM1 or inverting gain
|
||||
value: 26
|
||||
- name: Gain16_InputVINM0FilteringVINM1
|
||||
description: Gain 16, input/bias connected to VINM0 with filtering on VINM1 or inverting gain
|
||||
value: 27
|
||||
- name: Gain32_InputVINM0FilteringVINM1
|
||||
description: Gain 32, input/bias connected to VINM0 with filtering on VINM1 or inverting gain
|
||||
value: 28
|
||||
- name: Gain64_InputVINM0FilteringVINM1
|
||||
description: Gain 64, input/bias connected to VINM0 with filtering on VINM1 or inverting gain
|
||||
value: 29
|
||||
enum/OPAMP_CSR_USERTRIM:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: Factory
|
||||
description: Factory trim used
|
||||
value: 0
|
||||
- name: User
|
||||
description: User trim used
|
||||
value: 1
|
||||
- name: Factory
|
||||
description: Factory trim used
|
||||
value: 0
|
||||
- name: User
|
||||
description: User trim used
|
||||
value: 1
|
||||
enum/OPAMP_CSR_VM_SEL:
|
||||
bit_size: 2
|
||||
variants:
|
||||
- name: VINM0
|
||||
description: VINM0 connected to VINM input
|
||||
value: 0
|
||||
- name: VINM1
|
||||
description: VINM1 connected to VINM input
|
||||
value: 1
|
||||
- name: PGA
|
||||
description: Feedback resistor connected to VINM (PGA mode)
|
||||
value: 2
|
||||
- name: Output
|
||||
description: OpAmp output connected to VINM (Follower mode)
|
||||
value: 3
|
||||
- name: VINM0
|
||||
description: VINM0 connected to VINM input
|
||||
value: 0
|
||||
- name: VINM1
|
||||
description: VINM1 connected to VINM input
|
||||
value: 1
|
||||
- name: PGA
|
||||
description: Feedback resistor connected to VINM (PGA mode)
|
||||
value: 2
|
||||
- name: Output
|
||||
description: OpAmp output connected to VINM (Follower mode)
|
||||
value: 3
|
||||
enum/OPAMP_CSR_VP_SEL:
|
||||
bit_size: 2
|
||||
variants:
|
||||
- name: VINP0
|
||||
description: VINP0 connected to VINP input
|
||||
value: 0
|
||||
- name: VINP1
|
||||
description: VINP1 connected to VINP input
|
||||
value: 1
|
||||
- name: VINP2
|
||||
description: VINP2 connected to VINP input
|
||||
value: 2
|
||||
- name: DAC3_CH1
|
||||
description: DAC3_CH1 connected to VINP input
|
||||
value: 3
|
||||
- name: VINP0
|
||||
description: VINP0 connected to VINP input
|
||||
value: 0
|
||||
- name: VINP1
|
||||
description: VINP1 connected to VINP input
|
||||
value: 1
|
||||
- name: VINP2
|
||||
description: VINP2 connected to VINP input
|
||||
value: 2
|
||||
- name: DAC3_CH1
|
||||
description: DAC3_CH1 connected to VINP input
|
||||
value: 3
|
||||
enum/OPAMP_TCMR_LOCK:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: ReadWrite
|
||||
description: TCMR is read-write
|
||||
value: 0
|
||||
- name: ReadOnly
|
||||
description: "TCMR is read-only, can only be cleared by system reset"
|
||||
value: 1
|
||||
- name: ReadWrite
|
||||
description: TCMR is read-write
|
||||
value: 0
|
||||
- name: ReadOnly
|
||||
description: TCMR is read-only, can only be cleared by system reset
|
||||
value: 1
|
||||
enum/OPAMP_TCMR_VPS_SEL:
|
||||
bit_size: 2
|
||||
variants:
|
||||
- name: VINP0
|
||||
description: VINP0 connected to VINP input
|
||||
value: 0
|
||||
- name: VINP1
|
||||
description: VINP1 connected to VINP input
|
||||
value: 1
|
||||
- name: VINP2
|
||||
description: VINP2 connected to VINP input
|
||||
value: 2
|
||||
- name: DAC3_CH1
|
||||
description: DAC3_CH1 connected to VINP input
|
||||
value: 3
|
||||
- name: VINP0
|
||||
description: VINP0 connected to VINP input
|
||||
value: 0
|
||||
- name: VINP1
|
||||
description: VINP1 connected to VINP input
|
||||
value: 1
|
||||
- name: VINP2
|
||||
description: VINP2 connected to VINP input
|
||||
value: 2
|
||||
- name: DAC3_CH1
|
||||
description: DAC3_CH1 connected to VINP input
|
||||
value: 3
|
||||
|
@ -808,12 +808,12 @@ enum/LSEDRV:
|
||||
- name: Low
|
||||
description: Low driving capability
|
||||
value: 0
|
||||
- name: MediumLow
|
||||
description: Medium low driving capability
|
||||
value: 2
|
||||
- name: MediumHigh
|
||||
description: Medium high driving capability
|
||||
value: 1
|
||||
- name: MediumLow
|
||||
description: Medium low driving capability
|
||||
value: 2
|
||||
- name: High
|
||||
description: High driving capability
|
||||
value: 3
|
||||
|
@ -959,12 +959,12 @@ enum/LSEDRV:
|
||||
- name: Low
|
||||
description: Low driving capability
|
||||
value: 0
|
||||
- name: MediumLow
|
||||
description: Medium low driving capability
|
||||
value: 2
|
||||
- name: MediumHigh
|
||||
description: Medium high driving capability
|
||||
value: 1
|
||||
- name: MediumLow
|
||||
description: Medium low driving capability
|
||||
value: 2
|
||||
- name: High
|
||||
description: High driving capability
|
||||
value: 3
|
||||
|
@ -935,12 +935,12 @@ enum/LSEDRV:
|
||||
- name: Low
|
||||
description: Low driving capability
|
||||
value: 0
|
||||
- name: MediumLow
|
||||
description: Medium low driving capability
|
||||
value: 2
|
||||
- name: MediumHigh
|
||||
description: Medium high driving capability
|
||||
value: 1
|
||||
- name: MediumLow
|
||||
description: Medium low driving capability
|
||||
value: 2
|
||||
- name: High
|
||||
description: High driving capability
|
||||
value: 3
|
||||
|
@ -1799,12 +1799,12 @@ enum/LSEDRV:
|
||||
- name: Low
|
||||
description: Low driving capability
|
||||
value: 0
|
||||
- name: MediumLow
|
||||
description: Medium low driving capability
|
||||
value: 2
|
||||
- name: MediumHigh
|
||||
description: Medium high driving capability
|
||||
value: 1
|
||||
- name: MediumLow
|
||||
description: Medium low driving capability
|
||||
value: 2
|
||||
- name: High
|
||||
description: High driving capability
|
||||
value: 3
|
||||
|
@ -3714,12 +3714,12 @@ enum/LSEDRV:
|
||||
- name: Low
|
||||
description: Low driving capability
|
||||
value: 0
|
||||
- name: MediumLow
|
||||
description: Medium low driving capability
|
||||
value: 2
|
||||
- name: MediumHigh
|
||||
description: Medium high driving capability
|
||||
value: 1
|
||||
- name: MediumLow
|
||||
description: Medium low driving capability
|
||||
value: 2
|
||||
- name: High
|
||||
description: High driving capability
|
||||
value: 3
|
||||
|
@ -1685,6 +1685,21 @@ enum/HPRE:
|
||||
- name: Div512
|
||||
description: hclk = SYSCLK divided by 256
|
||||
value: 15
|
||||
enum/LSEDRV:
|
||||
bit_size: 2
|
||||
variants:
|
||||
- name: Low
|
||||
description: Low driving capability
|
||||
value: 0
|
||||
- name: MediumLow
|
||||
description: Medium low driving capability
|
||||
value: 1
|
||||
- name: MediumHigh
|
||||
description: Medium high driving capability
|
||||
value: 2
|
||||
- name: High
|
||||
description: High driving capability
|
||||
value: 3
|
||||
enum/PPRE:
|
||||
bit_size: 3
|
||||
variants:
|
||||
@ -1718,18 +1733,3 @@ enum/RTCSEL:
|
||||
- name: HSE
|
||||
description: HSE oscillator clock divided by 32 selected
|
||||
value: 3
|
||||
enum/LSEDRV:
|
||||
bit_size: 2
|
||||
variants:
|
||||
- name: Low
|
||||
description: Low driving capability
|
||||
value: 0
|
||||
- name: MediumLow
|
||||
description: Medium low driving capability
|
||||
value: 1
|
||||
- name: MediumHigh
|
||||
description: Medium high driving capability
|
||||
value: 2
|
||||
- name: High
|
||||
description: High driving capability
|
||||
value: 3
|
||||
|
@ -1486,6 +1486,21 @@ enum/HPRE:
|
||||
- name: Div512
|
||||
description: hclk = SYSCLK divided by 256
|
||||
value: 15
|
||||
enum/LSEDRV:
|
||||
bit_size: 2
|
||||
variants:
|
||||
- name: Low
|
||||
description: Low driving capability
|
||||
value: 0
|
||||
- name: MediumLow
|
||||
description: Medium low driving capability
|
||||
value: 1
|
||||
- name: MediumHigh
|
||||
description: Medium high driving capability
|
||||
value: 2
|
||||
- name: High
|
||||
description: High driving capability
|
||||
value: 3
|
||||
enum/MCOPRE:
|
||||
bit_size: 3
|
||||
variants:
|
||||
@ -1570,18 +1585,3 @@ enum/RTCSEL:
|
||||
- name: HSE
|
||||
description: HSE oscillator clock divided by 32 selected
|
||||
value: 3
|
||||
enum/LSEDRV:
|
||||
bit_size: 2
|
||||
variants:
|
||||
- name: Low
|
||||
description: Low driving capability
|
||||
value: 0
|
||||
- name: MediumLow
|
||||
description: Medium low driving capability
|
||||
value: 1
|
||||
- name: MediumHigh
|
||||
description: Medium high driving capability
|
||||
value: 2
|
||||
- name: High
|
||||
description: High driving capability
|
||||
value: 3
|
||||
|
@ -1108,6 +1108,21 @@ enum/HPRE:
|
||||
- name: Div512
|
||||
description: hclk = SYSCLK divided by 256
|
||||
value: 15
|
||||
enum/LSEDRV:
|
||||
bit_size: 2
|
||||
variants:
|
||||
- name: Low
|
||||
description: Low driving capability
|
||||
value: 0
|
||||
- name: MediumLow
|
||||
description: Medium low driving capability
|
||||
value: 1
|
||||
- name: MediumHigh
|
||||
description: Medium high driving capability
|
||||
value: 2
|
||||
- name: High
|
||||
description: High driving capability
|
||||
value: 3
|
||||
enum/MCOPRE:
|
||||
bit_size: 3
|
||||
variants:
|
||||
@ -1192,18 +1207,3 @@ enum/RTCSEL:
|
||||
- name: HSE
|
||||
description: HSE oscillator clock divided by 32 selected
|
||||
value: 3
|
||||
enum/LSEDRV:
|
||||
bit_size: 2
|
||||
variants:
|
||||
- name: Low
|
||||
description: Low driving capability
|
||||
value: 0
|
||||
- name: MediumLow
|
||||
description: Medium low driving capability
|
||||
value: 1
|
||||
- name: MediumHigh
|
||||
description: Medium high driving capability
|
||||
value: 2
|
||||
- name: High
|
||||
description: High driving capability
|
||||
value: 3
|
||||
|
@ -1,256 +1,256 @@
|
||||
block/TAMP:
|
||||
description: Tamper and backup registers
|
||||
items:
|
||||
- name: CR1
|
||||
description: control register 1
|
||||
byte_offset: 0
|
||||
fieldset: CR1
|
||||
- name: CR2
|
||||
description: control register 2
|
||||
byte_offset: 4
|
||||
fieldset: CR2
|
||||
- name: FLTCR
|
||||
description: TAMP filter control register
|
||||
byte_offset: 12
|
||||
fieldset: FLTCR
|
||||
- name: IER
|
||||
description: TAMP interrupt enable register
|
||||
byte_offset: 44
|
||||
fieldset: IER
|
||||
- name: SR
|
||||
description: TAMP status register
|
||||
byte_offset: 48
|
||||
access: Read
|
||||
fieldset: SR
|
||||
- name: MISR
|
||||
description: TAMP masked interrupt status register
|
||||
byte_offset: 52
|
||||
access: Read
|
||||
fieldset: MISR
|
||||
- name: SCR
|
||||
description: TAMP status clear register
|
||||
byte_offset: 60
|
||||
access: Write
|
||||
fieldset: SCR
|
||||
- name: BKPR
|
||||
description: TAMP backup register
|
||||
array:
|
||||
len: 5
|
||||
stride: 4
|
||||
byte_offset: 256
|
||||
fieldset: BKPR
|
||||
- name: HWCFGR2
|
||||
description: TAMP hardware configuration register 2
|
||||
byte_offset: 1004
|
||||
access: Read
|
||||
fieldset: HWCFGR2
|
||||
- name: HWCFGR1
|
||||
description: TAMP hardware configuration register 1
|
||||
byte_offset: 1008
|
||||
access: Read
|
||||
fieldset: HWCFGR1
|
||||
- name: VERR
|
||||
description: EXTI IP Version register
|
||||
byte_offset: 1012
|
||||
access: Read
|
||||
fieldset: VERR
|
||||
- name: IPIDR
|
||||
description: EXTI Identification register
|
||||
byte_offset: 1016
|
||||
access: Read
|
||||
fieldset: IPIDR
|
||||
- name: SIDR
|
||||
description: EXTI Size ID register
|
||||
byte_offset: 1020
|
||||
access: Read
|
||||
fieldset: SIDR
|
||||
- name: CR1
|
||||
description: control register 1
|
||||
byte_offset: 0
|
||||
fieldset: CR1
|
||||
- name: CR2
|
||||
description: control register 2
|
||||
byte_offset: 4
|
||||
fieldset: CR2
|
||||
- name: FLTCR
|
||||
description: TAMP filter control register
|
||||
byte_offset: 12
|
||||
fieldset: FLTCR
|
||||
- name: IER
|
||||
description: TAMP interrupt enable register
|
||||
byte_offset: 44
|
||||
fieldset: IER
|
||||
- name: SR
|
||||
description: TAMP status register
|
||||
byte_offset: 48
|
||||
access: Read
|
||||
fieldset: SR
|
||||
- name: MISR
|
||||
description: TAMP masked interrupt status register
|
||||
byte_offset: 52
|
||||
access: Read
|
||||
fieldset: MISR
|
||||
- name: SCR
|
||||
description: TAMP status clear register
|
||||
byte_offset: 60
|
||||
access: Write
|
||||
fieldset: SCR
|
||||
- name: BKPR
|
||||
description: TAMP backup register
|
||||
array:
|
||||
len: 5
|
||||
stride: 4
|
||||
byte_offset: 256
|
||||
fieldset: BKPR
|
||||
- name: HWCFGR2
|
||||
description: TAMP hardware configuration register 2
|
||||
byte_offset: 1004
|
||||
access: Read
|
||||
fieldset: HWCFGR2
|
||||
- name: HWCFGR1
|
||||
description: TAMP hardware configuration register 1
|
||||
byte_offset: 1008
|
||||
access: Read
|
||||
fieldset: HWCFGR1
|
||||
- name: VERR
|
||||
description: EXTI IP Version register
|
||||
byte_offset: 1012
|
||||
access: Read
|
||||
fieldset: VERR
|
||||
- name: IPIDR
|
||||
description: EXTI Identification register
|
||||
byte_offset: 1016
|
||||
access: Read
|
||||
fieldset: IPIDR
|
||||
- name: SIDR
|
||||
description: EXTI Size ID register
|
||||
byte_offset: 1020
|
||||
access: Read
|
||||
fieldset: SIDR
|
||||
fieldset/BKPR:
|
||||
description: TAMP backup register
|
||||
fields:
|
||||
- name: BKP
|
||||
description: BKP
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
- name: BKP
|
||||
description: BKP
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/CR1:
|
||||
description: control register 1
|
||||
fields:
|
||||
- name: TAMPE
|
||||
description: Tamper detection on IN X enable
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 2
|
||||
stride: 1
|
||||
- name: ITAMPE
|
||||
description: Internal tamper X enable
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 6
|
||||
stride: 1
|
||||
- name: TAMPE
|
||||
description: Tamper detection on IN X enable
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 2
|
||||
stride: 1
|
||||
- name: ITAMPE
|
||||
description: Internal tamper X enable
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 6
|
||||
stride: 1
|
||||
fieldset/CR2:
|
||||
description: control register 2
|
||||
fields:
|
||||
- name: TAMPNOER
|
||||
description: Tamper X no erase
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 2
|
||||
stride: 1
|
||||
- name: TAMPMSK
|
||||
description: Tamper X mask
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 2
|
||||
stride: 1
|
||||
- name: TAMPTRG
|
||||
description: Active level for tamper X input
|
||||
bit_offset: 24
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 2
|
||||
stride: 1
|
||||
- name: TAMPNOER
|
||||
description: Tamper X no erase
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 2
|
||||
stride: 1
|
||||
- name: TAMPMSK
|
||||
description: Tamper X mask
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 2
|
||||
stride: 1
|
||||
- name: TAMPTRG
|
||||
description: Active level for tamper X input
|
||||
bit_offset: 24
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 2
|
||||
stride: 1
|
||||
fieldset/FLTCR:
|
||||
description: TAMP filter control register
|
||||
fields:
|
||||
- name: TAMPFREQ
|
||||
description: "Tamper sampling frequency. Determines the frequency at which each of the INx inputs are sampled."
|
||||
bit_offset: 0
|
||||
bit_size: 3
|
||||
- name: TAMPFLT
|
||||
description: "INx filter count. These bits determines the number of consecutive samples at the specified level (TAMP*TRG) needed to activate a tamper event. TAMPFLT is valid for each of the INx inputs."
|
||||
bit_offset: 3
|
||||
bit_size: 2
|
||||
- name: TAMPPRCH
|
||||
description: "INx precharge duration. These bit determines the duration of time during which the pull-up/is activated before each sample. TAMPPRCH is valid for each of the INx inputs."
|
||||
bit_offset: 5
|
||||
bit_size: 2
|
||||
- name: TAMPPUDIS
|
||||
description: "INx pull-up disable. This bit determines if each of the TAMPx pins are precharged before each sample."
|
||||
bit_offset: 7
|
||||
bit_size: 1
|
||||
- name: TAMPFREQ
|
||||
description: Tamper sampling frequency. Determines the frequency at which each of the INx inputs are sampled.
|
||||
bit_offset: 0
|
||||
bit_size: 3
|
||||
- name: TAMPFLT
|
||||
description: INx filter count. These bits determines the number of consecutive samples at the specified level (TAMP*TRG) needed to activate a tamper event. TAMPFLT is valid for each of the INx inputs.
|
||||
bit_offset: 3
|
||||
bit_size: 2
|
||||
- name: TAMPPRCH
|
||||
description: INx precharge duration. These bit determines the duration of time during which the pull-up/is activated before each sample. TAMPPRCH is valid for each of the INx inputs.
|
||||
bit_offset: 5
|
||||
bit_size: 2
|
||||
- name: TAMPPUDIS
|
||||
description: INx pull-up disable. This bit determines if each of the TAMPx pins are precharged before each sample.
|
||||
bit_offset: 7
|
||||
bit_size: 1
|
||||
fieldset/HWCFGR1:
|
||||
description: TAMP hardware configuration register 1
|
||||
fields:
|
||||
- name: BACKUP_REGS
|
||||
description: BACKUP_REGS
|
||||
bit_offset: 0
|
||||
bit_size: 8
|
||||
- name: TAMPER
|
||||
description: TAMPER
|
||||
bit_offset: 8
|
||||
bit_size: 4
|
||||
- name: ACTIVE_TAMPER
|
||||
description: ACTIVE_TAMPER
|
||||
bit_offset: 12
|
||||
bit_size: 4
|
||||
- name: INT_TAMPER
|
||||
description: INT_TAMPER
|
||||
bit_offset: 16
|
||||
bit_size: 16
|
||||
- name: BACKUP_REGS
|
||||
description: BACKUP_REGS
|
||||
bit_offset: 0
|
||||
bit_size: 8
|
||||
- name: TAMPER
|
||||
description: TAMPER
|
||||
bit_offset: 8
|
||||
bit_size: 4
|
||||
- name: ACTIVE_TAMPER
|
||||
description: ACTIVE_TAMPER
|
||||
bit_offset: 12
|
||||
bit_size: 4
|
||||
- name: INT_TAMPER
|
||||
description: INT_TAMPER
|
||||
bit_offset: 16
|
||||
bit_size: 16
|
||||
fieldset/HWCFGR2:
|
||||
description: TAMP hardware configuration register 2
|
||||
fields:
|
||||
- name: PTIONREG_OUT
|
||||
description: PTIONREG_OUT
|
||||
bit_offset: 0
|
||||
bit_size: 8
|
||||
- name: TRUST_ZONE
|
||||
description: TRUST_ZONE
|
||||
bit_offset: 8
|
||||
bit_size: 4
|
||||
- name: PTIONREG_OUT
|
||||
description: PTIONREG_OUT
|
||||
bit_offset: 0
|
||||
bit_size: 8
|
||||
- name: TRUST_ZONE
|
||||
description: TRUST_ZONE
|
||||
bit_offset: 8
|
||||
bit_size: 4
|
||||
fieldset/IER:
|
||||
description: TAMP interrupt enable register
|
||||
fields:
|
||||
- name: TAMPIE
|
||||
description: Tamper X interrupt enable
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 2
|
||||
stride: 1
|
||||
- name: ITAMPIE
|
||||
description: Internal tamper X interrupt enable
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 6
|
||||
stride: 1
|
||||
- name: TAMPIE
|
||||
description: Tamper X interrupt enable
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 2
|
||||
stride: 1
|
||||
- name: ITAMPIE
|
||||
description: Internal tamper X interrupt enable
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 6
|
||||
stride: 1
|
||||
fieldset/IPIDR:
|
||||
description: EXTI Identification register
|
||||
fields:
|
||||
- name: IPID
|
||||
description: IP Identification
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
- name: IPID
|
||||
description: IP Identification
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/MISR:
|
||||
description: TAMP masked interrupt status register
|
||||
fields:
|
||||
- name: TAMPMF
|
||||
description: Tamper X interrupt masked flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 2
|
||||
stride: 1
|
||||
- name: ITAMPMF
|
||||
description: Internal tamper X interrupt masked flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 6
|
||||
stride: 1
|
||||
- name: TAMPMF
|
||||
description: Tamper X interrupt masked flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 2
|
||||
stride: 1
|
||||
- name: ITAMPMF
|
||||
description: Internal tamper X interrupt masked flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 6
|
||||
stride: 1
|
||||
fieldset/SCR:
|
||||
description: TAMP status clear register
|
||||
fields:
|
||||
- name: CTAMPF
|
||||
description: Clear tamper X detection flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 2
|
||||
stride: 1
|
||||
- name: CITAMPF
|
||||
description: Clear internal tamper X detection flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 7
|
||||
stride: 1
|
||||
- name: CTAMPF
|
||||
description: Clear tamper X detection flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 2
|
||||
stride: 1
|
||||
- name: CITAMPF
|
||||
description: Clear internal tamper X detection flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 7
|
||||
stride: 1
|
||||
fieldset/SIDR:
|
||||
description: EXTI Size ID register
|
||||
fields:
|
||||
- name: SID
|
||||
description: Size Identification
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
- name: SID
|
||||
description: Size Identification
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/SR:
|
||||
description: TAMP status register
|
||||
fields:
|
||||
- name: TAMPF
|
||||
description: Tamper X detection flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 2
|
||||
stride: 1
|
||||
- name: ITAMPF
|
||||
description: Internal tamper X detection flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 7
|
||||
stride: 1
|
||||
- name: TAMPF
|
||||
description: Tamper X detection flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 2
|
||||
stride: 1
|
||||
- name: ITAMPF
|
||||
description: Internal tamper X detection flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 7
|
||||
stride: 1
|
||||
fieldset/VERR:
|
||||
description: EXTI IP Version register
|
||||
fields:
|
||||
- name: MINREV
|
||||
description: Minor Revision number
|
||||
bit_offset: 0
|
||||
bit_size: 4
|
||||
- name: MAJREV
|
||||
description: Major Revision number
|
||||
bit_offset: 4
|
||||
bit_size: 4
|
||||
- name: MINREV
|
||||
description: Minor Revision number
|
||||
bit_offset: 0
|
||||
bit_size: 4
|
||||
- name: MAJREV
|
||||
description: Major Revision number
|
||||
bit_offset: 4
|
||||
bit_size: 4
|
||||
|
@ -1,175 +1,175 @@
|
||||
block/TAMP:
|
||||
description: Tamper and backup registers
|
||||
items:
|
||||
- name: CR1
|
||||
description: control register 1
|
||||
byte_offset: 0
|
||||
fieldset: CR1
|
||||
- name: CR2
|
||||
description: control register 2
|
||||
byte_offset: 4
|
||||
fieldset: CR2
|
||||
- name: FLTCR
|
||||
description: TAMP filter control register
|
||||
byte_offset: 12
|
||||
fieldset: FLTCR
|
||||
- name: IER
|
||||
description: TAMP interrupt enable register
|
||||
byte_offset: 44
|
||||
fieldset: IER
|
||||
- name: SR
|
||||
description: TAMP status register
|
||||
byte_offset: 48
|
||||
access: Read
|
||||
fieldset: SR
|
||||
- name: MISR
|
||||
description: TAMP masked interrupt status register
|
||||
byte_offset: 52
|
||||
access: Read
|
||||
fieldset: MISR
|
||||
- name: SCR
|
||||
description: TAMP status clear register
|
||||
byte_offset: 60
|
||||
fieldset: SCR
|
||||
- name: BKPR
|
||||
description: TAMP backup register
|
||||
array:
|
||||
len: 32
|
||||
stride: 4
|
||||
byte_offset: 256
|
||||
fieldset: BKPR
|
||||
- name: CR1
|
||||
description: control register 1
|
||||
byte_offset: 0
|
||||
fieldset: CR1
|
||||
- name: CR2
|
||||
description: control register 2
|
||||
byte_offset: 4
|
||||
fieldset: CR2
|
||||
- name: FLTCR
|
||||
description: TAMP filter control register
|
||||
byte_offset: 12
|
||||
fieldset: FLTCR
|
||||
- name: IER
|
||||
description: TAMP interrupt enable register
|
||||
byte_offset: 44
|
||||
fieldset: IER
|
||||
- name: SR
|
||||
description: TAMP status register
|
||||
byte_offset: 48
|
||||
access: Read
|
||||
fieldset: SR
|
||||
- name: MISR
|
||||
description: TAMP masked interrupt status register
|
||||
byte_offset: 52
|
||||
access: Read
|
||||
fieldset: MISR
|
||||
- name: SCR
|
||||
description: TAMP status clear register
|
||||
byte_offset: 60
|
||||
fieldset: SCR
|
||||
- name: BKPR
|
||||
description: TAMP backup register
|
||||
array:
|
||||
len: 32
|
||||
stride: 4
|
||||
byte_offset: 256
|
||||
fieldset: BKPR
|
||||
fieldset/BKPR:
|
||||
description: TAMP backup register
|
||||
fields:
|
||||
- name: BKP
|
||||
description: BKP
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
- name: BKP
|
||||
description: BKP
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/CR1:
|
||||
description: control register 1
|
||||
fields:
|
||||
- name: TAMPE
|
||||
description: Tamper detection on IN X enable
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: ITAMPE
|
||||
description: Internal tamper X enable
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 6
|
||||
stride: 1
|
||||
- name: TAMPE
|
||||
description: Tamper detection on IN X enable
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: ITAMPE
|
||||
description: Internal tamper X enable
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 6
|
||||
stride: 1
|
||||
fieldset/CR2:
|
||||
description: control register 2
|
||||
fields:
|
||||
- name: TAMPNOER
|
||||
description: Tamper X no erase
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: TAMPMSK
|
||||
description: Tamper X mask.
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: TAMPTRG
|
||||
description: Active level for tamper X input.
|
||||
bit_offset: 24
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: TAMPNOER
|
||||
description: Tamper X no erase
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: TAMPMSK
|
||||
description: Tamper X mask.
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: TAMPTRG
|
||||
description: Active level for tamper X input.
|
||||
bit_offset: 24
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
fieldset/FLTCR:
|
||||
description: TAMP filter control register
|
||||
fields:
|
||||
- name: TAMPFREQ
|
||||
description: "Tamper sampling frequency. Determines the frequency at which each of the INx inputs are sampled."
|
||||
bit_offset: 0
|
||||
bit_size: 3
|
||||
- name: TAMPFLT
|
||||
description: "INx filter count. These bits determines the number of consecutive samples at the specified level (TAMP*TRG) needed to activate a tamper event. TAMPFLT is valid for each of the INx inputs."
|
||||
bit_offset: 3
|
||||
bit_size: 2
|
||||
- name: TAMPPRCH
|
||||
description: "INx precharge duration. These bit determines the duration of time during which the pull-up/is activated before each sample. TAMPPRCH is valid for each of the INx inputs."
|
||||
bit_offset: 5
|
||||
bit_size: 2
|
||||
- name: TAMPPUDIS
|
||||
description: "INx pull-up disable. This bit determines if each of the TAMPx pins are precharged before each sample."
|
||||
bit_offset: 7
|
||||
bit_size: 1
|
||||
- name: TAMPFREQ
|
||||
description: Tamper sampling frequency. Determines the frequency at which each of the INx inputs are sampled.
|
||||
bit_offset: 0
|
||||
bit_size: 3
|
||||
- name: TAMPFLT
|
||||
description: INx filter count. These bits determines the number of consecutive samples at the specified level (TAMP*TRG) needed to activate a tamper event. TAMPFLT is valid for each of the INx inputs.
|
||||
bit_offset: 3
|
||||
bit_size: 2
|
||||
- name: TAMPPRCH
|
||||
description: INx precharge duration. These bit determines the duration of time during which the pull-up/is activated before each sample. TAMPPRCH is valid for each of the INx inputs.
|
||||
bit_offset: 5
|
||||
bit_size: 2
|
||||
- name: TAMPPUDIS
|
||||
description: INx pull-up disable. This bit determines if each of the TAMPx pins are precharged before each sample.
|
||||
bit_offset: 7
|
||||
bit_size: 1
|
||||
fieldset/IER:
|
||||
description: TAMP interrupt enable register
|
||||
fields:
|
||||
- name: TAMPIE
|
||||
description: Tamper X interrupt enable
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: ITAMPIE
|
||||
description: Internal tamper X interrupt enable
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 6
|
||||
stride: 1
|
||||
- name: TAMPIE
|
||||
description: Tamper X interrupt enable
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: ITAMPIE
|
||||
description: Internal tamper X interrupt enable
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 6
|
||||
stride: 1
|
||||
fieldset/MISR:
|
||||
description: TAMP masked interrupt status register
|
||||
fields:
|
||||
- name: TAMPMF
|
||||
description: Tamper X interrupt masked flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: ITAMPMF
|
||||
description: Internal tamper X interrupt masked flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 6
|
||||
stride: 1
|
||||
- name: TAMPMF
|
||||
description: Tamper X interrupt masked flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: ITAMPMF
|
||||
description: Internal tamper X interrupt masked flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 6
|
||||
stride: 1
|
||||
fieldset/SCR:
|
||||
description: TAMP status clear register
|
||||
fields:
|
||||
- name: CTAMPF
|
||||
description: Clear tamper X detection flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: CITAMPF
|
||||
description: Clear internal tamper X detection flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 6
|
||||
stride: 1
|
||||
- name: CTAMPF
|
||||
description: Clear tamper X detection flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: CITAMPF
|
||||
description: Clear internal tamper X detection flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 6
|
||||
stride: 1
|
||||
fieldset/SR:
|
||||
description: TAMP status register
|
||||
fields:
|
||||
- name: TAMPF
|
||||
description: Tamper X detection flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: ITAMPF
|
||||
description: Internal tamper X detection flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 6
|
||||
stride: 1
|
||||
- name: TAMPF
|
||||
description: Tamper X detection flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: ITAMPF
|
||||
description: Internal tamper X detection flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 6
|
||||
stride: 1
|
||||
|
@ -1,368 +1,368 @@
|
||||
block/TAMP:
|
||||
description: Tamper and backup registers
|
||||
items:
|
||||
- name: CR1
|
||||
description: control register 1
|
||||
byte_offset: 0
|
||||
fieldset: CR1
|
||||
- name: CR2
|
||||
description: control register 2
|
||||
byte_offset: 4
|
||||
fieldset: CR2
|
||||
- name: CR3
|
||||
description: control register 3
|
||||
byte_offset: 8
|
||||
fieldset: CR3
|
||||
- name: FLTCR
|
||||
description: TAMP filter control register
|
||||
byte_offset: 12
|
||||
fieldset: FLTCR
|
||||
- name: ATCR1
|
||||
description: TAMP active tamper control register 1
|
||||
byte_offset: 16
|
||||
fieldset: ATCR1
|
||||
- name: ATSEEDR
|
||||
description: TAMP active tamper seed register
|
||||
byte_offset: 20
|
||||
access: Write
|
||||
fieldset: ATSEEDR
|
||||
- name: ATOR
|
||||
description: TAMP active tamper output register
|
||||
byte_offset: 24
|
||||
access: Read
|
||||
fieldset: ATOR
|
||||
- name: ATCR2
|
||||
description: TAMP active tamper control register 2
|
||||
byte_offset: 28
|
||||
fieldset: ATCR2
|
||||
- name: SMCR
|
||||
description: TAMP secure mode register
|
||||
byte_offset: 32
|
||||
fieldset: SMCR
|
||||
- name: PRIVCR
|
||||
description: TAMP privilege mode control register
|
||||
byte_offset: 36
|
||||
fieldset: PRIVCR
|
||||
- name: IER
|
||||
description: TAMP interrupt enable register
|
||||
byte_offset: 44
|
||||
fieldset: IER
|
||||
- name: SR
|
||||
description: TAMP status register
|
||||
byte_offset: 48
|
||||
access: Read
|
||||
fieldset: SR
|
||||
- name: MISR
|
||||
description: " TAMP masked interrupt status register "
|
||||
byte_offset: 52
|
||||
access: Read
|
||||
fieldset: MISR
|
||||
- name: SMISR
|
||||
description: TAMP secure masked interrupt status register
|
||||
byte_offset: 56
|
||||
access: Read
|
||||
fieldset: SMISR
|
||||
- name: SCR
|
||||
description: TAMP status clear register
|
||||
byte_offset: 60
|
||||
access: Write
|
||||
fieldset: SCR
|
||||
- name: COUNTR
|
||||
description: TAMP monotonic counter register
|
||||
byte_offset: 64
|
||||
access: Read
|
||||
fieldset: COUNTR
|
||||
- name: CFGR
|
||||
description: TAMP configuration register
|
||||
byte_offset: 80
|
||||
fieldset: CFGR
|
||||
- name: BKPR
|
||||
description: TAMP backup register
|
||||
array:
|
||||
len: 32
|
||||
stride: 4
|
||||
byte_offset: 256
|
||||
fieldset: BKPR
|
||||
- name: CR1
|
||||
description: control register 1
|
||||
byte_offset: 0
|
||||
fieldset: CR1
|
||||
- name: CR2
|
||||
description: control register 2
|
||||
byte_offset: 4
|
||||
fieldset: CR2
|
||||
- name: CR3
|
||||
description: control register 3
|
||||
byte_offset: 8
|
||||
fieldset: CR3
|
||||
- name: FLTCR
|
||||
description: TAMP filter control register
|
||||
byte_offset: 12
|
||||
fieldset: FLTCR
|
||||
- name: ATCR1
|
||||
description: TAMP active tamper control register 1
|
||||
byte_offset: 16
|
||||
fieldset: ATCR1
|
||||
- name: ATSEEDR
|
||||
description: TAMP active tamper seed register
|
||||
byte_offset: 20
|
||||
access: Write
|
||||
fieldset: ATSEEDR
|
||||
- name: ATOR
|
||||
description: TAMP active tamper output register
|
||||
byte_offset: 24
|
||||
access: Read
|
||||
fieldset: ATOR
|
||||
- name: ATCR2
|
||||
description: TAMP active tamper control register 2
|
||||
byte_offset: 28
|
||||
fieldset: ATCR2
|
||||
- name: SMCR
|
||||
description: TAMP secure mode register
|
||||
byte_offset: 32
|
||||
fieldset: SMCR
|
||||
- name: PRIVCR
|
||||
description: TAMP privilege mode control register
|
||||
byte_offset: 36
|
||||
fieldset: PRIVCR
|
||||
- name: IER
|
||||
description: TAMP interrupt enable register
|
||||
byte_offset: 44
|
||||
fieldset: IER
|
||||
- name: SR
|
||||
description: TAMP status register
|
||||
byte_offset: 48
|
||||
access: Read
|
||||
fieldset: SR
|
||||
- name: MISR
|
||||
description: TAMP masked interrupt status register
|
||||
byte_offset: 52
|
||||
access: Read
|
||||
fieldset: MISR
|
||||
- name: SMISR
|
||||
description: TAMP secure masked interrupt status register
|
||||
byte_offset: 56
|
||||
access: Read
|
||||
fieldset: SMISR
|
||||
- name: SCR
|
||||
description: TAMP status clear register
|
||||
byte_offset: 60
|
||||
access: Write
|
||||
fieldset: SCR
|
||||
- name: COUNTR
|
||||
description: TAMP monotonic counter register
|
||||
byte_offset: 64
|
||||
access: Read
|
||||
fieldset: COUNTR
|
||||
- name: CFGR
|
||||
description: TAMP configuration register
|
||||
byte_offset: 80
|
||||
fieldset: CFGR
|
||||
- name: BKPR
|
||||
description: TAMP backup register
|
||||
array:
|
||||
len: 32
|
||||
stride: 4
|
||||
byte_offset: 256
|
||||
fieldset: BKPR
|
||||
fieldset/ATCR1:
|
||||
description: TAMP active tamper control register 1
|
||||
fields:
|
||||
- name: TAMPAM
|
||||
description: TAMPAM
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ATOSEL
|
||||
description: ATOSEL
|
||||
bit_offset: 8
|
||||
bit_size: 2
|
||||
array:
|
||||
len: 4
|
||||
stride: 2
|
||||
- name: ATCKSEL
|
||||
description: ATCKSEL
|
||||
bit_offset: 16
|
||||
bit_size: 2
|
||||
- name: ATPER
|
||||
description: ATPER
|
||||
bit_offset: 24
|
||||
bit_size: 2
|
||||
- name: ATOSHARE
|
||||
description: ATOSHARE
|
||||
bit_offset: 30
|
||||
bit_size: 1
|
||||
- name: FLTEN
|
||||
description: FLTEN
|
||||
bit_offset: 31
|
||||
bit_size: 1
|
||||
- name: TAMPAM
|
||||
description: TAMPAM
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ATOSEL
|
||||
description: ATOSEL
|
||||
bit_offset: 8
|
||||
bit_size: 2
|
||||
array:
|
||||
len: 4
|
||||
stride: 2
|
||||
- name: ATCKSEL
|
||||
description: ATCKSEL
|
||||
bit_offset: 16
|
||||
bit_size: 2
|
||||
- name: ATPER
|
||||
description: ATPER
|
||||
bit_offset: 24
|
||||
bit_size: 2
|
||||
- name: ATOSHARE
|
||||
description: ATOSHARE
|
||||
bit_offset: 30
|
||||
bit_size: 1
|
||||
- name: FLTEN
|
||||
description: FLTEN
|
||||
bit_offset: 31
|
||||
bit_size: 1
|
||||
fieldset/ATCR2:
|
||||
description: TAMP active tamper control register 2
|
||||
fields:
|
||||
- name: ATOSEL
|
||||
description: ATOSEL
|
||||
bit_offset: 8
|
||||
bit_size: 3
|
||||
array:
|
||||
len: 8
|
||||
stride: 3
|
||||
- name: ATOSEL
|
||||
description: ATOSEL
|
||||
bit_offset: 8
|
||||
bit_size: 3
|
||||
array:
|
||||
len: 8
|
||||
stride: 3
|
||||
fieldset/ATOR:
|
||||
description: TAMP active tamper output register
|
||||
fields:
|
||||
- name: PRNG
|
||||
description: Pseudo-random generator value
|
||||
bit_offset: 0
|
||||
bit_size: 8
|
||||
- name: SEEDF
|
||||
description: Seed running flag
|
||||
bit_offset: 14
|
||||
bit_size: 1
|
||||
- name: INITS
|
||||
description: Active tamper initialization status
|
||||
bit_offset: 15
|
||||
bit_size: 1
|
||||
- name: PRNG
|
||||
description: Pseudo-random generator value
|
||||
bit_offset: 0
|
||||
bit_size: 8
|
||||
- name: SEEDF
|
||||
description: Seed running flag
|
||||
bit_offset: 14
|
||||
bit_size: 1
|
||||
- name: INITS
|
||||
description: Active tamper initialization status
|
||||
bit_offset: 15
|
||||
bit_size: 1
|
||||
fieldset/ATSEEDR:
|
||||
description: TAMP active tamper seed register
|
||||
fields:
|
||||
- name: SEED
|
||||
description: Pseudo-random generator seed value
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
- name: SEED
|
||||
description: Pseudo-random generator seed value
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/BKPR:
|
||||
description: TAMP backup register
|
||||
fields:
|
||||
- name: BKP
|
||||
description: BKP
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
- name: BKP
|
||||
description: BKP
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/CFGR:
|
||||
description: TAMP configuration register
|
||||
fields:
|
||||
- name: TMONEN
|
||||
description: TMONEN
|
||||
bit_offset: 1
|
||||
bit_size: 1
|
||||
- name: VMONEN
|
||||
description: VMONEN
|
||||
bit_offset: 2
|
||||
bit_size: 1
|
||||
- name: WUTMONEN
|
||||
description: WUTMONEN
|
||||
bit_offset: 3
|
||||
bit_size: 1
|
||||
- name: TMONEN
|
||||
description: TMONEN
|
||||
bit_offset: 1
|
||||
bit_size: 1
|
||||
- name: VMONEN
|
||||
description: VMONEN
|
||||
bit_offset: 2
|
||||
bit_size: 1
|
||||
- name: WUTMONEN
|
||||
description: WUTMONEN
|
||||
bit_offset: 3
|
||||
bit_size: 1
|
||||
fieldset/COUNTR:
|
||||
description: TAMP monotonic counter register
|
||||
fields:
|
||||
- name: COUNT
|
||||
description: COUNT
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
- name: COUNT
|
||||
description: COUNT
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/CR1:
|
||||
description: control register 1
|
||||
fields:
|
||||
- name: TAMPE
|
||||
description: TAMPE
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPE
|
||||
description: ITAMPE
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: TAMPE
|
||||
description: TAMPE
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPE
|
||||
description: ITAMPE
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
fieldset/CR2:
|
||||
description: control register 2
|
||||
fields:
|
||||
- name: TAMPNOER
|
||||
description: Tamper X no erase
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: TAMPMSK
|
||||
description: Tamper X mask
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: BKERASE
|
||||
description: BKERASE
|
||||
bit_offset: 23
|
||||
bit_size: 1
|
||||
- name: TAMPTRG
|
||||
description: Active level for tamper X input
|
||||
bit_offset: 24
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: TAMPNOER
|
||||
description: Tamper X no erase
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: TAMPMSK
|
||||
description: Tamper X mask
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: BKERASE
|
||||
description: BKERASE
|
||||
bit_offset: 23
|
||||
bit_size: 1
|
||||
- name: TAMPTRG
|
||||
description: Active level for tamper X input
|
||||
bit_offset: 24
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
fieldset/CR3:
|
||||
description: control register 3
|
||||
fields:
|
||||
- name: ITAMPNOER
|
||||
description: Internal Tamper X no erase
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPNOER
|
||||
description: Internal Tamper X no erase
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
fieldset/FLTCR:
|
||||
description: TAMP filter control register
|
||||
fields:
|
||||
- name: TAMPFREQ
|
||||
description: TAMPFREQ
|
||||
bit_offset: 0
|
||||
bit_size: 3
|
||||
- name: TAMPFLT
|
||||
description: TAMPFLT
|
||||
bit_offset: 3
|
||||
bit_size: 2
|
||||
- name: TAMPPRCH
|
||||
description: TAMPPRCH
|
||||
bit_offset: 5
|
||||
bit_size: 2
|
||||
- name: TAMPPUDIS
|
||||
description: TAMPPUDIS
|
||||
bit_offset: 7
|
||||
bit_size: 1
|
||||
- name: TAMPFREQ
|
||||
description: TAMPFREQ
|
||||
bit_offset: 0
|
||||
bit_size: 3
|
||||
- name: TAMPFLT
|
||||
description: TAMPFLT
|
||||
bit_offset: 3
|
||||
bit_size: 2
|
||||
- name: TAMPPRCH
|
||||
description: TAMPPRCH
|
||||
bit_offset: 5
|
||||
bit_size: 2
|
||||
- name: TAMPPUDIS
|
||||
description: TAMPPUDIS
|
||||
bit_offset: 7
|
||||
bit_size: 1
|
||||
fieldset/IER:
|
||||
description: TAMP interrupt enable register
|
||||
fields:
|
||||
- name: TAMPIE
|
||||
description: Tamper X interrupt enable
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPIE
|
||||
description: Internal tamper X interrupt enable
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: TAMPIE
|
||||
description: Tamper X interrupt enable
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPIE
|
||||
description: Internal tamper X interrupt enable
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
fieldset/MISR:
|
||||
description: " TAMP masked interrupt status register "
|
||||
description: TAMP masked interrupt status register
|
||||
fields:
|
||||
- name: TAMPMF
|
||||
description: Tamper X interrupt masked flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPMF
|
||||
description: Internal tamper X interrupt masked flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: TAMPMF
|
||||
description: Tamper X interrupt masked flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPMF
|
||||
description: Internal tamper X interrupt masked flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
fieldset/PRIVCR:
|
||||
description: TAMP privilege mode control register
|
||||
fields:
|
||||
- name: BKPRWPRIV
|
||||
description: Backup registers zone 1 privilege protection
|
||||
bit_offset: 29
|
||||
bit_size: 1
|
||||
- name: BKPWPRIV
|
||||
description: Backup registers zone 2 privilege protection
|
||||
bit_offset: 30
|
||||
bit_size: 1
|
||||
- name: TAMPPRIV
|
||||
description: Tamper privilege protection
|
||||
bit_offset: 31
|
||||
bit_size: 1
|
||||
- name: BKPRWPRIV
|
||||
description: Backup registers zone 1 privilege protection
|
||||
bit_offset: 29
|
||||
bit_size: 1
|
||||
- name: BKPWPRIV
|
||||
description: Backup registers zone 2 privilege protection
|
||||
bit_offset: 30
|
||||
bit_size: 1
|
||||
- name: TAMPPRIV
|
||||
description: Tamper privilege protection
|
||||
bit_offset: 31
|
||||
bit_size: 1
|
||||
fieldset/SCR:
|
||||
description: TAMP status clear register
|
||||
fields:
|
||||
- name: CTAMPF
|
||||
description: Clear tamper X detection flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: CITAMPF
|
||||
description: Clear internal tamper X detection flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: CTAMPF
|
||||
description: Clear tamper X detection flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: CITAMPF
|
||||
description: Clear internal tamper X detection flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
fieldset/SMCR:
|
||||
description: TAMP secure mode register
|
||||
fields:
|
||||
- name: BKPRWDPROT
|
||||
description: Backup registers read/write protection offset
|
||||
bit_offset: 0
|
||||
bit_size: 8
|
||||
- name: BKPWDPROT
|
||||
description: Backup registers write protection offset
|
||||
bit_offset: 16
|
||||
bit_size: 8
|
||||
- name: TAMPDPROT
|
||||
description: Tamper protection
|
||||
bit_offset: 31
|
||||
bit_size: 1
|
||||
- name: BKPRWDPROT
|
||||
description: Backup registers read/write protection offset
|
||||
bit_offset: 0
|
||||
bit_size: 8
|
||||
- name: BKPWDPROT
|
||||
description: Backup registers write protection offset
|
||||
bit_offset: 16
|
||||
bit_size: 8
|
||||
- name: TAMPDPROT
|
||||
description: Tamper protection
|
||||
bit_offset: 31
|
||||
bit_size: 1
|
||||
fieldset/SMISR:
|
||||
description: TAMP secure masked interrupt status register
|
||||
fields:
|
||||
- name: TAMPMF
|
||||
description: Tamper X interrupt masked flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPMF
|
||||
description: Internal tamper X interrupt masked flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: TAMPMF
|
||||
description: Tamper X interrupt masked flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPMF
|
||||
description: Internal tamper X interrupt masked flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
fieldset/SR:
|
||||
description: TAMP status register
|
||||
fields:
|
||||
- name: TAMPF
|
||||
description: Tamper X detection flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPF
|
||||
description: Internal tamper X detection flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: TAMPF
|
||||
description: Tamper X detection flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPF
|
||||
description: Internal tamper X detection flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
|
@ -1,499 +1,499 @@
|
||||
block/TAMP:
|
||||
description: Tamper and backup registers
|
||||
items:
|
||||
- name: CR1
|
||||
description: "TAMP control register 1"
|
||||
byte_offset: 0
|
||||
fieldset: CR1
|
||||
- name: CR2
|
||||
description: "TAMP control register 2"
|
||||
byte_offset: 4
|
||||
fieldset: CR2
|
||||
- name: CR3
|
||||
description: "TAMP control register 3"
|
||||
byte_offset: 8
|
||||
fieldset: CR3
|
||||
- name: FLTCR
|
||||
description: "TAMP filter control register"
|
||||
byte_offset: 12
|
||||
fieldset: FLTCR
|
||||
- name: ATCR1
|
||||
description: "TAMP active tamper control register 1"
|
||||
byte_offset: 16
|
||||
fieldset: ATCR1
|
||||
- name: ATSEEDR
|
||||
description: "TAMP active tamper seed register"
|
||||
byte_offset: 20
|
||||
fieldset: ATSEEDR
|
||||
- name: ATOR
|
||||
description: "TAMP active tamper output register"
|
||||
byte_offset: 24
|
||||
fieldset: ATOR
|
||||
- name: ATCR2
|
||||
description: "TAMP active tamper control register 2"
|
||||
byte_offset: 28
|
||||
fieldset: ATCR2
|
||||
- name: SECCFGR
|
||||
description: "TAMP secure mode register"
|
||||
byte_offset: 32
|
||||
fieldset: SECCFGR
|
||||
- name: PRIVCR
|
||||
description: "TAMP privilege mode control register"
|
||||
byte_offset: 36
|
||||
fieldset: PRIVCR
|
||||
- name: IER
|
||||
description: "TAMP interrupt enable register"
|
||||
byte_offset: 44
|
||||
fieldset: IER
|
||||
- name: SR
|
||||
description: "TAMP status register"
|
||||
byte_offset: 48
|
||||
fieldset: SR
|
||||
- name: MISR
|
||||
description: "TAMP non-secure masked interrupt status register"
|
||||
byte_offset: 52
|
||||
fieldset: MISR
|
||||
- name: SMISR
|
||||
description: "TAMP secure masked interrupt status register"
|
||||
byte_offset: 56
|
||||
fieldset: SMISR
|
||||
- name: SCR
|
||||
description: "TAMP status clear register"
|
||||
byte_offset: 60
|
||||
fieldset: SCR
|
||||
- name: COUNTR
|
||||
description: "TAMP monotonic counter 1 register"
|
||||
byte_offset: 64
|
||||
fieldset: COUNTR
|
||||
- name: ERCFGR
|
||||
description: "TAMP erase configuration register"
|
||||
byte_offset: 84
|
||||
fieldset: ERCFGR
|
||||
- name: BKPR
|
||||
description: TAMP backup X register
|
||||
array:
|
||||
len: 32
|
||||
stride: 4
|
||||
byte_offset: 256
|
||||
fieldset: BKPR
|
||||
- name: CR1
|
||||
description: TAMP control register 1
|
||||
byte_offset: 0
|
||||
fieldset: CR1
|
||||
- name: CR2
|
||||
description: TAMP control register 2
|
||||
byte_offset: 4
|
||||
fieldset: CR2
|
||||
- name: CR3
|
||||
description: TAMP control register 3
|
||||
byte_offset: 8
|
||||
fieldset: CR3
|
||||
- name: FLTCR
|
||||
description: TAMP filter control register
|
||||
byte_offset: 12
|
||||
fieldset: FLTCR
|
||||
- name: ATCR1
|
||||
description: TAMP active tamper control register 1
|
||||
byte_offset: 16
|
||||
fieldset: ATCR1
|
||||
- name: ATSEEDR
|
||||
description: TAMP active tamper seed register
|
||||
byte_offset: 20
|
||||
fieldset: ATSEEDR
|
||||
- name: ATOR
|
||||
description: TAMP active tamper output register
|
||||
byte_offset: 24
|
||||
fieldset: ATOR
|
||||
- name: ATCR2
|
||||
description: TAMP active tamper control register 2
|
||||
byte_offset: 28
|
||||
fieldset: ATCR2
|
||||
- name: SECCFGR
|
||||
description: TAMP secure mode register
|
||||
byte_offset: 32
|
||||
fieldset: SECCFGR
|
||||
- name: PRIVCR
|
||||
description: TAMP privilege mode control register
|
||||
byte_offset: 36
|
||||
fieldset: PRIVCR
|
||||
- name: IER
|
||||
description: TAMP interrupt enable register
|
||||
byte_offset: 44
|
||||
fieldset: IER
|
||||
- name: SR
|
||||
description: TAMP status register
|
||||
byte_offset: 48
|
||||
fieldset: SR
|
||||
- name: MISR
|
||||
description: TAMP non-secure masked interrupt status register
|
||||
byte_offset: 52
|
||||
fieldset: MISR
|
||||
- name: SMISR
|
||||
description: TAMP secure masked interrupt status register
|
||||
byte_offset: 56
|
||||
fieldset: SMISR
|
||||
- name: SCR
|
||||
description: TAMP status clear register
|
||||
byte_offset: 60
|
||||
fieldset: SCR
|
||||
- name: COUNTR
|
||||
description: TAMP monotonic counter 1 register
|
||||
byte_offset: 64
|
||||
fieldset: COUNTR
|
||||
- name: ERCFGR
|
||||
description: TAMP erase configuration register
|
||||
byte_offset: 84
|
||||
fieldset: ERCFGR
|
||||
- name: BKPR
|
||||
description: TAMP backup X register
|
||||
array:
|
||||
len: 32
|
||||
stride: 4
|
||||
byte_offset: 256
|
||||
fieldset: BKPR
|
||||
fieldset/ATCR1:
|
||||
description: "TAMP active tamper control register 1"
|
||||
description: TAMP active tamper control register 1
|
||||
fields:
|
||||
- name: TAMPAM
|
||||
description: Tamper X active mode
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ATOSEL
|
||||
description: "Active tamper shared output X selection. The selected output must be available in the package pinout"
|
||||
bit_offset: 8
|
||||
bit_size: 2
|
||||
array:
|
||||
len: 4
|
||||
stride: 2
|
||||
- name: ATCKSEL
|
||||
description: "Active tamper RTC asynchronous prescaler clock selection. These bits selects the RTC asynchronous prescaler stage output.The selected clock is CK_ATPRE.. fCK_ATPRE = fRTCCLK / 2ATCKSEL when (PREDIV_A+1) = 128.. .... These bits can be written only when all active tampers are disabled. The write protection remains for up to 1.5 ck_atpre cycles after all the active tampers are disable."
|
||||
bit_offset: 16
|
||||
bit_size: 3
|
||||
enum: ATCKSEL
|
||||
- name: ATPER
|
||||
description: "Active tamper output change period. The tamper output is changed every CK_ATPER = (2ATPER x CK_ATPRE) cycles. Refer to ."
|
||||
bit_offset: 24
|
||||
bit_size: 3
|
||||
- name: ATOSHARE
|
||||
description: "Active tamper output sharing. IN1 is compared with TAMPOUTSEL1. IN2 is compared with TAMPOUTSEL2. IN3 is compared with TAMPOUTSEL3. IN4 is compared with TAMPOUTSEL4. IN5 is compared with TAMPOUTSEL5. IN6 is compared with TAMPOUTSEL6. IN7 is compared with TAMPOUTSEL7. IN8 is compared with TAMPOUTSEL8"
|
||||
bit_offset: 30
|
||||
bit_size: 1
|
||||
- name: FLTEN
|
||||
description: Active tamper filter enable
|
||||
bit_offset: 31
|
||||
bit_size: 1
|
||||
- name: TAMPAM
|
||||
description: Tamper X active mode
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ATOSEL
|
||||
description: Active tamper shared output X selection. The selected output must be available in the package pinout
|
||||
bit_offset: 8
|
||||
bit_size: 2
|
||||
array:
|
||||
len: 4
|
||||
stride: 2
|
||||
- name: ATCKSEL
|
||||
description: Active tamper RTC asynchronous prescaler clock selection. These bits selects the RTC asynchronous prescaler stage output.The selected clock is CK_ATPRE.. fCK_ATPRE = fRTCCLK / 2ATCKSEL when (PREDIV_A+1) = 128.. .... These bits can be written only when all active tampers are disabled. The write protection remains for up to 1.5 ck_atpre cycles after all the active tampers are disable.
|
||||
bit_offset: 16
|
||||
bit_size: 3
|
||||
enum: ATCKSEL
|
||||
- name: ATPER
|
||||
description: Active tamper output change period. The tamper output is changed every CK_ATPER = (2ATPER x CK_ATPRE) cycles. Refer to .
|
||||
bit_offset: 24
|
||||
bit_size: 3
|
||||
- name: ATOSHARE
|
||||
description: Active tamper output sharing. IN1 is compared with TAMPOUTSEL1. IN2 is compared with TAMPOUTSEL2. IN3 is compared with TAMPOUTSEL3. IN4 is compared with TAMPOUTSEL4. IN5 is compared with TAMPOUTSEL5. IN6 is compared with TAMPOUTSEL6. IN7 is compared with TAMPOUTSEL7. IN8 is compared with TAMPOUTSEL8
|
||||
bit_offset: 30
|
||||
bit_size: 1
|
||||
- name: FLTEN
|
||||
description: Active tamper filter enable
|
||||
bit_offset: 31
|
||||
bit_size: 1
|
||||
fieldset/ATCR2:
|
||||
description: "TAMP active tamper control register 2"
|
||||
description: TAMP active tamper control register 2
|
||||
fields:
|
||||
- name: ATOSEL
|
||||
description: "Active tamper shared output X selection. The selected output must be available in the package pinout. Bits 9:8 are the mirror of ATOSEL1[1:0] in the ATCR1, and so can also be read or. written through ATCR1."
|
||||
bit_offset: 8
|
||||
bit_size: 3
|
||||
array:
|
||||
len: 8
|
||||
stride: 3
|
||||
- name: ATOSEL
|
||||
description: Active tamper shared output X selection. The selected output must be available in the package pinout. Bits 9:8 are the mirror of ATOSEL1[1:0] in the ATCR1, and so can also be read or. written through ATCR1.
|
||||
bit_offset: 8
|
||||
bit_size: 3
|
||||
array:
|
||||
len: 8
|
||||
stride: 3
|
||||
fieldset/ATOR:
|
||||
description: "TAMP active tamper output register"
|
||||
description: TAMP active tamper output register
|
||||
fields:
|
||||
- name: PRNG
|
||||
description: "Pseudo-random generator value. This field provides the values of the PRNG output. Because of potential inconsistencies due to synchronization delays, PRNG must be read at least twice. The read value is correct if it is equal to previous read value. This field can only be read when the APB is in secure mode."
|
||||
bit_offset: 0
|
||||
bit_size: 8
|
||||
- name: SEEDF
|
||||
description: "Seed running flag. This flag is set by hardware when a new seed is written in the ATSEEDR. It is cleared by hardware when the PRNG has absorbed this new seed, and by system reset. The TAMP APB cock must not be switched off as long as SEEDF is set."
|
||||
bit_offset: 14
|
||||
bit_size: 1
|
||||
- name: INITS
|
||||
description: "Active tamper initialization status. This flag is set by hardware when the PRNG has absorbed the first 128-bit seed, meaning that the enabled active tampers are functional. This flag is cleared when the active tampers are disabled."
|
||||
bit_offset: 15
|
||||
bit_size: 1
|
||||
- name: PRNG
|
||||
description: Pseudo-random generator value. This field provides the values of the PRNG output. Because of potential inconsistencies due to synchronization delays, PRNG must be read at least twice. The read value is correct if it is equal to previous read value. This field can only be read when the APB is in secure mode.
|
||||
bit_offset: 0
|
||||
bit_size: 8
|
||||
- name: SEEDF
|
||||
description: Seed running flag. This flag is set by hardware when a new seed is written in the ATSEEDR. It is cleared by hardware when the PRNG has absorbed this new seed, and by system reset. The TAMP APB cock must not be switched off as long as SEEDF is set.
|
||||
bit_offset: 14
|
||||
bit_size: 1
|
||||
- name: INITS
|
||||
description: Active tamper initialization status. This flag is set by hardware when the PRNG has absorbed the first 128-bit seed, meaning that the enabled active tampers are functional. This flag is cleared when the active tampers are disabled.
|
||||
bit_offset: 15
|
||||
bit_size: 1
|
||||
fieldset/ATSEEDR:
|
||||
description: "TAMP active tamper seed register"
|
||||
description: TAMP active tamper seed register
|
||||
fields:
|
||||
- name: SEED
|
||||
description: "Pseudo-random generator seed value. This register must be written four times with 32-bit values to provide the 128-bit seed to the PRNG. Writing to this register automatically sends the seed value to the PRNG."
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
- name: SEED
|
||||
description: Pseudo-random generator seed value. This register must be written four times with 32-bit values to provide the 128-bit seed to the PRNG. Writing to this register automatically sends the seed value to the PRNG.
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/BKPR:
|
||||
description: TAMP backup register
|
||||
fields:
|
||||
- name: BKP
|
||||
description: "The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled."
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
- name: BKP
|
||||
description: The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/COUNTR:
|
||||
description: "TAMP monotonic counter 1 register"
|
||||
description: TAMP monotonic counter 1 register
|
||||
fields:
|
||||
- name: COUNT
|
||||
description: This register is read-only only and is incremented by one when a write access is done to this register. This register cannot roll-over and is frozen when reaching the maximum value.
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
- name: COUNT
|
||||
description: This register is read-only only and is incremented by one when a write access is done to this register. This register cannot roll-over and is frozen when reaching the maximum value.
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/CR1:
|
||||
description: "TAMP control register 1 "
|
||||
description: TAMP control register 1
|
||||
fields:
|
||||
- name: TAMPE
|
||||
description: Tamper detection on INx enable
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPE
|
||||
description: Internal tamper X enable
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 13
|
||||
stride: 1
|
||||
- name: TAMPE
|
||||
description: Tamper detection on INx enable
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPE
|
||||
description: Internal tamper X enable
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 13
|
||||
stride: 1
|
||||
fieldset/CR2:
|
||||
description: "TAMP control register 2"
|
||||
description: TAMP control register 2
|
||||
fields:
|
||||
- name: TAMPNOER
|
||||
description: Tamper X no erase
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: TAMPMSK
|
||||
description: Tamper X mask. The tamper 1 interrupt must not be enabled when TAMP1MSK is set.
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: BKBLOCK
|
||||
description: Backup registers and device secrets access blocked
|
||||
bit_offset: 22
|
||||
bit_size: 1
|
||||
- name: BKERASE
|
||||
description: Backup registers and device secrets erase. Writing '1 to this bit reset the backup registers and device secrets(1). Writing 0 has no effect. This bit is always read as 0.
|
||||
bit_offset: 23
|
||||
bit_size: 1
|
||||
- name: TAMPTRG
|
||||
description: Active level for tamper 1 input.
|
||||
bit_offset: 24
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
enum: TAMPTRG
|
||||
- name: TAMPNOER
|
||||
description: Tamper X no erase
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: TAMPMSK
|
||||
description: Tamper X mask. The tamper 1 interrupt must not be enabled when TAMP1MSK is set.
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: BKBLOCK
|
||||
description: Backup registers and device secrets access blocked
|
||||
bit_offset: 22
|
||||
bit_size: 1
|
||||
- name: BKERASE
|
||||
description: Backup registers and device secrets erase. Writing '1 to this bit reset the backup registers and device secrets(1). Writing 0 has no effect. This bit is always read as 0.
|
||||
bit_offset: 23
|
||||
bit_size: 1
|
||||
- name: TAMPTRG
|
||||
description: Active level for tamper 1 input.
|
||||
bit_offset: 24
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
enum: TAMPTRG
|
||||
fieldset/CR3:
|
||||
description: "TAMP control register 3"
|
||||
description: TAMP control register 3
|
||||
fields:
|
||||
- name: ITAMPNOER
|
||||
description: Internal Tamper X no erase
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 13
|
||||
stride: 1
|
||||
- name: ITAMPNOER
|
||||
description: Internal Tamper X no erase
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 13
|
||||
stride: 1
|
||||
fieldset/ERCFGR:
|
||||
description: "TAMP erase configuration register"
|
||||
description: TAMP erase configuration register
|
||||
fields:
|
||||
- name: ERCFG0
|
||||
description: Configurable device secrets configuration
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
enum: ERCFG
|
||||
- name: ERCFG0
|
||||
description: Configurable device secrets configuration
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
enum: ERCFG
|
||||
fieldset/FLTCR:
|
||||
description: "TAMP filter control register"
|
||||
description: TAMP filter control register
|
||||
fields:
|
||||
- name: TAMPFREQ
|
||||
description: "Tamper sampling frequency. Determines the frequency at which each of the INx inputs are sampled."
|
||||
bit_offset: 0
|
||||
bit_size: 3
|
||||
enum: TAMPFREQ
|
||||
- name: TAMPFLT
|
||||
description: "INx filter count. These bits determines the number of consecutive samples at the specified level (TAMP*TRG) needed to activate a tamper event. TAMPFLT is valid for each of the INx inputs."
|
||||
bit_offset: 3
|
||||
bit_size: 2
|
||||
enum: TAMPFLT
|
||||
- name: TAMPPRCH
|
||||
description: "INx precharge duration. These bit determines the duration of time during which the pull-up/is activated before each sample. TAMPPRCH is valid for each of the INx inputs."
|
||||
bit_offset: 5
|
||||
bit_size: 2
|
||||
enum: TAMPPRCH
|
||||
- name: TAMPPUDIS
|
||||
description: "INx pull-up disable. This bit determines if each of the TAMPx pins are precharged before each sample."
|
||||
bit_offset: 7
|
||||
bit_size: 1
|
||||
- name: TAMPFREQ
|
||||
description: Tamper sampling frequency. Determines the frequency at which each of the INx inputs are sampled.
|
||||
bit_offset: 0
|
||||
bit_size: 3
|
||||
enum: TAMPFREQ
|
||||
- name: TAMPFLT
|
||||
description: INx filter count. These bits determines the number of consecutive samples at the specified level (TAMP*TRG) needed to activate a tamper event. TAMPFLT is valid for each of the INx inputs.
|
||||
bit_offset: 3
|
||||
bit_size: 2
|
||||
enum: TAMPFLT
|
||||
- name: TAMPPRCH
|
||||
description: INx precharge duration. These bit determines the duration of time during which the pull-up/is activated before each sample. TAMPPRCH is valid for each of the INx inputs.
|
||||
bit_offset: 5
|
||||
bit_size: 2
|
||||
enum: TAMPPRCH
|
||||
- name: TAMPPUDIS
|
||||
description: INx pull-up disable. This bit determines if each of the TAMPx pins are precharged before each sample.
|
||||
bit_offset: 7
|
||||
bit_size: 1
|
||||
fieldset/IER:
|
||||
description: "TAMP interrupt enable register"
|
||||
description: TAMP interrupt enable register
|
||||
fields:
|
||||
- name: TAMPIE
|
||||
description: Tamper X interrupt enable
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPIE
|
||||
description: Internal tamper X interrupt enable
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 13
|
||||
stride: 1
|
||||
- name: TAMPIE
|
||||
description: Tamper X interrupt enable
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPIE
|
||||
description: Internal tamper X interrupt enable
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 13
|
||||
stride: 1
|
||||
fieldset/MISR:
|
||||
description: "TAMP non-secure masked interrupt status register"
|
||||
description: TAMP non-secure masked interrupt status register
|
||||
fields:
|
||||
- name: TAMPMF
|
||||
description: "TAMPx non-secure interrupt masked flag. This flag is set by hardware when the tamper X non-secure interrupt is raised."
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPMF
|
||||
description: "Internal tamper X non-secure interrupt masked flag. This flag is set by hardware when the internal tamper X non-secure interrupt is raised."
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 13
|
||||
stride: 1
|
||||
- name: TAMPMF
|
||||
description: TAMPx non-secure interrupt masked flag. This flag is set by hardware when the tamper X non-secure interrupt is raised.
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPMF
|
||||
description: Internal tamper X non-secure interrupt masked flag. This flag is set by hardware when the internal tamper X non-secure interrupt is raised.
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 13
|
||||
stride: 1
|
||||
fieldset/PRIVCR:
|
||||
description: "TAMP privilege mode control register "
|
||||
description: TAMP privilege mode control register
|
||||
fields:
|
||||
- name: CNT1PRIV
|
||||
description: Monotonic counter 1 privilege protection
|
||||
bit_offset: 15
|
||||
bit_size: 1
|
||||
enum: PRIV
|
||||
- name: BKPRWPRIV
|
||||
description: Backup registers zone 1 privilege protection
|
||||
bit_offset: 29
|
||||
bit_size: 1
|
||||
enum: PRIV
|
||||
- name: BKPWPRIV
|
||||
description: Backup registers zone 2 privilege protection
|
||||
bit_offset: 30
|
||||
bit_size: 1
|
||||
enum: PRIV
|
||||
- name: TAMPPRIV
|
||||
description: "Tamper privilege protection (excluding backup registers). Note: Refer to for details on the read protection."
|
||||
bit_offset: 31
|
||||
bit_size: 1
|
||||
enum: PRIV
|
||||
- name: CNT1PRIV
|
||||
description: Monotonic counter 1 privilege protection
|
||||
bit_offset: 15
|
||||
bit_size: 1
|
||||
enum: PRIV
|
||||
- name: BKPRWPRIV
|
||||
description: Backup registers zone 1 privilege protection
|
||||
bit_offset: 29
|
||||
bit_size: 1
|
||||
enum: PRIV
|
||||
- name: BKPWPRIV
|
||||
description: Backup registers zone 2 privilege protection
|
||||
bit_offset: 30
|
||||
bit_size: 1
|
||||
enum: PRIV
|
||||
- name: TAMPPRIV
|
||||
description: 'Tamper privilege protection (excluding backup registers). Note: Refer to for details on the read protection.'
|
||||
bit_offset: 31
|
||||
bit_size: 1
|
||||
enum: PRIV
|
||||
fieldset/SCR:
|
||||
description: "TAMP status clear register"
|
||||
description: TAMP status clear register
|
||||
fields:
|
||||
- name: CTAMPF
|
||||
description: "Clear TAMPx detection flag. Writing 1 in this bit clears the TAMPxF bit in the SR register."
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: CITAMPF
|
||||
description: "Clear ITAMPx detection flag. Writing 1 in this bit clears the ITAMPxF bit in the SR register."
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 13
|
||||
stride: 1
|
||||
- name: CTAMPF
|
||||
description: Clear TAMPx detection flag. Writing 1 in this bit clears the TAMPxF bit in the SR register.
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: CITAMPF
|
||||
description: Clear ITAMPx detection flag. Writing 1 in this bit clears the ITAMPxF bit in the SR register.
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 13
|
||||
stride: 1
|
||||
fieldset/SECCFGR:
|
||||
description: "TAMP secure mode register"
|
||||
description: TAMP secure mode register
|
||||
fields:
|
||||
- name: BKPRWSEC
|
||||
description: "Backup registers read/write protection offset. Protection zone 1 is defined for backup registers from BKP0R to BKPxR (x = BKPRWSEC-1, from 0 to 128). if TZEN=1, these backup registers can be read and written only with secure access. If TZEN=0:\tthe protection zone 1 can be read and written with non-secure access. If BKPRWSEC = 0: there is no protection zone 1. If BKPRWPRIV is set, BKPRWSEC[7:0] can be written only in privileged mode."
|
||||
bit_offset: 0
|
||||
bit_size: 8
|
||||
- name: CNT1SEC
|
||||
description: Monotonic counter 1 secure protection
|
||||
bit_offset: 15
|
||||
bit_size: 1
|
||||
enum: SEC
|
||||
- name: BKPWSEC
|
||||
description: "Backup registers write protection offset. Protection zone 2 is defined for backup registers from BKPyR (y = BKPRWSEC, from 0 to 128) to BKPzR (z = BKPWSEC-1, from 0 to 128, BKPWSECBKPRWSEC): if TZEN=1, these backup registers can be written only with secure access. They can be read with secure or non-secure access. Protection zone 3 defined for backup registers from BKPtR (t = BKPWSEC, from 0 to 127). They can be read or written with secure or non-secure access. If TZEN=0:\tthe protection zone 2 can be read and written with non-secure access. If BKPWSEC = 0 or if BKPWSEC BKPRWSEC: there is no protection zone 2. If BKPWPRIV is set, BKPRWSEC[7:0] can be written only in privileged mode."
|
||||
bit_offset: 16
|
||||
bit_size: 8
|
||||
- name: BHKLOCK
|
||||
description: "Boot hardware key lock. This bit can be read and can only be written to 1 by software. It is cleared by hardware together with the backup registers following a tamper detection event or when the readout protection (RDP) is disabled."
|
||||
bit_offset: 30
|
||||
bit_size: 1
|
||||
enum: BHKLOCK
|
||||
- name: TAMPSEC
|
||||
description: "Tamper protection (excluding monotonic counters and backup registers). Note: Refer to for details on the read protection."
|
||||
bit_offset: 31
|
||||
bit_size: 1
|
||||
enum: SEC
|
||||
- name: BKPRWSEC
|
||||
description: "Backup registers read/write protection offset. Protection zone 1 is defined for backup registers from BKP0R to BKPxR (x = BKPRWSEC-1, from 0 to 128). if TZEN=1, these backup registers can be read and written only with secure access. If TZEN=0:\tthe protection zone 1 can be read and written with non-secure access. If BKPRWSEC = 0: there is no protection zone 1. If BKPRWPRIV is set, BKPRWSEC[7:0] can be written only in privileged mode."
|
||||
bit_offset: 0
|
||||
bit_size: 8
|
||||
- name: CNT1SEC
|
||||
description: Monotonic counter 1 secure protection
|
||||
bit_offset: 15
|
||||
bit_size: 1
|
||||
enum: SEC
|
||||
- name: BKPWSEC
|
||||
description: "Backup registers write protection offset. Protection zone 2 is defined for backup registers from BKPyR (y = BKPRWSEC, from 0 to 128) to BKPzR (z = BKPWSEC-1, from 0 to 128, BKPWSECBKPRWSEC): if TZEN=1, these backup registers can be written only with secure access. They can be read with secure or non-secure access. Protection zone 3 defined for backup registers from BKPtR (t = BKPWSEC, from 0 to 127). They can be read or written with secure or non-secure access. If TZEN=0:\tthe protection zone 2 can be read and written with non-secure access. If BKPWSEC = 0 or if BKPWSEC BKPRWSEC: there is no protection zone 2. If BKPWPRIV is set, BKPRWSEC[7:0] can be written only in privileged mode."
|
||||
bit_offset: 16
|
||||
bit_size: 8
|
||||
- name: BHKLOCK
|
||||
description: Boot hardware key lock. This bit can be read and can only be written to 1 by software. It is cleared by hardware together with the backup registers following a tamper detection event or when the readout protection (RDP) is disabled.
|
||||
bit_offset: 30
|
||||
bit_size: 1
|
||||
enum: BHKLOCK
|
||||
- name: TAMPSEC
|
||||
description: 'Tamper protection (excluding monotonic counters and backup registers). Note: Refer to for details on the read protection.'
|
||||
bit_offset: 31
|
||||
bit_size: 1
|
||||
enum: SEC
|
||||
fieldset/SMISR:
|
||||
description: "TAMP secure masked interrupt status register"
|
||||
description: TAMP secure masked interrupt status register
|
||||
fields:
|
||||
- name: TAMPMF
|
||||
description: "TAMPx secure interrupt masked flag. This flag is set by hardware when the tamper X secure interrupt is raised."
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPMF
|
||||
description: "Internal tamper X secure interrupt masked flag. This flag is set by hardware when the internal tamper X secure interrupt is raised."
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 13
|
||||
stride: 1
|
||||
- name: TAMPMF
|
||||
description: TAMPx secure interrupt masked flag. This flag is set by hardware when the tamper X secure interrupt is raised.
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPMF
|
||||
description: Internal tamper X secure interrupt masked flag. This flag is set by hardware when the internal tamper X secure interrupt is raised.
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 13
|
||||
stride: 1
|
||||
fieldset/SR:
|
||||
description: "TAMP status register"
|
||||
description: TAMP status register
|
||||
fields:
|
||||
- name: TAMPF
|
||||
description: "TAMPx detection flag. This flag is set by hardware when a tamper detection event is detected on the TAMPx input."
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPF
|
||||
description: "Internal tamper X flag. This flag is set by hardware when a tamper detection event is detected on the internal tamper X."
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 13
|
||||
stride: 1
|
||||
- name: TAMPF
|
||||
description: TAMPx detection flag. This flag is set by hardware when a tamper detection event is detected on the TAMPx input.
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPF
|
||||
description: Internal tamper X flag. This flag is set by hardware when a tamper detection event is detected on the internal tamper X.
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 13
|
||||
stride: 1
|
||||
enum/ATCKSEL:
|
||||
bit_size: 3
|
||||
variants:
|
||||
- name: Div1
|
||||
description: RTCCLK is selected
|
||||
value: 0
|
||||
- name: Div2
|
||||
description: RTCCLK/2 is selected when (PREDIV_A+1) = 128 (actually selects 1st flip flop output)
|
||||
value: 1
|
||||
- name: Div4
|
||||
description: RTCCLK/4 is selected when (PREDIV_A+1) = 128 (actually selects 2nd flip flop output)
|
||||
value: 2
|
||||
- name: Div128
|
||||
description: RTCCLK/128 is selected when (PREDIV_A+1) = 128 (actually selects 7th flip flop output)
|
||||
value: 7
|
||||
- name: Div1
|
||||
description: RTCCLK is selected
|
||||
value: 0
|
||||
- name: Div2
|
||||
description: RTCCLK/2 is selected when (PREDIV_A+1) = 128 (actually selects 1st flip flop output)
|
||||
value: 1
|
||||
- name: Div4
|
||||
description: RTCCLK/4 is selected when (PREDIV_A+1) = 128 (actually selects 2nd flip flop output)
|
||||
value: 2
|
||||
- name: Div128
|
||||
description: RTCCLK/128 is selected when (PREDIV_A+1) = 128 (actually selects 7th flip flop output)
|
||||
value: 7
|
||||
enum/BHKLOCK:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: Unlocked
|
||||
description: The Backup registers from BKP0R to BKP7R can be accessed according to the Protection zone they belong to.
|
||||
value: 0
|
||||
- name: Locked
|
||||
description: The backup registers from BKP0R to BKP7R cannot be accessed neither in read nor in write (they are read as 0 and write ignore).
|
||||
value: 1
|
||||
- name: Unlocked
|
||||
description: The Backup registers from BKP0R to BKP7R can be accessed according to the Protection zone they belong to.
|
||||
value: 0
|
||||
- name: Locked
|
||||
description: The backup registers from BKP0R to BKP7R cannot be accessed neither in read nor in write (they are read as 0 and write ignore).
|
||||
value: 1
|
||||
enum/ERCFG:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: Unprotected
|
||||
description: Configurable device secrets are not included in the device secrets protected by TAMP peripheral
|
||||
value: 0
|
||||
- name: Protected
|
||||
description: Configurable device secrets are is included in the device secrets protected by TAMP peripheral
|
||||
value: 1
|
||||
enum/TAMPFLT:
|
||||
bit_size: 2
|
||||
variants:
|
||||
- name: NoFilter
|
||||
description: Tamper event is activated on edge of INx input transitions to the active level (no internal pull-up on INx input).
|
||||
value: 0
|
||||
- name: Filter2
|
||||
description: Tamper event is activated after 2 consecutive samples at the active level.
|
||||
value: 1
|
||||
- name: Filter4
|
||||
description: Tamper event is activated after 4 consecutive samples at the active level.
|
||||
value: 2
|
||||
- name: Filter8
|
||||
description: Tamper event is activated after 8 consecutive samples at the active level.
|
||||
value: 3
|
||||
enum/TAMPFREQ:
|
||||
bit_size: 3
|
||||
variants:
|
||||
- name: Hz_1
|
||||
description: RTCCLK / 32768 (1 Hz when RTCCLK = 32768 Hz)
|
||||
value: 0
|
||||
- name: Hz_2
|
||||
description: RTCCLK / 16384 (2 Hz when RTCCLK = 32768 Hz)
|
||||
value: 1
|
||||
- name: Hz_4
|
||||
description: RTCCLK / 8192 (4 Hz when RTCCLK = 32768 Hz)
|
||||
value: 2
|
||||
- name: Hz_8
|
||||
description: RTCCLK / 4096 (8 Hz when RTCCLK = 32768 Hz)
|
||||
value: 3
|
||||
- name: Hz_16
|
||||
description: RTCCLK / 2048 (16 Hz when RTCCLK = 32768 Hz)
|
||||
value: 4
|
||||
- name: Hz_32
|
||||
description: RTCCLK / 1024 (32 Hz when RTCCLK = 32768 Hz)
|
||||
value: 5
|
||||
- name: Hz_64
|
||||
description: RTCCLK / 512 (64 Hz when RTCCLK = 32768 Hz)
|
||||
value: 6
|
||||
- name: Hz_128
|
||||
description: RTCCLK / 256 (128 Hz when RTCCLK = 32768 Hz)
|
||||
value: 7
|
||||
enum/TAMPPRCH:
|
||||
bit_size: 2
|
||||
variants:
|
||||
- name: Cycles1
|
||||
description: 1 RTCCLK cycle
|
||||
value: 0
|
||||
- name: Cycles2
|
||||
description: 2 RTCCLK cycles
|
||||
value: 1
|
||||
- name: Cycles4
|
||||
description: 4 RTCCLK cycles
|
||||
value: 2
|
||||
- name: Cycles8
|
||||
description: 8 RTCCLK cycles
|
||||
value: 3
|
||||
- name: Unprotected
|
||||
description: Configurable device secrets are not included in the device secrets protected by TAMP peripheral
|
||||
value: 0
|
||||
- name: Protected
|
||||
description: Configurable device secrets are is included in the device secrets protected by TAMP peripheral
|
||||
value: 1
|
||||
enum/PRIV:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: Unprivileged
|
||||
description: Can be read/written with privileged or unprivileged access.
|
||||
value: 0
|
||||
- name: Privileged
|
||||
description: Can be read/written only with privileged access.
|
||||
value: 1
|
||||
- name: Unprivileged
|
||||
description: Can be read/written with privileged or unprivileged access.
|
||||
value: 0
|
||||
- name: Privileged
|
||||
description: Can be read/written only with privileged access.
|
||||
value: 1
|
||||
enum/SEC:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: NonSecure
|
||||
description: Can be written when the APB access is secure or non-secure.
|
||||
value: 0
|
||||
- name: Secure
|
||||
description: Can be written only when the APB access is secure.
|
||||
value: 1
|
||||
- name: NonSecure
|
||||
description: Can be written when the APB access is secure or non-secure.
|
||||
value: 0
|
||||
- name: Secure
|
||||
description: Can be written only when the APB access is secure.
|
||||
value: 1
|
||||
enum/TAMPFLT:
|
||||
bit_size: 2
|
||||
variants:
|
||||
- name: NoFilter
|
||||
description: Tamper event is activated on edge of INx input transitions to the active level (no internal pull-up on INx input).
|
||||
value: 0
|
||||
- name: Filter2
|
||||
description: Tamper event is activated after 2 consecutive samples at the active level.
|
||||
value: 1
|
||||
- name: Filter4
|
||||
description: Tamper event is activated after 4 consecutive samples at the active level.
|
||||
value: 2
|
||||
- name: Filter8
|
||||
description: Tamper event is activated after 8 consecutive samples at the active level.
|
||||
value: 3
|
||||
enum/TAMPFREQ:
|
||||
bit_size: 3
|
||||
variants:
|
||||
- name: Hz_1
|
||||
description: RTCCLK / 32768 (1 Hz when RTCCLK = 32768 Hz)
|
||||
value: 0
|
||||
- name: Hz_2
|
||||
description: RTCCLK / 16384 (2 Hz when RTCCLK = 32768 Hz)
|
||||
value: 1
|
||||
- name: Hz_4
|
||||
description: RTCCLK / 8192 (4 Hz when RTCCLK = 32768 Hz)
|
||||
value: 2
|
||||
- name: Hz_8
|
||||
description: RTCCLK / 4096 (8 Hz when RTCCLK = 32768 Hz)
|
||||
value: 3
|
||||
- name: Hz_16
|
||||
description: RTCCLK / 2048 (16 Hz when RTCCLK = 32768 Hz)
|
||||
value: 4
|
||||
- name: Hz_32
|
||||
description: RTCCLK / 1024 (32 Hz when RTCCLK = 32768 Hz)
|
||||
value: 5
|
||||
- name: Hz_64
|
||||
description: RTCCLK / 512 (64 Hz when RTCCLK = 32768 Hz)
|
||||
value: 6
|
||||
- name: Hz_128
|
||||
description: RTCCLK / 256 (128 Hz when RTCCLK = 32768 Hz)
|
||||
value: 7
|
||||
enum/TAMPPRCH:
|
||||
bit_size: 2
|
||||
variants:
|
||||
- name: Cycles1
|
||||
description: 1 RTCCLK cycle
|
||||
value: 0
|
||||
- name: Cycles2
|
||||
description: 2 RTCCLK cycles
|
||||
value: 1
|
||||
- name: Cycles4
|
||||
description: 4 RTCCLK cycles
|
||||
value: 2
|
||||
- name: Cycles8
|
||||
description: 8 RTCCLK cycles
|
||||
value: 3
|
||||
enum/TAMPTRG:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: FilteredLowOrUnfilteredHigh
|
||||
description: "If TAMPFLT 00 Tamper 2 input staying low triggers a tamper detection event. "
|
||||
value: 0
|
||||
- name: FilteredHighOrUnfilteredLow
|
||||
description: "If TAMPFLT 00 Tamper 2 input staying high triggers a tamper detection event. "
|
||||
value: 1
|
||||
- name: FilteredLowOrUnfilteredHigh
|
||||
description: If TAMPFLT 00 Tamper 2 input staying low triggers a tamper detection event.
|
||||
value: 0
|
||||
- name: FilteredHighOrUnfilteredLow
|
||||
description: If TAMPFLT 00 Tamper 2 input staying high triggers a tamper detection event.
|
||||
value: 1
|
||||
|
@ -1,293 +1,293 @@
|
||||
block/TAMP:
|
||||
description: Tamper and backup registers
|
||||
items:
|
||||
- name: CR1
|
||||
description: control register 1
|
||||
byte_offset: 0
|
||||
fieldset: CR1
|
||||
- name: CR2
|
||||
description: control register 2
|
||||
byte_offset: 4
|
||||
fieldset: CR2
|
||||
- name: CR3
|
||||
description: TAMP control register 3
|
||||
byte_offset: 8
|
||||
fieldset: CR3
|
||||
- name: FLTCR
|
||||
description: TAMP filter control register
|
||||
byte_offset: 12
|
||||
fieldset: FLTCR
|
||||
- name: IER
|
||||
description: TAMP interrupt enable register
|
||||
byte_offset: 44
|
||||
fieldset: IER
|
||||
- name: SR
|
||||
description: TAMP status register
|
||||
byte_offset: 48
|
||||
access: Read
|
||||
fieldset: SR
|
||||
- name: MISR
|
||||
description: TAMP masked interrupt status register
|
||||
byte_offset: 52
|
||||
access: Read
|
||||
fieldset: MISR
|
||||
- name: SCR
|
||||
description: TAMP status clear register
|
||||
byte_offset: 60
|
||||
access: Write
|
||||
fieldset: SCR
|
||||
- name: COUNTR
|
||||
description: monotonic counter register
|
||||
byte_offset: 64
|
||||
access: Read
|
||||
fieldset: COUNTR
|
||||
- name: BKPR
|
||||
description: TAMP backup register
|
||||
array:
|
||||
len: 20
|
||||
stride: 4
|
||||
byte_offset: 256
|
||||
fieldset: BKPR
|
||||
- name: CR1
|
||||
description: control register 1
|
||||
byte_offset: 0
|
||||
fieldset: CR1
|
||||
- name: CR2
|
||||
description: control register 2
|
||||
byte_offset: 4
|
||||
fieldset: CR2
|
||||
- name: CR3
|
||||
description: TAMP control register 3
|
||||
byte_offset: 8
|
||||
fieldset: CR3
|
||||
- name: FLTCR
|
||||
description: TAMP filter control register
|
||||
byte_offset: 12
|
||||
fieldset: FLTCR
|
||||
- name: IER
|
||||
description: TAMP interrupt enable register
|
||||
byte_offset: 44
|
||||
fieldset: IER
|
||||
- name: SR
|
||||
description: TAMP status register
|
||||
byte_offset: 48
|
||||
access: Read
|
||||
fieldset: SR
|
||||
- name: MISR
|
||||
description: TAMP masked interrupt status register
|
||||
byte_offset: 52
|
||||
access: Read
|
||||
fieldset: MISR
|
||||
- name: SCR
|
||||
description: TAMP status clear register
|
||||
byte_offset: 60
|
||||
access: Write
|
||||
fieldset: SCR
|
||||
- name: COUNTR
|
||||
description: monotonic counter register
|
||||
byte_offset: 64
|
||||
access: Read
|
||||
fieldset: COUNTR
|
||||
- name: BKPR
|
||||
description: TAMP backup register
|
||||
array:
|
||||
len: 20
|
||||
stride: 4
|
||||
byte_offset: 256
|
||||
fieldset: BKPR
|
||||
fieldset/BKPR:
|
||||
description: TAMP backup register
|
||||
fields:
|
||||
- name: BKP
|
||||
description: BKP
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
- name: BKP
|
||||
description: BKP
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/COUNTR:
|
||||
description: monotonic counter register
|
||||
fields:
|
||||
- name: COUNT
|
||||
description: COUNT
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
- name: COUNT
|
||||
description: COUNT
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/CR1:
|
||||
description: control register 1
|
||||
fields:
|
||||
- name: TAMPE
|
||||
description: Tamper detection on IN X enable
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: ITAMPE
|
||||
description: Internal tamper X enable
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: TAMPE
|
||||
description: Tamper detection on IN X enable
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: ITAMPE
|
||||
description: Internal tamper X enable
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
fieldset/CR2:
|
||||
description: control register 2
|
||||
fields:
|
||||
- name: TAMPNOER
|
||||
description: Tamper X no erase
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: TAMPMSK
|
||||
description: Tamper X mask. The tamper X interrupt must not be enabled when TAMPMSK is set.
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
enum: TAMPMSK
|
||||
- name: BKERASE
|
||||
description: Backup registers erase
|
||||
bit_offset: 23
|
||||
bit_size: 1
|
||||
enum: BKERASE
|
||||
- name: TAMPTRG
|
||||
description: Active level for tamper X input
|
||||
bit_offset: 24
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
enum: TAMPTRG
|
||||
- name: TAMPNOER
|
||||
description: Tamper X no erase
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: TAMPMSK
|
||||
description: Tamper X mask. The tamper X interrupt must not be enabled when TAMPMSK is set.
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
enum: TAMPMSK
|
||||
- name: BKERASE
|
||||
description: Backup registers erase
|
||||
bit_offset: 23
|
||||
bit_size: 1
|
||||
enum: BKERASE
|
||||
- name: TAMPTRG
|
||||
description: Active level for tamper X input
|
||||
bit_offset: 24
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
enum: TAMPTRG
|
||||
fieldset/CR3:
|
||||
description: TAMP control register 3
|
||||
fields:
|
||||
- name: ITAMPNOER
|
||||
description: Internal Tamper X no erase
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: ITAMPNOER
|
||||
description: Internal Tamper X no erase
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
fieldset/FLTCR:
|
||||
description: TAMP filter control register
|
||||
fields:
|
||||
- name: TAMPFREQ
|
||||
description: "Tamper sampling frequency. Determines the frequency at which each of the INx inputs are sampled."
|
||||
bit_offset: 0
|
||||
bit_size: 3
|
||||
enum: TAMPFREQ
|
||||
- name: TAMPFLT
|
||||
description: "INx filter count. These bits determines the number of consecutive samples at the specified level (TAMP*TRG) needed to activate a tamper event. TAMPFLT is valid for each of the INx inputs."
|
||||
bit_offset: 3
|
||||
bit_size: 2
|
||||
enum: TAMPFLT
|
||||
- name: TAMPPRCH
|
||||
description: "INx precharge duration. These bit determines the duration of time during which the pull-up/is activated before each sample. TAMPPRCH is valid for each of the INx inputs."
|
||||
bit_offset: 5
|
||||
bit_size: 2
|
||||
enum: TAMPPRCH
|
||||
- name: TAMPPUDIS
|
||||
description: "INx pull-up disable. This bit determines if each of the TAMPx pins are precharged before each sample."
|
||||
bit_offset: 7
|
||||
bit_size: 1
|
||||
- name: TAMPFREQ
|
||||
description: Tamper sampling frequency. Determines the frequency at which each of the INx inputs are sampled.
|
||||
bit_offset: 0
|
||||
bit_size: 3
|
||||
enum: TAMPFREQ
|
||||
- name: TAMPFLT
|
||||
description: INx filter count. These bits determines the number of consecutive samples at the specified level (TAMP*TRG) needed to activate a tamper event. TAMPFLT is valid for each of the INx inputs.
|
||||
bit_offset: 3
|
||||
bit_size: 2
|
||||
enum: TAMPFLT
|
||||
- name: TAMPPRCH
|
||||
description: INx precharge duration. These bit determines the duration of time during which the pull-up/is activated before each sample. TAMPPRCH is valid for each of the INx inputs.
|
||||
bit_offset: 5
|
||||
bit_size: 2
|
||||
enum: TAMPPRCH
|
||||
- name: TAMPPUDIS
|
||||
description: INx pull-up disable. This bit determines if each of the TAMPx pins are precharged before each sample.
|
||||
bit_offset: 7
|
||||
bit_size: 1
|
||||
fieldset/IER:
|
||||
description: TAMP interrupt enable register
|
||||
fields:
|
||||
- name: TAMPIE
|
||||
description: Tamper X interrupt enable
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: ITAMPIE
|
||||
description: Internal tamper X interrupt enable
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: TAMPIE
|
||||
description: Tamper X interrupt enable
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: ITAMPIE
|
||||
description: Internal tamper X interrupt enable
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
fieldset/MISR:
|
||||
description: TAMP masked interrupt status register
|
||||
fields:
|
||||
- name: TAMPMF
|
||||
description: Tamper X interrupt masked flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: ITAMPMF
|
||||
description: Internal tamper X interrupt masked flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: TAMPMF
|
||||
description: Tamper X interrupt masked flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: ITAMPMF
|
||||
description: Internal tamper X interrupt masked flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
fieldset/SCR:
|
||||
description: TAMP status clear register
|
||||
fields:
|
||||
- name: CTAMPF
|
||||
description: Clear tamper X detection flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: CITAMPF
|
||||
description: Clear internal tamper X detection flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: CTAMPF
|
||||
description: Clear tamper X detection flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: CITAMPF
|
||||
description: Clear internal tamper X detection flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
fieldset/SR:
|
||||
description: TAMP status register
|
||||
fields:
|
||||
- name: TAMPF
|
||||
description: Tamper X detection flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: ITAMPF
|
||||
description: Internal tamper X detection flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
- name: TAMPF
|
||||
description: Tamper X detection flag
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 3
|
||||
stride: 1
|
||||
- name: ITAMPF
|
||||
description: Internal tamper X detection flag
|
||||
bit_offset: 16
|
||||
bit_size: 1
|
||||
array:
|
||||
len: 8
|
||||
stride: 1
|
||||
enum/BKERASE:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: Reset
|
||||
description: Reset backup registers
|
||||
value: 1
|
||||
- name: Reset
|
||||
description: Reset backup registers
|
||||
value: 1
|
||||
enum/TAMPFLT:
|
||||
bit_size: 2
|
||||
variants:
|
||||
- name: NoFilter
|
||||
description: 'Tamper event is activated on edge of TAMP_INx input transitions to the active level (no internal pull-up on TAMP_INx input)"'
|
||||
value: 0
|
||||
- name: Filter2
|
||||
description: 'Tamper event is activated after 2 consecutive samples at the active level"'
|
||||
value: 1
|
||||
- name: Filter4
|
||||
description: 'Tamper event is activated after 4 consecutive samples at the active level"'
|
||||
value: 2
|
||||
- name: Filter8
|
||||
description: 'Tamper event is activated after 8 consecutive samples at the active level"'
|
||||
value: 3
|
||||
- name: NoFilter
|
||||
description: Tamper event is activated on edge of TAMP_INx input transitions to the active level (no internal pull-up on TAMP_INx input)"
|
||||
value: 0
|
||||
- name: Filter2
|
||||
description: Tamper event is activated after 2 consecutive samples at the active level"
|
||||
value: 1
|
||||
- name: Filter4
|
||||
description: Tamper event is activated after 4 consecutive samples at the active level"
|
||||
value: 2
|
||||
- name: Filter8
|
||||
description: Tamper event is activated after 8 consecutive samples at the active level"
|
||||
value: 3
|
||||
enum/TAMPFREQ:
|
||||
bit_size: 3
|
||||
variants:
|
||||
- name: Hz_1
|
||||
description: RTCCLK / 32768 (1 Hz when RTCCLK = 32768 Hz)
|
||||
value: 0
|
||||
- name: Hz_2
|
||||
description: RTCCLK / 16384 (2 Hz when RTCCLK = 32768 Hz)
|
||||
value: 1
|
||||
- name: Hz_4
|
||||
description: RTCCLK / 8192 (4 Hz when RTCCLK = 32768 Hz)
|
||||
value: 2
|
||||
- name: Hz_8
|
||||
description: RTCCLK / 4096 (8 Hz when RTCCLK = 32768 Hz)
|
||||
value: 3
|
||||
- name: Hz_16
|
||||
description: RTCCLK / 2048 (16 Hz when RTCCLK = 32768 Hz)
|
||||
value: 4
|
||||
- name: Hz_32
|
||||
description: RTCCLK / 1024 (32 Hz when RTCCLK = 32768 Hz)
|
||||
value: 5
|
||||
- name: Hz_64
|
||||
description: RTCCLK / 512 (64 Hz when RTCCLK = 32768 Hz)
|
||||
value: 6
|
||||
- name: Hz_128
|
||||
description: RTCCLK / 256 (128 Hz when RTCCLK = 32768 Hz)
|
||||
value: 7
|
||||
- name: Hz_1
|
||||
description: RTCCLK / 32768 (1 Hz when RTCCLK = 32768 Hz)
|
||||
value: 0
|
||||
- name: Hz_2
|
||||
description: RTCCLK / 16384 (2 Hz when RTCCLK = 32768 Hz)
|
||||
value: 1
|
||||
- name: Hz_4
|
||||
description: RTCCLK / 8192 (4 Hz when RTCCLK = 32768 Hz)
|
||||
value: 2
|
||||
- name: Hz_8
|
||||
description: RTCCLK / 4096 (8 Hz when RTCCLK = 32768 Hz)
|
||||
value: 3
|
||||
- name: Hz_16
|
||||
description: RTCCLK / 2048 (16 Hz when RTCCLK = 32768 Hz)
|
||||
value: 4
|
||||
- name: Hz_32
|
||||
description: RTCCLK / 1024 (32 Hz when RTCCLK = 32768 Hz)
|
||||
value: 5
|
||||
- name: Hz_64
|
||||
description: RTCCLK / 512 (64 Hz when RTCCLK = 32768 Hz)
|
||||
value: 6
|
||||
- name: Hz_128
|
||||
description: RTCCLK / 256 (128 Hz when RTCCLK = 32768 Hz)
|
||||
value: 7
|
||||
enum/TAMPMSK:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: ResetBySoftware
|
||||
description: Tamper x event generates a trigger event and TAMPxF must be cleared by software to allow next tamper event detection
|
||||
value: 0
|
||||
- name: ResetByHardware
|
||||
description: Tamper x event generates a trigger event. TAMPxF is masked and internally cleared by hardware. The backup registers are not erased. The tamper x interrupt must not be enabled when TAMP3MSK is set
|
||||
value: 1
|
||||
- name: ResetBySoftware
|
||||
description: Tamper x event generates a trigger event and TAMPxF must be cleared by software to allow next tamper event detection
|
||||
value: 0
|
||||
- name: ResetByHardware
|
||||
description: Tamper x event generates a trigger event. TAMPxF is masked and internally cleared by hardware. The backup registers are not erased. The tamper x interrupt must not be enabled when TAMP3MSK is set
|
||||
value: 1
|
||||
enum/TAMPPRCH:
|
||||
bit_size: 2
|
||||
variants:
|
||||
- name: Cycles1
|
||||
description: 1 RTCCLK cycle
|
||||
value: 0
|
||||
- name: Cycles2
|
||||
description: 2 RTCCLK cycles
|
||||
value: 1
|
||||
- name: Cycles4
|
||||
description: 4 RTCCLK cycles
|
||||
value: 2
|
||||
- name: Cycles8
|
||||
description: 8 RTCCLK cycles
|
||||
value: 3
|
||||
- name: Cycles1
|
||||
description: 1 RTCCLK cycle
|
||||
value: 0
|
||||
- name: Cycles2
|
||||
description: 2 RTCCLK cycles
|
||||
value: 1
|
||||
- name: Cycles4
|
||||
description: 4 RTCCLK cycles
|
||||
value: 2
|
||||
- name: Cycles8
|
||||
description: 8 RTCCLK cycles
|
||||
value: 3
|
||||
enum/TAMPTRG:
|
||||
bit_size: 1
|
||||
variants:
|
||||
- name: FilteredLowOrUnfilteredHigh
|
||||
description: If TAMPFLT != 00 Tamper x input staying low triggers a tamper detection event. If TAMPFLT = 00 Tamper x input rising edge and high level triggers a tamper detection event
|
||||
value: 0
|
||||
- name: FilteredHighOrUnfilteredLow
|
||||
description: If TAMPFLT != 00 Tamper x input staying high triggers a tamper detection event. If TAMPFLT = 00 Tamper x input falling edge and low level triggers a tamper detection event
|
||||
value: 1
|
||||
- name: FilteredLowOrUnfilteredHigh
|
||||
description: If TAMPFLT != 00 Tamper x input staying low triggers a tamper detection event. If TAMPFLT = 00 Tamper x input rising edge and high level triggers a tamper detection event
|
||||
value: 0
|
||||
- name: FilteredHighOrUnfilteredLow
|
||||
description: If TAMPFLT != 00 Tamper x input staying high triggers a tamper detection event. If TAMPFLT = 00 Tamper x input falling edge and low level triggers a tamper detection event
|
||||
value: 1
|
||||
|
Loading…
x
Reference in New Issue
Block a user