456 Commits

Author SHA1 Message Date
Philip A Reimer
5f64d3d148 arrayify l4 power control registers 2022-04-09 11:05:50 -06:00
Philip A Reimer
e81eeb157e add pwr_l4 2022-04-09 11:05:50 -06:00
Dario Nieuwenhuis
c90234583e RCC: fix USBFS -> USB 2022-04-09 00:43:48 +02:00
Dario Nieuwenhuis
6107d5a72e Add USB 2022-04-09 00:28:44 +02:00
Dario Nieuwenhuis
b5d84de6e6 L5: add FLASH, SYSCFG 2022-04-08 02:54:56 +02:00
Dario Nieuwenhuis
eb678443a3 L5: fix RCC 2022-04-08 02:54:37 +02:00
Dario Nieuwenhuis
1d5853be40 run chiptool fmt with new version that trims descriptions. 2022-04-08 01:17:53 +02:00
Dario Nieuwenhuis
b797baeb14 Merge pull request #136 from ant32/main
Use OTG v1 for v3
2022-03-30 01:27:02 +02:00
chemicstry
1d9e453670 Add missing timer ITR3 field 2022-03-30 01:59:08 +03:00
Philip A Reimer
62ebc483f9 use otg v1 for v3 2022-03-28 22:37:11 -06:00
Philip A Reimer
55163d5857 Add OTG FS v3 2022-03-24 21:16:11 -06:00
Nicolas Viennot
4ed9a42360 Add OTG register definitions 2022-03-20 19:07:24 -04:00
Dario Nieuwenhuis
b5ffa60b5f Merge pull request #133 from nviennot/fsmc
FSMC register block
2022-03-20 21:01:20 +01:00
Dario Nieuwenhuis
d5b53707d0 Merge pull request #132 from Gekkio/improve-f2-support
F2: Add SYSCFG/FLASH/PWR, fix DBGMCU SVD typos
2022-03-20 20:59:33 +01:00
Nicolas Viennot
f9301d42f0 Add the FSMC register block
The current v1 yaml has a few extra registers defined that don't belong to
some of the chips out there (the ones at byte_offset 320 and above), but
the rest of registers are identical.
2022-03-18 23:41:56 -04:00
Joonas Javanainen
f622be8f03 Add PWR block for F2
Verified using RM0033 (F205xx/F207xx/F215xx/F217xx) Rev 9
2022-03-17 21:44:23 +02:00
Joonas Javanainen
dfc24f37fd Fix F2 DBGMCU typos
The typos come from the original SVD files
2022-03-17 21:37:27 +02:00
Joonas Javanainen
e36b972e3c Add FLASH block for F2
Verified using PM0059 Programming manual (F205/215, F207/217) Rev 5
2022-03-17 21:32:59 +02:00
Joonas Javanainen
b47951b4a2 Add SYSCFG block for F2
Verified using RM0033 (F205xx/F207xx/F215xx/F217xx) Rev 9
2022-03-17 21:32:37 +02:00
chemicstry
410790c595 Update fieldset 2022-03-16 19:18:12 +02:00
chemicstry
802a2b8a29 Update fieldset 2022-03-16 18:50:55 +02:00
chemicstry
d29a2a3d20 Update fieldset 2022-03-16 18:48:50 +02:00
chemicstry
118dde4d4c Fix fieldset 2022-03-16 18:44:25 +02:00
chemicstry
caa613eab2 Unify SDMMC register names 2022-03-16 18:40:36 +02:00
Matthew W. Samsonoff
03b2707944 stm32g0: fix embarrassing typo 2022-03-02 11:45:26 -05:00
Matthew W. Samsonoff
1a4706a799 stm32g0: add registers for FLASH 2022-03-02 11:27:38 -05:00
Matthew W. Samsonoff
57903f105d stm32g0: add enums for RCC 2022-03-02 11:27:33 -05:00
Matthew W. Samsonoff
14a26e9edd stm32g0: fix typo 2022-03-02 11:26:45 -05:00
Matthew W. Samsonoff
0f5292f20e stm32g0: CCIPR2/USBSEL is two bits wide 2022-03-02 11:26:38 -05:00
Dario Nieuwenhuis
324e5bee8d rcc/h7: add missing stuff, cleanup. 2022-02-24 05:54:43 +01:00
Dario Nieuwenhuis
b6bccb1456 cleanup gpio regs. 2022-02-24 01:59:57 +01:00
Dario Nieuwenhuis
85854d8f42 usart_v2: fix wrong M1 bit 2022-02-14 02:07:49 +01:00
Dario Nieuwenhuis
fde7738019 flash/u5: fix inconsistent BKPRAM vs BKPSRAM 2022-02-14 02:07:33 +01:00
Dario Nieuwenhuis
9b32ce66b6 mdios: fix accidentally merge-regs'd file. 2022-02-14 02:07:20 +01:00
Dario Nieuwenhuis
c2804abc9a rcc: fix inconsistent naming. 2022-02-14 02:07:08 +01:00
Dario Nieuwenhuis
2c5e858584 chiptool fmt 2022-02-14 00:45:36 +01:00
Dario Nieuwenhuis
7b2df420ac rcc: remove useless enums. 2022-02-14 00:26:46 +01:00
Dario Nieuwenhuis
66ecaf8b98 rcc: unify rcc_f0, rcc_f0x0 2022-02-14 00:25:12 +01:00
Dario Nieuwenhuis
fcd18b3e3d i2c: cleanup a bit. 2022-02-13 23:21:48 +01:00
Dario Nieuwenhuis
5365ea053a split "magic" block string into an object, so consumers don't have to do tricky parsing. 2022-02-07 23:12:40 +01:00
Dario Nieuwenhuis
7b368b0035 move memory parsing to own file 2022-02-07 02:06:23 +01:00
Dario Nieuwenhuis
48fdf50203 Change peripherals from dict to array 2022-02-07 02:05:30 +01:00
Dario Nieuwenhuis
f79e304d07 u5/rcc: fix inconsistent DCMI bit names 2022-02-05 03:02:57 +01:00
Dario Nieuwenhuis
048f6766fd lpuart: cleanup v1, v2. Merge v2 and v3 2022-02-05 00:59:20 +01:00
Maarten Oosting
6b86d9e104 LPUART: Add registers 2022-02-05 00:59:20 +01:00
chemicstry
2aaec03094 Fix USB OTG field names in RCC registers 2022-02-04 03:34:08 +02:00
Dario Nieuwenhuis
61bca5a789 rcc/g0: add lots of missing bits 2022-01-24 02:13:53 +01:00
Dario Nieuwenhuis
11290fd274 rcc: make GPIOxEN/IOPxEN consistent. 2022-01-24 02:13:24 +01:00
Greg V
76572f3d55 Add flash for STM32L1
NOTE: named 'Flash' instead of 'FLASH' in SVD
2022-01-14 16:50:35 +03:00
Matous Hybl
2c7984f962 Unify SPI LSBFirst enums. 2022-01-14 10:23:27 +01:00