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stm32g0: CCIPR2/USBSEL is two bits wide

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Matthew W. Samsonoff 2022-03-02 11:19:11 -05:00
parent ce7ba764c9
commit 0f5292f20e
1 changed files with 1 additions and 1 deletions
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data/registers/rcc_g0.yaml
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@ -792,7 +792,7 @@ fieldset/CCIPR2:
- name: USBSEL
description: USBSEL
bit_offset: 12
bit_size: 1
bit_size: 2
fieldset/CFGR:
description: Clock configuration register
fields: