Bob McWhirter
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0358c950da
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Change d to just clone the -sources repository.
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2021-10-28 13:48:36 -04:00 |
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Dario Nieuwenhuis
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09c1a7102a
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Merge pull request #93 from bgamari/wip/lptim
stm32g0: Add support for LPTIM peripherals
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2021-10-26 17:57:15 +02:00 |
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Ben Gamari
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2f42ebcd2c
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Add support for LPTIM peripherals
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2021-10-26 17:55:48 +02:00 |
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Dario Nieuwenhuis
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6bedd95ce1
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Merge pull request #92 from matoushybl/f7-support
Initial support for STM32F767ZI.
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2021-10-26 17:21:47 +02:00 |
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Matous Hybl
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2e1302c4e8
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Support for STM32F767ZI and basic support for the rest of the family.
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2021-10-25 10:38:28 +02:00 |
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Ulf Lilleengen
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a90f756dda
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Merge pull request #91 from topisani/main
feat: Add F1 SPI registers
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2021-10-07 13:54:48 +02:00 |
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Tobias Pisani
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b8de47fa04
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feat: Add F1 SPI registers
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2021-10-06 20:51:27 +02:00 |
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Dario Nieuwenhuis
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6caf69650a
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Merge pull request #90 from mryndzionek/dev
Added AFIO block definition to STM32F103C8 chip
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2021-09-27 16:04:27 +02:00 |
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Mariusz Ryndzionek
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9e6eff587c
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Correct AFIO support (code review request)
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2021-09-27 15:35:29 +02:00 |
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Dario Nieuwenhuis
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fccbab0aae
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Merge pull request #89 from theunkn0wn1/feature/crc32
F4 CRC peripheral
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2021-09-27 00:30:21 +02:00 |
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Dario Nieuwenhuis
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f6ce6dc36b
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CRC register cleanup
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2021-09-27 00:26:24 +02:00 |
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Joshua Salzedo
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fb4d8b7033
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Add CRC rules to parse.py
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2021-09-26 15:09:45 -07:00 |
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Joshua Salzedo
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24dabf68e5
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Add three distinct versions of CRC
- remove F4 specific version
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2021-09-26 14:58:47 -07:00 |
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Joshua Salzedo
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a8a8b88661
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add CRC32 peripheral for the F4 family
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2021-09-24 16:59:18 -07:00 |
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Dario Nieuwenhuis
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9752672268
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Merge pull request #88 from FrozenDroid/add-l4-flash
Add L4 flash register
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2021-09-24 18:30:52 +02:00 |
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Vincent Stakenburg
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97fd020941
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add l4 flash register
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2021-09-24 16:45:59 +02:00 |
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Vincent Stakenburg
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f699571831
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add l4 flash parse line
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2021-09-24 16:45:17 +02:00 |
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Dario Nieuwenhuis
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e317d781d8
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Merge pull request #87 from mryndzionek/stm32f1_support
Updated register mapping for STM32 F1 AFIO
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2021-09-23 18:57:52 +02:00 |
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Mariusz Ryndzionek
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8dde100c15
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Updated register mapping for STM32 F1 AFIO
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2021-09-23 18:54:22 +02:00 |
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Dario Nieuwenhuis
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5dec590202
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Merge pull request #85 from mryndzionek/stm32f1_support
Add initial register mapping for STM32 F1 AFIO and FLASH
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2021-09-23 17:36:38 +02:00 |
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Ulf Lilleengen
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f1e7e9ef84
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Merge pull request #86 from lulf/stm32l1-pwr-and-fix
Add PWR register block and fix RCC register block
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2021-09-23 14:42:49 +02:00 |
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Ulf Lilleengen
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a302947e87
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Add PWR register block and fix RCC register block
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2021-09-23 14:40:59 +02:00 |
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Mariusz Ryndzionek
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fbea23bd00
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Added missing FLASH registers (generated automatically)
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2021-09-23 07:09:11 +02:00 |
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Mariusz Ryndzionek
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c0938c9102
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Add initial register mapping for STM32 F1 AFIO and FLASH
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2021-09-22 18:22:36 +02:00 |
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Dario Nieuwenhuis
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1d62ba5e14
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Merge pull request #84 from lulf/l1-regs
L1 regs
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2021-09-15 14:55:09 +02:00 |
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Ulf Lilleengen
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9f1bd7d0d0
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Update chip yaml
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2021-09-15 14:47:33 +02:00 |
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Ulf Lilleengen
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e2bf041808
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Add register mapping for STM32 L1 SYSCFG and DBGMCU
Add missing GPIO port mapping
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2021-09-15 14:47:01 +02:00 |
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Dario Nieuwenhuis
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616a2779d0
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Merge pull request #82 from bgamari/stm32g0
Fix ADC register layout on STM32G0
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2021-08-31 22:21:51 +02:00 |
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Dario Nieuwenhuis
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96c902c66c
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Merge pull request #83 from lulf/stm32wl55-pwr
Stm32wl55 pwr
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2021-08-31 22:18:57 +02:00 |
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Ulf Lilleengen
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201510407c
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Handle SUBGHZSPI peripheral so it is recognized as an SPI peripheral
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2021-08-31 14:43:02 +02:00 |
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Ulf Lilleengen
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902b9a6986
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Add PWR peripheral for STM32WL5
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2021-08-31 14:34:54 +02:00 |
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Ben Gamari
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3a88360dc6
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Add PWR registers for STM32G0
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2021-08-31 01:46:26 -04:00 |
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Ben Gamari
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5366833cbd
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Introduce ADC register set for STM32G0
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2021-08-31 01:46:02 -04:00 |
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Dario Nieuwenhuis
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deb37365d7
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exti: g0 and l5 are 8 bits per line...
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2021-08-20 01:26:33 +02:00 |
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Dario Nieuwenhuis
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8534ae884d
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rcc: make GPIO EN/RST regs naming consistent.
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2021-08-19 23:50:42 +02:00 |
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Dario Nieuwenhuis
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3b6363dffb
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wl rcc: rename SPI2S2 -> SPI2
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2021-08-19 22:37:07 +02:00 |
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Dario Nieuwenhuis
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49e579e97f
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Add F2 RCC
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2021-08-19 22:12:39 +02:00 |
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Dario Nieuwenhuis
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e289dd883f
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Cleanup EXTI
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2021-08-19 21:54:22 +02:00 |
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Dario Nieuwenhuis
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701ab04c2a
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Cleanup SYSCFG naming
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2021-08-19 21:28:32 +02:00 |
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Dario Nieuwenhuis
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31997049ea
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Fix wrong register offsets in WB SYSCFG
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2021-08-19 19:20:13 +02:00 |
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Dario Nieuwenhuis
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6af9f2c0d1
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Add RCC for F3, F7, G4, H7AB, L1, L5, WB*, WL5, WLE
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2021-08-19 19:13:30 +02:00 |
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Dario Nieuwenhuis
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bd402a58f2
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Merge pull request #72 from bgamari/stm32g0
STM32G0 support
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2021-08-19 16:05:29 +02:00 |
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Ben Gamari
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254c59c064
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Introduce STM32G0 ADC support
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2021-08-19 15:57:17 +02:00 |
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Ben Gamari
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f57a268b9f
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Add STM32G0 support
Includes manually specified register layouts for EXTI and SYSCFG.
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2021-08-19 15:57:00 +02:00 |
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Ben Gamari
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075d283354
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parse: Drop duplicate pin definitions
The STM32G0 SVDs contain duplicate pin declarations.
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2021-08-19 15:55:13 +02:00 |
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Ben Gamari
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9c753da57b
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Add a bit of documentation for register extraction process
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2021-08-19 15:54:36 +02:00 |
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Ben Gamari
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f5808de749
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Add RCC support for STM32G0
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2021-08-19 15:54:36 +02:00 |
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Ben Gamari
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e735ea9769
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Fix hash-bangs
/usr/bin/bash isn't portable.
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2021-08-19 15:54:36 +02:00 |
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Dario Nieuwenhuis
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8bb9c26d38
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Update README.md
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2021-08-18 22:17:16 +02:00 |
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Dario Nieuwenhuis
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f0e85a7e0d
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Merge pull request #81 from embassy-rs/add-wl55-radio-spi
Add wl55 radio spi
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2021-08-18 15:21:45 +02:00 |
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