9 Commits

Author SHA1 Message Date
Matthew W. Samsonoff
14a26e9edd stm32g0: fix typo 2022-03-02 11:26:45 -05:00
Matthew W. Samsonoff
0f5292f20e stm32g0: CCIPR2/USBSEL is two bits wide 2022-03-02 11:26:38 -05:00
Dario Nieuwenhuis
c2804abc9a rcc: fix inconsistent naming. 2022-02-14 02:07:08 +01:00
Dario Nieuwenhuis
7b2df420ac rcc: remove useless enums. 2022-02-14 00:26:46 +01:00
Dario Nieuwenhuis
61bca5a789 rcc/g0: add lots of missing bits 2022-01-24 02:13:53 +01:00
Dario Nieuwenhuis
11290fd274 rcc: make GPIOxEN/IOPxEN consistent. 2022-01-24 02:13:24 +01:00
Dario Nieuwenhuis
c6c5c099bb fmt all register yamls 2021-11-17 21:23:26 +01:00
Dario Nieuwenhuis
8534ae884d rcc: make GPIO EN/RST regs naming consistent. 2021-08-19 23:50:42 +02:00
Ben Gamari
f5808de749 Add RCC support for STM32G0 2021-08-19 15:54:36 +02:00