guangzong/stm32-data
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  • 47a5753bef TSC: Add new TSCperipheral to perimap JackN 2023-10-16 10:25:09 -04:00
  • 120168456f TSC: Add transform and new peripheral JackN 2023-10-16 09:54:09 -04:00
  • 9330e31117 rng: add wb support. Dario Nieuwenhuis 2023-10-16 04:58:26 +02:00
  • 5ecc410f93 rcc/l5: cleanup Dario Nieuwenhuis 2023-10-16 03:56:19 +02:00
  • 73e3f8a965 rcc: separate L4 and L4+ Dario Nieuwenhuis 2023-10-16 03:11:00 +02:00
  • f437c33b41 rcc/l5: unify clk48sel vs clk48msel Dario Nieuwenhuis 2023-10-16 01:37:21 +02:00
  • 01a757e40d
         Merge pull request #288 from xoviat/rcc xoviat 2023-10-15 23:13:43 +00:00
  • b9a89a1851 rcc: cleanup variants and rename ahb -> clk xoviat 2023-10-15 18:01:50 -05:00
  • 8b8686a852 rcc: more mux and enum cleanup xoviat 2023-10-15 10:37:36 -05:00
  • 7dafe9d8bb
         Merge pull request #287 from xoviat/rcc xoviat 2023-10-14 22:30:36 +00:00
  • eba564ca68 Merge branch 'main' of https://github.com/embassy-rs/stm32-data into rcc xoviat 2023-10-14 17:25:52 -05:00
  • 5d51e3b706 rcc: add more mux data xoviat 2023-10-14 17:20:25 -05:00
  • e6e51db6cd
         Merge pull request #285 from xoviat/rcc xoviat 2023-10-14 16:47:16 +00:00
  • 68d77f487b rcc: add more mux data xoviat 2023-10-14 11:41:21 -05:00
  • 76adedfbf2 move transforms to folder xoviat 2023-10-14 10:17:10 -05:00
  • e4a769aa67
         Merge pull request #284 from xoviat/rcc xoviat 2023-10-14 03:33:00 +00:00
  • b14427f2d1 Merge branch 'main' of https://github.com/embassy-rs/stm32-data into rcc xoviat 2023-10-13 22:22:05 -05:00
  • 8a09bbb62c rcc: more cleanup xoviat 2023-10-13 22:20:18 -05:00
  • 0df3b9cbb7
         Merge pull request #283 from xoviat/sort-ir xoviat 2023-10-14 02:57:03 +00:00
  • fc4881f7b5 metapac-gen: sort ir xoviat 2023-10-13 21:52:35 -05:00
  • e90a83a4f0
         Merge pull request #281 from noppej/gfxmmu xoviat 2023-10-14 02:26:15 +00:00
  • 06e776c04a
         Merge pull request #282 from xoviat/rcc xoviat 2023-10-14 02:02:45 +00:00
  • f81c15c0b7 Merge branch 'main' of https://github.com/embassy-rs/stm32-data into rcc xoviat 2023-10-13 20:56:36 -05:00
  • aa5e909e11 rcc: more enum cleanup xoviat 2023-10-13 20:54:24 -05:00
  • bcaacfcfa2 GFXMMU: Add transform to automate cleanup and array creation. JackN 2023-10-13 17:15:33 -04:00
  • 0f0517404e GFXMMU: Add new peripherals to perimap JackN 2023-10-13 17:12:12 -04:00
  • 53c636386b GFXMMU: New peripheral yamls JackN 2023-10-13 16:55:44 -04:00
  • 48199eea42 Update transform*.yaml with new serde-yaml syntax JackN 2023-10-13 13:04:03 -04:00
  • 65a6b20e60
         Merge pull request #280 from xoviat/rcc xoviat 2023-10-13 01:51:21 +00:00
  • c4cd46927d rcc: rename h5 clock enum variants and add check xoviat 2023-10-12 20:48:35 -05:00
  • e97ad65e67
         Merge pull request #279 from noppej/stm32u5_updates Dario Nieuwenhuis 2023-10-12 23:06:29 +00:00
  • 019e802e27 OCTOSPI: Fix "MAXTRAN was in wrong yaml". JackN 2023-10-12 18:52:50 -04:00
  • af1a5f5877 OCTOSPI: Merge peri yamls JackN 2023-10-12 17:44:41 -04:00
  • 4e2bf3eb20 PR Review corrections JackN 2023-10-12 16:45:54 -04:00
  • 0ceaa321a3 Add additional check instructions to README JackN 2023-10-12 15:50:35 -04:00
  • e99c97f0f6 OCTOSPI: Merge peripheral yamls and consolidate enums JackN 2023-10-12 15:43:04 -04:00
  • b07f5a1ba2 Reformat yaml's with chiptool fmt JackN 2023-10-12 10:49:41 -04:00
  • 2ab8cf7d44 Remove blanket matches from perimap JackN 2023-10-12 10:45:54 -04:00
  • c34f46566e Add STM32u5xx to header_map.yaml JackN 2023-10-12 10:17:08 -04:00
  • dc7bc1272a Add OCTOSPIM and OCTOSPI to perimap JackN 2023-10-11 15:59:10 -04:00
  • e933ee6cc4 New peripherals: octospim_v1+v2, and octospi_v1-v4 JackN 2023-10-11 15:58:35 -04:00
  • a40d19e6e9 Ensure download-all gets latest STM32U5 svd's JackN 2023-10-11 10:36:30 -04:00
  • 6bfa5a0dce rtc/bd fixes. Dario Nieuwenhuis 2023-10-11 03:41:10 +02:00
  • 9f45b0c48c Rename HSI to HSI16 in L1. Dario Nieuwenhuis 2023-10-11 01:21:46 +02:00
  • f40f5a40c1 Not all L0s have HSI48/CRS. Dario Nieuwenhuis 2023-10-11 01:21:26 +02:00
  • 71f81b44e3 Rename HSE32 -> HSE. Dario Nieuwenhuis 2023-10-11 00:29:01 +02:00
  • ff45aa382e rcc: add more missing enums. Dario Nieuwenhuis 2023-10-11 00:07:28 +02:00
  • e89b8cfc30 rcc: add PLL enums. Dario Nieuwenhuis 2023-10-09 02:44:42 +02:00
  • eecd80c34d
         Merge pull request #278 from xoviat/rcc xoviat 2023-10-08 23:15:53 +00:00
  • 926dfb5ed2 Merge branch 'main' of https://github.com/embassy-rs/stm32-data into rcc xoviat 2023-10-08 18:05:40 -05:00
  • 421c595a13 rcc: lower reg data xoviat 2023-10-08 18:05:16 -05:00
  • 81fbbfdf56
         Merge pull request #277 from xoviat/mux xoviat 2023-10-08 20:53:18 +00:00
  • 61c9f8c691 rcc: fix mux determinism xoviat 2023-10-08 15:43:06 -05:00
  • 6371d5472b
         Merge pull request #276 from xoviat/pretty-print xoviat 2023-10-08 20:05:41 +00:00
  • ee8e8c82dc gen: pretty print ir xoviat 2023-10-08 14:46:58 -05:00
  • a7bf7f02d1 Fix MCO/MCO1 inconsistency in G0, C0. Dario Nieuwenhuis 2023-10-07 01:13:03 +02:00
  • 6c73ffbd0b rcc: make naming consistent between "mco" and "mcosel". Dario Nieuwenhuis 2023-10-07 00:46:19 +02:00
  • 8d112b7a93 rcc: add MCO enums for WB Dario Nieuwenhuis 2023-10-07 00:20:42 +02:00
  • e701705d79 rcc: add MCOPRE enum for h5, h7. Dario Nieuwenhuis 2023-10-07 00:10:08 +02:00
  • 11256dc370 chiptool fmt. Dario Nieuwenhuis 2023-10-07 00:09:14 +02:00
  • f0f06b4c95
         Merge pull request #274 from xoviat/pin-sort xoviat 2023-10-06 01:17:59 +00:00
  • e7a291e659 sort pins by key xoviat 2023-10-05 20:04:58 -05:00
  • 9075e499c2
         Merge pull request #272 from mattico/h7-lsedrv-errata xoviat 2023-10-06 00:49:46 +00:00
  • 2271da1671 Merge branch 'main' of https://github.com/embassy-rs/stm32-data into h7-lsedrv-errata xoviat 2023-10-05 19:30:38 -05:00
  • 5b75119688
         Merge pull request #273 from xoviat/pin-sorting xoviat 2023-10-06 00:14:36 +00:00
  • ab12bb45b1 sort pins to avoid diff xoviat 2023-10-05 19:08:51 -05:00
  • 2ceed56e94 RCC: add LSEDRV enums for WB and WL series Matt Ickstadt 2023-10-05 11:18:49 -05:00
  • 60d034f9fa RCC: unify LSEDRV enum variant names and descriptions Matt Ickstadt 2023-10-05 10:56:02 -05:00
  • 32b3bd75ea H7: Fix LSEDRV bits of RM0433 Matt Ickstadt 2023-10-05 10:37:07 -05:00
  • 568a7058a1 Create rcc_h7rm04ee.yaml as a copy of rcc_h7.yaml Matt Ickstadt 2023-10-05 10:35:43 -05:00
  • 172c5ea188
         Merge pull request #271 from xoviat/opamp xoviat 2023-10-04 01:45:36 +00:00
  • feec3c1617 opamp: add other pins for f3 and g4 xoviat 2023-10-03 20:38:38 -05:00
  • 06d13dfd24
         Merge pull request #267 from oll3/tamp_block xoviat 2023-10-02 21:00:10 +00:00
  • 1638192e54
         ci: clone with more depth xoviat 2023-10-02 15:57:14 -05:00
  • 4baa9a0079
         Merge pull request #265 from xoviat/sel Dario Nieuwenhuis 2023-10-02 20:40:01 +00:00
  • 00894c8e3d clean up TAMP registers Olle Sandberg 2023-09-30 16:56:34 +02:00
  • dfb25f393c
         Merge pull request #270 from xoviat/periph-pins xoviat 2023-10-01 20:30:15 +00:00
  • 92ae3d5870 optimize hashset gen. xoviat 2023-10-01 13:44:30 -05:00
  • 4a893c37da add man impl. pin signals xoviat 2023-10-01 13:28:31 -05:00
  • 8ee2862086
         Merge pull request #254 from JuliDi/dont-remove-analogswitch-pins xoviat 2023-09-30 15:28:30 +00:00
  • 7ddfef6034 Merge branch 'main' of https://github.com/embassy-rs/stm32-data into sel xoviat 2023-09-29 18:22:19 -05:00
  • 23f9d9b236 metapac: allow runtime inspection of ir types xoviat 2023-09-29 18:21:03 -05:00
  • 735cab337a
         Merge pull request #269 from xoviat/sbs xoviat 2023-09-29 00:09:13 +00:00
  • e36d73af66 Merge branch 'main' of https://github.com/embassy-rs/stm32-data into sbs xoviat 2023-09-28 18:52:19 -05:00
  • 97a4fb22b2 rename sbs to syscfg xoviat 2023-09-28 18:50:30 -05:00
  • a1052bed00
         Merge pull request #268 from xoviat/opamp xoviat 2023-09-28 23:35:20 +00:00
  • 0041cf976c opamp: add f3 and g4 xoviat 2023-09-28 18:32:30 -05:00
  • 149ea79f2c
         Merge pull request #230 from xoviat/lptim-basic xoviat 2023-09-28 02:12:08 +00:00
  • 1b39301d8c Merge branch 'master' into lptim-basic xoviat 2023-09-27 21:09:34 -05:00
  • 6ed00dbbd0
         Merge pull request #266 from Radiator-Labs/main xoviat 2023-09-27 22:47:15 +00:00
  • e7de675353 add TAMP register block for g0, g4, l5, u5 and wl Olle Sandberg 2023-09-27 07:35:27 +02:00
  • d63a20e69b Merge branch 'main' of https://github.com/embassy-rs/stm32-data into sel xoviat 2023-09-26 20:20:38 -05:00
  • 38619f8b99 metapac: generate ir xoviat 2023-09-26 20:20:28 -05:00
  • 0adf2a75d1 Add enums MCOPRE & MCOSEL to wl5 & wle targets shakencodes 2023-09-26 10:55:19 -07:00
  • bdbf126746 flash: set for all l0 chips. Dario Nieuwenhuis 2023-09-26 05:06:10 +02:00
  • 1595920962 rcc: pipe through sel mux xoviat 2023-09-25 19:26:46 -05:00
  • 1551a1c01a
         Merge pull request #264 from xoviat/rtc xoviat 2023-09-25 21:07:21 +00:00
  • b99b81e3ad Merge branch 'main' of https://github.com/embassy-rs/stm32-data into rtc xoviat 2023-09-25 15:59:32 -05:00
  • 604ea4029c generate rccperipheral for rtc xoviat 2023-09-25 15:57:52 -05:00
  • dd8fa1374d Release stm32-metapac v14 Dario Nieuwenhuis 2023-09-25 20:20:03 +02:00