guangzong/stm32-data
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  • 5c2ec818f6 Merge pull request #129 from nviennot/timer_clock Dario Nieuwenhuis 2022-03-20 20:51:45 +01:00
  • f9301d42f0 Add the FSMC register block Nicolas Viennot 2022-03-18 22:21:53 -04:00
  • f622be8f03 Add PWR block for F2 Joonas Javanainen 2022-03-17 21:44:23 +02:00
  • dfc24f37fd Fix F2 DBGMCU typos Joonas Javanainen 2022-03-17 21:37:27 +02:00
  • e36b972e3c Add FLASH block for F2 Joonas Javanainen 2022-03-17 21:27:15 +02:00
  • b47951b4a2 Add SYSCFG block for F2 Joonas Javanainen 2022-03-17 21:18:10 +02:00
  • 0f80d10a1f Fix F4 UART parsing chemicstry 2022-03-17 16:33:34 +02:00
  • 410790c595 Update fieldset chemicstry 2022-03-16 19:18:12 +02:00
  • 802a2b8a29 Update fieldset chemicstry 2022-03-16 18:50:55 +02:00
  • d29a2a3d20 Update fieldset chemicstry 2022-03-16 18:48:50 +02:00
  • 118dde4d4c Fix fieldset chemicstry 2022-03-16 18:44:25 +02:00
  • caa613eab2 Unify SDMMC register names chemicstry 2022-03-16 18:40:36 +02:00
  • 67a00a393e Merge pull request #128 from nviennot/spi Dario Nieuwenhuis 2022-03-15 23:54:46 +01:00
  • b3f9f3e286 Timers use the clock speed apb1_tim and apb2_tim Nicolas Viennot 2022-03-14 21:46:32 -04:00
  • 2cd7632fc9 Add SPI modules for F1 family Nicolas Viennot 2022-03-14 21:46:02 -04:00
  • cf354c22e1 Merge pull request #127 from GrantM11235/dont-rename-dma-ch Dario Nieuwenhuis 2022-03-08 23:27:33 +01:00
  • ea9e59931f Don't rename DMA channels if they don't start at zero Grant Miller 2022-03-08 16:14:45 -06:00
  • ccc3468e62 Merge pull request #126 from GrantM11235/make-tmp-dmas Dario Nieuwenhuis 2022-03-08 23:07:10 +01:00
  • a1972e7a22 Create tmp/dmas/ if it doesn't exist Grant Miller 2022-03-08 15:53:16 -06:00
  • e977f83fe1 Merge pull request #124 from msamsonoff/g0-updates Dario Nieuwenhuis 2022-03-02 18:22:37 +01:00
  • 03b2707944 stm32g0: fix embarrassing typo Matthew W. Samsonoff 2022-03-02 11:45:26 -05:00
  • 1a4706a799 stm32g0: add registers for FLASH Matthew W. Samsonoff 2022-03-02 11:22:29 -05:00
  • 57903f105d stm32g0: add enums for RCC Matthew W. Samsonoff 2022-03-02 11:21:08 -05:00
  • 14a26e9edd stm32g0: fix typo Matthew W. Samsonoff 2022-03-02 11:20:34 -05:00
  • 0f5292f20e stm32g0: CCIPR2/USBSEL is two bits wide Matthew W. Samsonoff 2022-03-02 11:19:11 -05:00
  • ce7ba764c9 fix multicore nvic Dario Nieuwenhuis 2022-02-25 01:14:39 +01:00
  • 8a935d22e5 Fix parsing of H7ab BDMA1/BDMA2 Dario Nieuwenhuis 2022-02-24 05:55:16 +01:00
  • 324e5bee8d rcc/h7: add missing stuff, cleanup. Dario Nieuwenhuis 2022-02-24 05:54:43 +01:00
  • b6bccb1456 cleanup gpio regs. Dario Nieuwenhuis 2022-02-24 01:59:57 +01:00
  • 85854d8f42 usart_v2: fix wrong M1 bit Dario Nieuwenhuis 2022-02-14 02:07:49 +01:00
  • fde7738019 flash/u5: fix inconsistent BKPRAM vs BKPSRAM Dario Nieuwenhuis 2022-02-14 02:07:33 +01:00
  • 9b32ce66b6 mdios: fix accidentally merge-regs'd file. Dario Nieuwenhuis 2022-02-14 02:07:20 +01:00
  • c2804abc9a rcc: fix inconsistent naming. Dario Nieuwenhuis 2022-02-14 02:07:08 +01:00
  • 2c5e858584 chiptool fmt Dario Nieuwenhuis 2022-02-14 00:45:36 +01:00
  • 7b2df420ac rcc: remove useless enums. Dario Nieuwenhuis 2022-02-14 00:26:46 +01:00
  • 66ecaf8b98 rcc: unify rcc_f0, rcc_f0x0 Dario Nieuwenhuis 2022-02-14 00:24:53 +01:00
  • 3d6895a77f Rename clocks AHB -> AHB1, APB -> APB1. Dario Nieuwenhuis 2022-02-13 23:22:10 +01:00
  • fcd18b3e3d i2c: cleanup a bit. Dario Nieuwenhuis 2022-02-13 23:21:48 +01:00
  • 8402b43853 remove 'registers' nested struct in rcc Dario Nieuwenhuis 2022-02-07 22:52:52 +01:00
  • 5365ea053a split "magic" block string into an object, so consumers don't have to do tricky parsing. Dario Nieuwenhuis 2022-02-07 22:45:00 +01:00
  • 32b5a815c6 change memory regions from dict to array Dario Nieuwenhuis 2022-02-07 20:17:33 +01:00
  • 00fc25453d switch chip files from yaml to json. remove OrderedDict. Dario Nieuwenhuis 2022-02-07 01:53:58 +01:00
  • 7b368b0035 move memory parsing to own file Dario Nieuwenhuis 2022-02-07 01:00:27 +01:00
  • 48fdf50203 Change peripherals from dict to array Dario Nieuwenhuis 2022-02-06 23:19:05 +01:00
  • d8b8bac3a5 change dma channels from dict to array Dario Nieuwenhuis 2022-02-06 22:58:47 +01:00
  • f07c93a64a change chip interrupts from dict to array Dario Nieuwenhuis 2022-02-06 22:34:10 +01:00
  • 709acc1c1c change interrupts from dict to array Dario Nieuwenhuis 2022-02-06 22:27:09 +01:00
  • 689c9080ee cleanup yaml Dario Nieuwenhuis 2022-02-06 22:26:53 +01:00
  • f79e304d07 u5/rcc: fix inconsistent DCMI bit names Dario Nieuwenhuis 2022-02-05 03:02:57 +01:00
  • c1c3d8b354 stricter irq parsing. Dario Nieuwenhuis 2022-01-24 22:57:06 +01:00
  • 2a14936a5e Split interrupt parsing to separate module Dario Nieuwenhuis 2022-01-24 19:02:34 +01:00
  • 183c31f534 Better instructions in readme for extracting and cleaning peripherals. Dario Nieuwenhuis 2022-02-05 01:41:52 +01:00
  • 048f6766fd lpuart: cleanup v1, v2. Merge v2 and v3 Dario Nieuwenhuis 2022-02-05 00:46:59 +01:00
  • 6b86d9e104 LPUART: Add registers Maarten Oosting 2022-01-26 13:31:11 +01:00
  • e5da7538e1 LPUART: append lpuart peripherals to perimap Maarten Oosting 2022-01-26 13:29:43 +01:00
  • 4a6d8b3206 Merge pull request #122 from chemicstry/usb_otg Dario Nieuwenhuis 2022-02-05 00:06:55 +01:00
  • 432619467f Fix encoding on windows chemicstry 2022-02-04 15:49:56 +02:00
  • 2aaec03094 Fix USB OTG field names in RCC registers chemicstry 2022-02-04 03:34:08 +02:00
  • f1d0a09b79 Fix USB OTG pin AF parsing chemicstry 2022-02-04 02:32:39 +02:00
  • 8e1a07b928 Fix peripheral names with underscores chemicstry 2022-02-04 01:49:39 +02:00
  • ce95fe0ac5 Fix path separators on windows chemicstry 2022-02-04 01:47:29 +02:00
  • 61bca5a789 rcc/g0: add lots of missing bits Dario Nieuwenhuis 2022-01-24 02:13:53 +01:00
  • 11290fd274 rcc: make GPIOxEN/IOPxEN consistent. Dario Nieuwenhuis 2022-01-24 02:13:24 +01:00
  • 60899938fe Merge pull request #118 from unrelentingtech/l1flash Dario Nieuwenhuis 2022-01-14 16:18:39 +01:00
  • 76572f3d55 Add flash for STM32L1 Greg V 2022-01-14 16:50:35 +03:00
  • fcae7d1e17 Merge pull request #117 from embassy-rs/fix/spi-lsb-unification Dario Nieuwenhuis 2022-01-14 11:27:00 +01:00
  • 2c7984f962 Unify SPI LSBFirst enums. Matous Hybl 2022-01-14 10:23:27 +01:00
  • e5e7e26d05 Fix duplicated irqn in stm32f100 Dario Nieuwenhuis 2022-01-06 16:30:33 +01:00
  • 0f04776eaa rcc: l0, l1, l4: add missing enums. Dario Nieuwenhuis 2022-01-04 23:56:52 +01:00
  • 7061d52abd pwr f4, f7: cleanup a bit Dario Nieuwenhuis 2022-01-04 21:10:54 +01:00
  • 353b2ff610 Merge pull request #116 from Tiwalun/rtc-pwr-flash-wb55 Dario Nieuwenhuis 2022-01-04 19:59:51 +01:00
  • bb6321bc87 Extract flash information for STM32WB by looking for FLASH_REG_BASE define Dominik Boehi 2022-01-04 19:38:05 +01:00
  • d8189255fa Add Flash, RTC, PWR for STM32WB55, fix IPCC CPU registers Dominik Boehi 2022-01-04 18:51:38 +01:00
  • 36e6571960 Add exception for STM32WL SUBGHZSPI naming. Dario Nieuwenhuis 2022-01-01 12:05:51 +01:00
  • 1ed34d0869 Merge pull request #114 from DCNick3/use-signals-from-mcu-xml Dario Nieuwenhuis 2022-01-01 11:28:44 +01:00
  • 398fb17bf4 Ignore EXTIx signals in ADCs. Dario Nieuwenhuis 2022-01-01 11:28:02 +01:00
  • d50f6b4676 Use signals from MCU xml Nikita Strygin 2021-12-29 02:21:52 +03:00
  • 8e9e8522d1 Sort analog pins Dario Nieuwenhuis 2022-01-01 10:51:45 +01:00
  • 150bba33db Merge pull request #115 from sjoerdsimons/wip/sjoerd/stm32f1-adc Dario Nieuwenhuis 2022-01-01 10:34:42 +01:00
  • 8ed35ce95b Add registers for F1 ADC block Sjoerd Simons 2021-12-29 15:37:10 +01:00
  • 2616e499c6 Recognize ADC on STM32F1xx Sjoerd Simons 2021-12-29 15:36:35 +01:00
  • 73902044de Fix typo Dario Nieuwenhuis 2021-12-23 20:32:39 +01:00
  • ce7607e119 Merge pull request #112 from VasanthakumarV/f3-timers Dario Nieuwenhuis 2021-12-23 11:46:55 +01:00
  • a5008c71d5 [manual] Map register blocks to timers for F3 chips VasanthakumarV 2021-12-23 15:59:58 +05:30
  • 0e9fa2f438 Merge pull request #109 from VasanthakumarV/f3-registers Dario Nieuwenhuis 2021-12-16 08:12:07 +01:00
  • b9193128ed [manual] Make EXTICRx in SYSCFG register an array VasanthakumarV 2021-12-09 13:47:55 +05:30
  • fdf0cc95b9 [manual] Deduplicate PLLSRC entry of RCC_CFGR register VasanthakumarV 2021-12-09 13:24:25 +05:30
  • 8011bfa629 Merge pull request #111 from matoushybl/feat/fmc Dario Nieuwenhuis 2021-12-08 20:20:52 +01:00
  • 8402040d17 Fix generation of FMC peripheral in chip yamls. Add FMC registers. Matous Hybl 2021-12-08 20:01:57 +01:00
  • 3275e41057 [manual] Add register mappings for F3 VasanthakumarV 2021-12-05 16:03:43 +05:30
  • ef950a6feb [generate] Create SYSCFG, PWR, FLASH register files VasanthakumarV 2021-12-05 16:00:12 +05:30
  • f6c9772cf4 usart: make v1 and v2 more consistent. Dario Nieuwenhuis 2021-12-08 04:48:21 +01:00
  • cc3ea51778 Merge pull request #108 from embassy-rs/detect-iop-clock Ulf Lilleengen 2021-12-02 11:25:27 +01:00
  • 6eab78746e Fix wording Ulf Lilleengen 2021-12-02 11:23:16 +01:00
  • 57c7058739 Detect GPIO enable/reset registers on chips with separate bus for GPIO Ulf Lilleengen 2021-12-02 11:17:52 +01:00
  • 9afa81e824 Merge pull request #107 from matoushybl/timers Dario Nieuwenhuis 2021-11-30 20:16:05 +01:00
  • 372de46ad1 Merge pull request #106 from matoushybl/dcmi-fixes Dario Nieuwenhuis 2021-11-30 19:43:12 +01:00
  • c2e87d9cc8 Relax DCMI peripheral matching condition. Matous Hybl 2021-11-29 12:11:07 +01:00
  • 2b56ec9e99 Add correct H7 timer register blocks. Matous Hybl 2021-11-29 10:16:37 +01:00
  • 8f150ead7f Merge pull request #105 from embassy-rs/cleanups Dario Nieuwenhuis 2021-11-29 17:08:13 +01:00