45 Commits

Author SHA1 Message Date
JuliDi
95ff92f362
remove DSISEL from other register ymls where it is not present 2024-04-15 09:20:50 +02:00
Dario Nieuwenhuis
d67103f97f More accurate USB muxes. 2024-03-01 22:50:31 +01:00
Dario Nieuwenhuis
ca48d94684
Merge pull request #411 from caleb-garrett/h7-cryp
H7 RCC CRYP Register Naming
2024-02-23 18:38:19 +00:00
Caleb Garrett
787611a3ab Correct naming of RCC CRYP registers. 2024-02-23 12:22:59 -05:00
Dario Nieuwenhuis
e2c7a7eae0 rcc: fix tons of wrong muxes. 2024-02-16 00:11:14 +01:00
Dario Nieuwenhuis
8a3ad0b738 chiptool fmt. 2024-02-12 20:48:59 +01:00
Dario Nieuwenhuis
0c921dde2e Refactor RCC code to find more muxes.
Fixes #383
2024-02-10 02:40:36 +01:00
Dominic
01ef0b5999
Add OCTOSPI1 register bits
Those were previously only called QUADSPI, which is needed on some
chips like the STM32H745, but those bits are used as OCTOSPI1 bits
on other chips like the STM32H723.
2024-02-07 16:44:29 +01:00
eZio Pan
7419be3902 make compile pass 2024-01-08 16:31:06 +08:00
Dario Nieuwenhuis
8f5fcae8c2 Fix QUADSPI RCC bit names. 2023-12-08 23:43:52 +01:00
Dario Nieuwenhuis
4ddcb77c9d rcc: rename NONE -> DISABLED 2023-10-23 00:30:16 +02:00
xoviat
8bd7ff51b0 rcc: expand checker to all chips 2023-10-18 21:01:57 -05:00
xoviat
c61495fd4e rcc: more cleanup 2023-10-17 16:57:33 -05:00
xoviat
b9a89a1851 rcc: cleanup variants and rename ahb -> clk 2023-10-15 18:01:50 -05:00
xoviat
8b8686a852 rcc: more mux and enum cleanup 2023-10-15 10:37:36 -05:00
xoviat
5d51e3b706 rcc: add more mux data 2023-10-14 17:20:25 -05:00
xoviat
aa5e909e11 rcc: more enum cleanup 2023-10-13 20:54:24 -05:00
Dario Nieuwenhuis
e89b8cfc30 rcc: add PLL enums. 2023-10-09 02:44:42 +02:00
Dario Nieuwenhuis
6c73ffbd0b rcc: make naming consistent between "mco" and "mcosel". 2023-10-07 00:46:19 +02:00
Dario Nieuwenhuis
e701705d79 rcc: add MCOPRE enum for h5, h7. 2023-10-07 00:10:08 +02:00
Matt Ickstadt
60d034f9fa RCC: unify LSEDRV enum variant names and descriptions
Now the only differences are the series which have swapped medium low/high bits: F0, F3v2, F3, F7, and H7_RM0433.
2023-10-05 10:56:02 -05:00
Dario Nieuwenhuis
d6b0763327 More rcc cleanups. 2023-09-19 04:17:00 +02:00
Dario Nieuwenhuis
2f97514774 pwr: add all VOS enums. 2023-09-18 02:57:23 +02:00
xoviat
a70aa2f06a rcc: use same name for bus psc 2023-09-16 15:43:03 -05:00
Dario Nieuwenhuis
86fb0cfc2f chiptool fmt. 2023-09-16 02:34:03 +02:00
Dario Nieuwenhuis
3f01ff4545 Remove enum_read, enum_write. 2023-06-28 22:36:19 +02:00
Dario Nieuwenhuis
78c43e0dba rcc: fix QSPIEN vs QUADSPIEN reg names. 2023-03-27 12:17:47 +02:00
Dario Nieuwenhuis
070da63d3c rcc/h7: more otg fixes. 2023-01-11 01:05:07 +01:00
Dario Nieuwenhuis
375238ef85 rcc/h7: fix wrong names and bits for otg 2023-01-11 00:27:41 +01:00
Dario Nieuwenhuis
1d5853be40 run chiptool fmt with new version that trims descriptions. 2022-04-08 01:17:53 +02:00
Dario Nieuwenhuis
324e5bee8d rcc/h7: add missing stuff, cleanup. 2022-02-24 05:54:43 +01:00
Dario Nieuwenhuis
c2804abc9a rcc: fix inconsistent naming. 2022-02-14 02:07:08 +01:00
Dario Nieuwenhuis
7b2df420ac rcc: remove useless enums. 2022-02-14 00:26:46 +01:00
Dario Nieuwenhuis
c6c5c099bb fmt all register yamls 2021-11-17 21:23:26 +01:00
Matous Hybl
bfc7856d75 Fix DCMI reset. 2021-11-10 17:31:06 +01:00
Matous Hybl
6ef7659b9d Add support for H723 RCC differences. 2021-11-04 15:26:52 +01:00
Ulf Lilleengen
af3e9e60a3 Add missing RCC block for H7AB family 2021-06-10 08:57:46 +02:00
Ulf Lilleengen
1d0b8db2ee Regen and update transform 2021-06-07 12:03:15 +02:00
Ulf Lilleengen
f31ba7bfcb Separate block for H7AB 2021-06-03 15:43:21 +02:00
Ulf Lilleengen
fea5e31f8b Regen and remove *ON enums 2021-06-03 15:13:46 +02:00
Ulf Lilleengen
529b991404 Do merge 2021-06-03 14:31:27 +02:00
Ulf Lilleengen
332fc1728b Add script for merging regs 2021-06-03 14:02:53 +02:00
Ulf Lilleengen
aa9257548c Remove enums from h7 regs 2021-06-03 12:27:42 +02:00
Thales Fragoso
2dda36bd49 H7 RCC: Make more arrays 2021-05-21 19:55:56 -03:00
Thales Fragoso
4199b328ee Add H7 RCC 2021-05-21 19:55:55 -03:00