rcc: rename NONE -> DISABLED

data/registers/rcc_h5.yaml

@@ -3868,7 +3868,7 @@ enum/PLLRGE:
 enum/PLLSRC:
   bit_size: 2
   variants:
-  - name: None
+  - name: DISABLE
     description: no clock send to DIVMx divider and PLLs (default after reset)
     value: 0
   - name: HSI

data/registers/rcc_h50.yaml

@@ -3036,7 +3036,7 @@ enum/PLLRGE:
 enum/PLLSRC:
   bit_size: 2
   variants:
-  - name: None
+  - name: DISABLE
     description: no clock send to DIVMx divider and PLLs (default after reset)
     value: 0
   - name: HSI

data/registers/rcc_h7.yaml

@@ -5251,7 +5251,7 @@ enum/PLLSRC:
   - name: HSE
     description: HSE selected as PLL clock
     value: 2
-  - name: None
+  - name: DISABLE
     description: No clock sent to DIVMx dividers and PLLs
     value: 3
 enum/PLLVCOSEL:

data/registers/rcc_h7ab.yaml

@@ -4186,7 +4186,7 @@ enum/PLLSRC:
   - name: HSE
     description: HSE selected as PLL clock
     value: 2
-  - name: None
+  - name: DISABLE
     description: No clock sent to DIVMx dividers and PLLs
     value: 3
 enum/PLLVCOSEL:

data/registers/rcc_h7rm0433.yaml

@@ -5251,7 +5251,7 @@ enum/PLLSRC:
   - name: HSE
     description: HSE selected as PLL clock
     value: 2
-  - name: None
+  - name: DISABLE
     description: No clock sent to DIVMx dividers and PLLs
     value: 3
 enum/PLLVCOSEL:

data/registers/rcc_l4.yaml

@@ -2171,7 +2171,7 @@ enum/PLLR:
 enum/PLLSRC:
   bit_size: 2
   variants:
-  - name: None
+  - name: DISABLE
     description: No clock sent to PLL
     value: 0
   - name: MSI

data/registers/rcc_l4plus.yaml

@@ -2347,7 +2347,7 @@ enum/PLLR:
 enum/PLLSRC:
   bit_size: 2
   variants:
-  - name: None
+  - name: DISABLE
     description: No clock sent to PLL
     value: 0
   - name: MSI

data/registers/rcc_l5.yaml

@@ -2014,7 +2014,7 @@ enum/MCOPRE:
 enum/MCOSEL:
   bit_size: 4
   variants:
-  - name: None
+  - name: DISABLE
     description: MCO output disabled, no clock on MCO
     value: 0
   - name: SYS
@@ -2462,7 +2462,7 @@ enum/PLLR:
 enum/PLLSRC:
   bit_size: 2
   variants:
-  - name: None
+  - name: DISABLE
     description: No clock sent to PLL
     value: 0
   - name: MSI

data/registers/rcc_u5.yaml

@@ -2825,10 +2825,10 @@ enum/MSIRANGE:
 enum/MSIRGSEL:
   bit_size: 1
   variants:
-  - name: RCC_CSR
+  - name: CSR
     description: MSIS/MSIK ranges provided by MSISSRANGE[3:0] and MSIKSRANGE[3:0] in RCC_CSR
     value: 0
-  - name: RCC_ICSCR1
+  - name: ICSCR1
     description: MSIS/MSIK ranges provided by MSISRANGE[3:0] and MSIKRANGE[3:0] in RCC_ICSCR1
     value: 1
 enum/MSIXSRANGE:

data/registers/rcc_wba.yaml

@@ -1471,7 +1471,7 @@ enum/PPRE:
 enum/RADIOSTSEL:
   bit_size: 2
   variants:
-  - name: None
+  - name: DISABLE
     description: no clock selected, 2.4 GHz RADIO sleep timer kernel clock disabled
     value: 0
   - name: LSE