Dario Nieuwenhuis
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e2c7a7eae0
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rcc: fix tons of wrong muxes.
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2024-02-16 00:11:14 +01:00 |
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Dario Nieuwenhuis
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8a3ad0b738
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chiptool fmt.
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2024-02-12 20:48:59 +01:00 |
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Dario Nieuwenhuis
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0c921dde2e
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Refactor RCC code to find more muxes.
Fixes #383
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2024-02-10 02:40:36 +01:00 |
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eZio Pan
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7419be3902
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make compile pass
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2024-01-08 16:31:06 +08:00 |
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Dario Nieuwenhuis
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8f5fcae8c2
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Fix QUADSPI RCC bit names.
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2023-12-08 23:43:52 +01:00 |
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Dario Nieuwenhuis
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4ddcb77c9d
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rcc: rename NONE -> DISABLED
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2023-10-23 00:30:16 +02:00 |
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xoviat
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8bd7ff51b0
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rcc: expand checker to all chips
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2023-10-18 21:01:57 -05:00 |
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xoviat
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c61495fd4e
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rcc: more cleanup
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2023-10-17 16:57:33 -05:00 |
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xoviat
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b9a89a1851
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rcc: cleanup variants and rename ahb -> clk
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2023-10-15 18:01:50 -05:00 |
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xoviat
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8b8686a852
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rcc: more mux and enum cleanup
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2023-10-15 10:37:36 -05:00 |
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xoviat
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5d51e3b706
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rcc: add more mux data
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2023-10-14 17:20:25 -05:00 |
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Dario Nieuwenhuis
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e89b8cfc30
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rcc: add PLL enums.
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2023-10-09 02:44:42 +02:00 |
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Dario Nieuwenhuis
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6c73ffbd0b
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rcc: make naming consistent between "mco" and "mcosel".
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2023-10-07 00:46:19 +02:00 |
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Dario Nieuwenhuis
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e701705d79
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rcc: add MCOPRE enum for h5, h7.
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2023-10-07 00:10:08 +02:00 |
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Dario Nieuwenhuis
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11256dc370
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chiptool fmt.
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2023-10-07 00:09:14 +02:00 |
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Matt Ickstadt
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60d034f9fa
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RCC: unify LSEDRV enum variant names and descriptions
Now the only differences are the series which have swapped medium low/high bits: F0, F3v2, F3, F7, and H7_RM0433.
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2023-10-05 10:56:02 -05:00 |
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Matt Ickstadt
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32b3bd75ea
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H7: Fix LSEDRV bits of RM0433
Errata ES0392 2.2.14
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2023-10-05 10:37:07 -05:00 |
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Matt Ickstadt
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568a7058a1
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Create rcc_h7rm04ee.yaml as a copy of rcc_h7.yaml
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2023-10-05 10:35:43 -05:00 |
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