Dario Nieuwenhuis
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9f45b0c48c
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Rename HSI to HSI16 in L1.
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2023-10-11 01:21:46 +02:00 |
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Dario Nieuwenhuis
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f40f5a40c1
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Not all L0s have HSI48/CRS.
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2023-10-11 01:21:26 +02:00 |
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Dario Nieuwenhuis
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71f81b44e3
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Rename HSE32 -> HSE.
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2023-10-11 00:29:01 +02:00 |
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Dario Nieuwenhuis
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ff45aa382e
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rcc: add more missing enums.
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2023-10-11 00:07:28 +02:00 |
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Dario Nieuwenhuis
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e89b8cfc30
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rcc: add PLL enums.
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2023-10-09 02:44:42 +02:00 |
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Dario Nieuwenhuis
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6c73ffbd0b
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rcc: make naming consistent between "mco" and "mcosel".
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2023-10-07 00:46:19 +02:00 |
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Dario Nieuwenhuis
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8d112b7a93
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rcc: add MCO enums for WB
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2023-10-07 00:20:42 +02:00 |
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Dario Nieuwenhuis
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e701705d79
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rcc: add MCOPRE enum for h5, h7.
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2023-10-07 00:10:08 +02:00 |
|
Dario Nieuwenhuis
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11256dc370
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chiptool fmt.
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2023-10-07 00:09:14 +02:00 |
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Matt Ickstadt
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2ceed56e94
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RCC: add LSEDRV enums for WB and WL series
These are in the RMs but previously missing.
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2023-10-05 11:18:49 -05:00 |
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Matt Ickstadt
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60d034f9fa
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RCC: unify LSEDRV enum variant names and descriptions
Now the only differences are the series which have swapped medium low/high bits: F0, F3v2, F3, F7, and H7_RM0433.
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2023-10-05 10:56:02 -05:00 |
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Matt Ickstadt
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32b3bd75ea
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H7: Fix LSEDRV bits of RM0433
Errata ES0392 2.2.14
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2023-10-05 10:37:07 -05:00 |
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Matt Ickstadt
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568a7058a1
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Create rcc_h7rm04ee.yaml as a copy of rcc_h7.yaml
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2023-10-05 10:35:43 -05:00 |
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xoviat
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feec3c1617
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opamp: add other pins for f3 and g4
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2023-10-03 20:38:38 -05:00 |
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xoviat
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06d13dfd24
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Merge pull request #267 from oll3/tamp_block
add TAMP register block for g0, g4, l5, u5 and wl
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2023-10-02 21:00:10 +00:00 |
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Olle Sandberg
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00894c8e3d
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clean up TAMP registers
Remove obvious 1 bit enums and make arrays of repeated fields.
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2023-10-02 07:15:40 +02:00 |
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xoviat
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4a893c37da
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add man impl. pin signals
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2023-10-01 13:28:31 -05:00 |
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xoviat
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e36d73af66
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Merge branch 'main' of https://github.com/embassy-rs/stm32-data into sbs
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2023-09-28 18:52:19 -05:00 |
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xoviat
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97a4fb22b2
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rename sbs to syscfg
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2023-09-28 18:50:30 -05:00 |
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xoviat
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0041cf976c
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opamp: add f3 and g4
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2023-09-28 18:32:30 -05:00 |
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xoviat
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1b39301d8c
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Merge branch 'master' into lptim-basic
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2023-09-27 21:09:34 -05:00 |
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Olle Sandberg
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e7de675353
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add TAMP register block for g0, g4, l5, u5 and wl
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2023-09-27 07:35:27 +02:00 |
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shakencodes
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0adf2a75d1
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Add enums MCOPRE & MCOSEL to wl5 & wle targets
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2023-09-26 10:55:19 -07:00 |
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Dario Nieuwenhuis
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4f83d5d9cf
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pwr: add f0, f1.
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2023-09-25 00:27:32 +02:00 |
|
Dario Nieuwenhuis
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d6b0763327
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More rcc cleanups.
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2023-09-19 04:17:00 +02:00 |
|
Dario Nieuwenhuis
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2f97514774
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pwr: add all VOS enums.
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2023-09-18 02:57:23 +02:00 |
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xoviat
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a70aa2f06a
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rcc: use same name for bus psc
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2023-09-16 15:43:03 -05:00 |
|
Dario Nieuwenhuis
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43c1e7b3be
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Add STM32WBA support.
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2023-09-16 02:34:03 +02:00 |
|
Dario Nieuwenhuis
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8fec79a722
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rcc consistency fixes.
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2023-09-16 02:34:03 +02:00 |
|
Dario Nieuwenhuis
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05ea13251c
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pwr u5 cleanup
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2023-09-16 02:34:03 +02:00 |
|
Dario Nieuwenhuis
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86fb0cfc2f
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chiptool fmt.
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2023-09-16 02:34:03 +02:00 |
|
xoviat
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1e9067e0f0
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pwr/l0: cleanup enums
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2023-09-14 17:32:36 -05:00 |
|
xoviat
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1118eb4c96
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cleanup adc common v2
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2023-09-14 17:10:13 -05:00 |
|
xoviat
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c3548f2b7a
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add pwr l0
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2023-09-14 17:10:04 -05:00 |
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xoviat
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4e6a74f69c
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Merge pull request #252 from xoviat/adc-g4
g4: fix rcc adc generation and cleanup enums
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2023-09-11 21:08:12 +00:00 |
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xoviat
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db70d16691
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adc/v2: cleanup enums
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2023-09-11 16:06:43 -05:00 |
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xoviat
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85e6808094
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Merge pull request #241 from ExplodingWaffle/main
Add UCPD
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2023-09-10 18:24:38 +00:00 |
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xoviat
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bbff2b9e6b
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Merge pull request #249 from andresv/add-aes
Add AES registers
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2023-09-10 18:19:31 +00:00 |
|
Scott Mabin
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27b99b9d24
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Add stbiterr field for sdmmc_v1
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2023-09-10 12:37:48 +01:00 |
|
ExplodingWaffle
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32bbb683af
|
finishing touches
|
2023-09-09 14:55:57 +01:00 |
|
Andres Vahter
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ffea347a4e
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aes: MergeFieldsets and MakeRegisterArray
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2023-09-07 22:59:09 +03:00 |
|
Andres Vahter
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6efff79ad8
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aes: rm AES from IVR description
|
2023-09-07 21:20:36 +03:00 |
|
Andres Vahter
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8d1896c4e0
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aes_u5.yaml: remove wrong fields
|
2023-09-07 20:54:49 +03:00 |
|
Andres Vahter
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b6da305f85
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rm aes_g081.yaml, it is now same as aes_v2.yaml.
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2023-09-07 20:37:56 +03:00 |
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Andres Vahter
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34fec9129a
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aes_g081: rm unknow regs
Those registers are not mentioned in RM0444 AES register map.
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2023-09-07 20:37:08 +03:00 |
|
Andres Vahter
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37a93d4627
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aes: make all yamls as similar as possible
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2023-09-07 20:33:11 +03:00 |
|
Andres Vahter
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9a56721608
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add unmodified AES yamls
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2023-09-07 09:51:50 +03:00 |
|
Olle Sandberg
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9c71725bf2
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Support STM32WL5x ADC peripheral
|
2023-09-05 12:22:56 +02:00 |
|
Olle Sandberg
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ab99fff0af
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Support STM32WLEx ADC peripheral
Use adc_g0 since very similar to the WLE one.
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2023-09-05 11:59:10 +02:00 |
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xoviat
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7e2310f49f
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Merge pull request #242 from JuliDi/add-qspi-frcm
Add free-running clock mode for quadspi
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2023-09-04 18:57:22 +00:00 |
|