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Author SHA1 Message Date
xoviat
d8779b6992 hrtim/v1: remove extra enums 2023-07-02 13:58:08 -05:00
xoviat
32f14c91a6 hrtim: add v1.1 2023-07-02 13:47:53 -05:00
xoviat
5531ec8273 hrtim/v1: add remanining registers 2023-07-02 11:45:28 -05:00
Dario Nieuwenhuis
9b4f530da2
Merge pull request #214 from embassy-rs/build-generated 
Automatically commit build results to the stm32-data-generated repo.
 2023-07-02 13:51:18 +00:00
Dario Nieuwenhuis
9813a02944 rustfmt the generated pac. 2023-07-02 15:49:24 +02:00
Dario Nieuwenhuis
6cc7497a33 Update chiptool, makes PAC generation repeatable. 2023-07-02 15:42:12 +02:00
Dario Nieuwenhuis
e54c3d70de Automatically commit build results to the stm32-data-generated repo. 2023-07-02 15:41:59 +02:00
xoviat
c7e4df5ef1 data-gen: add some yaml validation 2023-07-01 17:18:40 -05:00
xoviat
51c7a56fba hrtim/v1: fix some registers 2023-07-01 17:18:28 -05:00
xoviat
a0e307ab25 hrtim/v1: add some missing registers 2023-07-01 16:40:12 -05:00
Jan Christoph Bernack
fc5867835f
select RNG version based on family 2023-07-01 03:40:43 +02:00
Jan Christoph Bernack
f1b05d243d
update RNG registers and mapping 2023-06-30 17:44:07 +02:00
Dario Nieuwenhuis
9f043c5eab Release stm32-metapac v12 2023-06-29 01:59:01 +02:00
Dario Nieuwenhuis
91ec06089b spi: remove useless enums. 2023-06-29 01:48:37 +02:00
Dario Nieuwenhuis
0b37690ca9 Update chiptool. 2023-06-29 01:12:05 +02:00
Dario Nieuwenhuis
eac1dc7600 Fix unused mut. 2023-06-29 01:00:03 +02:00
Dario Nieuwenhuis
1678c9f1e1 rtc: remove useless enums. 2023-06-29 00:59:16 +02:00
Dario Nieuwenhuis
1cfb795d6b Fix accidental arrayifications. 2023-06-29 00:57:25 +02:00
Dario Nieuwenhuis
3f01ff4545 Remove enum_read, enum_write. 2023-06-28 22:36:19 +02:00
Dario Nieuwenhuis
0d958def0e chiptool fmt. 2023-06-28 22:22:17 +02:00
Dario Nieuwenhuis
9965da5388
Merge pull request #208 from cbiffle/gpio-v2-afr-array-docs 
gpio_v2: remove another case where indexing was potentially misleading
 2023-06-28 18:26:34 +00:00
Cliff L. Biffle
3c49b933fc gpio_v2: remove another case where indexing was potentially misleading 
The field docs suggested that the index was in the range 0..15, which is
not true in this case.
 2023-06-28 11:18:58 -07:00
Dario Nieuwenhuis
a80ddd6acd
Merge pull request #207 from cbiffle/gpio-v2-afr-array-docs 
gpio_v2: expand docs on AFRx register pair to describe indexing.
 2023-06-28 18:11:29 +00:00
Cliff L. Biffle
d8592bdd8c gpio_v2: expand docs on AFRx register pair to describe indexing. 2023-06-28 11:06:26 -07:00
Dario Nieuwenhuis
5a9ea5ab86
Merge pull request #205 from cbiffle/g0-c0-syscfg-mem-mode-fix 
G0/C0: fix SYSCFG.CFGR1.MEM_MODE definition
 2023-06-28 17:11:26 +00:00
Cliff L. Biffle
b93e9286d3 G0/C0: fix SYSCFG.CFGR1.MEM_MODE definition 
- Added docs from reference manual / fixed existing partial copy of
  reference manual docs
- Renamed System Flash case to SYSTEM_FLASH because FLASH was ambiguous
  (you really don't want to activate the System Flash when you wanted
  Main Flash, where your program lives!)
- Added Main Flash case.
 2023-06-28 10:06:46 -07:00
Dario Nieuwenhuis
e2cad81497 Build docs with more threads. 2023-06-28 18:05:13 +02:00
Dario Nieuwenhuis
afa6f1975c
Merge pull request #201 from cbiffle/g0-syscfg-cfgr1-fix 
G0 SYSCFG: fix PA11/PA12 RMP definitions
 2023-06-28 18:03:41 +02:00
Dario Nieuwenhuis
5f90914cb9 build docs in Ci. 2023-06-28 17:59:25 +02:00
Cliff L. Biffle
3d86ef6d30 G0 SYSCFG: fix PA11/PA12 RMP definitions 
It looks like the G0 file here picked up the F0-style "one remapping bit
for both pins" field definition. The G0 series actually has C0-style
dual remapping bits.
 2023-06-28 08:50:53 -07:00
Dario Nieuwenhuis
30adf996a1
Merge pull request #204 from embassy-rs/bender-ci 
Switch to bender CI
 2023-06-28 15:50:18 +00:00
Dario Nieuwenhuis
883442f2ad Switch to bender CI 2023-06-28 17:44:05 +02:00
Dario Nieuwenhuis
7edb68640b
Merge pull request #200 from cbiffle/readme-link 
README: add link to lovely generated docs site
 2023-06-28 13:07:28 +00:00
Cliff L. Biffle
8d4a13db9f README: add link to lovely generated docs site 2023-06-27 20:47:21 -07:00
Dario Nieuwenhuis
860255746d Release stm32-metapac v11 2023-06-27 23:21:44 +02:00
Dario Nieuwenhuis
30747405c8 otg: Increase max amount of EPs. 
H7 has 9 EPs, registers seem laid out for up to 16 EPs so use that.
 2023-06-27 04:07:18 +02:00
Dario Nieuwenhuis
26ade98647
Merge pull request #198 from kevswims/feature/stm32g-crs 
Feature/stm32g crs
 2023-06-20 17:43:24 +00:00
Kevin Lannen
efc220eb38 CRS: Use L0 CRS definitions for G0 and G4 
Comparing the register definitions these peripherals are identical.
 2023-06-20 09:48:09 -06:00
Kevin Lannen
a1189407f7 STM32G4: Add enum for CLK48SEL 2023-06-19 16:26:48 -06:00
Dario Nieuwenhuis
ca29cf87d5 Release stm32-metapac v10 2023-06-19 02:39:48 +02:00
Dario Nieuwenhuis
2dd3ecfc70 Update chiptool (reg access is now safe, creating regs from raw ptrs is unsafe) 2023-06-19 02:39:00 +02:00
Dario Nieuwenhuis
19f5df6144
Merge pull request #193 from xoviat/can 
can: skip duplicate interrupt in f107
 2023-06-18 10:43:41 +00:00
xoviat
e388dcebe7 can: fix missing interrupts 2023-06-17 19:13:00 -05:00
Dario Nieuwenhuis
337766a8ed
Merge pull request #197 from whitequark/stm32f302r8-dac 
Add support for DAC in STM32F3x that only have a single DAC
 2023-06-16 22:59:05 +00:00
Catherine
20034cc19a Add support for DAC in STM32F3x that only have a single DAC. 2023-06-16 22:47:18 +00:00
Dario Nieuwenhuis
5116bfd481
Merge pull request #196 from cbruiz/fix/STM32F410-SPI 
Update chips.rs to include perimap for SPI in STM32F410 MCUs
 2023-06-14 22:10:30 +00:00
Dario Nieuwenhuis
ebb83dd7bd
Merge pull request #188 from xoviat/hrtim 
add hrtim
 2023-06-14 22:06:37 +00:00
Dario Nieuwenhuis
063b79c1bf
Merge pull request #180 from maxekman/feat/add-sai-peripheral 
feat(sai): add complete peripherals
 2023-06-14 22:06:20 +00:00
Carlos Barrales
ca3022869a
Update chips.rs to include perimap for SPI in STM32F410 MCUs 
+ SPI perimap for spi2s1_v2_4_Cube
 2023-06-15 00:00:04 +02:00
Max Ekman
e7aa553dc1
fix(sai): remove unused v3 2023-05-29 20:43:24 +02:00