1103 Commits

Author SHA1 Message Date
Dario Nieuwenhuis
9838bd78f3 Merge pull request #135 from ant32/main
WIP: add usb registers to l4r5
2022-03-26 18:53:45 +01:00
Philip A Reimer
55163d5857 Add OTG FS v3 2022-03-24 21:16:11 -06:00
Dario Nieuwenhuis
ecad66103f Merge pull request #134 from nviennot/otg
Add USB_OTG_FS registers
2022-03-22 17:11:27 +01:00
Nicolas Viennot
4ed9a42360 Add OTG register definitions 2022-03-20 19:07:24 -04:00
Dario Nieuwenhuis
b5ffa60b5f Merge pull request #133 from nviennot/fsmc
FSMC register block
2022-03-20 21:01:20 +01:00
Dario Nieuwenhuis
6ee54e8bf1 Merge pull request #131 from chemicstry/f4_uart
Fix F4 UART definitions
2022-03-20 21:00:04 +01:00
Dario Nieuwenhuis
d5b53707d0 Merge pull request #132 from Gekkio/improve-f2-support
F2: Add SYSCFG/FLASH/PWR, fix DBGMCU SVD typos
2022-03-20 20:59:33 +01:00
Dario Nieuwenhuis
ca8f4b3e0d Merge pull request #130 from chemicstry/sdio_fix2
Unify SDMMC v1 and v2 register names
2022-03-20 20:52:20 +01:00
Dario Nieuwenhuis
5c2ec818f6 Merge pull request #129 from nviennot/timer_clock
Timers use the clock speed apb1_tim and apb2_tim
2022-03-20 20:51:45 +01:00
Nicolas Viennot
f9301d42f0 Add the FSMC register block
The current v1 yaml has a few extra registers defined that don't belong to
some of the chips out there (the ones at byte_offset 320 and above), but
the rest of registers are identical.
2022-03-18 23:41:56 -04:00
Joonas Javanainen
f622be8f03 Add PWR block for F2
Verified using RM0033 (F205xx/F207xx/F215xx/F217xx) Rev 9
2022-03-17 21:44:23 +02:00
Joonas Javanainen
dfc24f37fd Fix F2 DBGMCU typos
The typos come from the original SVD files
2022-03-17 21:37:27 +02:00
Joonas Javanainen
e36b972e3c Add FLASH block for F2
Verified using PM0059 Programming manual (F205/215, F207/217) Rev 5
2022-03-17 21:32:59 +02:00
Joonas Javanainen
b47951b4a2 Add SYSCFG block for F2
Verified using RM0033 (F205xx/F207xx/F215xx/F217xx) Rev 9
2022-03-17 21:32:37 +02:00
chemicstry
0f80d10a1f Fix F4 UART parsing 2022-03-17 16:33:34 +02:00
chemicstry
410790c595 Update fieldset 2022-03-16 19:18:12 +02:00
chemicstry
802a2b8a29 Update fieldset 2022-03-16 18:50:55 +02:00
chemicstry
d29a2a3d20 Update fieldset 2022-03-16 18:48:50 +02:00
chemicstry
118dde4d4c Fix fieldset 2022-03-16 18:44:25 +02:00
chemicstry
caa613eab2 Unify SDMMC register names 2022-03-16 18:40:36 +02:00
Dario Nieuwenhuis
67a00a393e Merge pull request #128 from nviennot/spi
Add SPI modules for F1 family
2022-03-15 23:54:46 +01:00
Nicolas Viennot
b3f9f3e286 Timers use the clock speed apb1_tim and apb2_tim 2022-03-15 02:55:33 -04:00
Nicolas Viennot
2cd7632fc9 Add SPI modules for F1 family 2022-03-15 02:51:18 -04:00
Dario Nieuwenhuis
cf354c22e1 Merge pull request #127 from GrantM11235/dont-rename-dma-ch
Don't rename DMA channels if they don't start at zero
2022-03-08 23:27:33 +01:00
Grant Miller
ea9e59931f Don't rename DMA channels if they don't start at zero 2022-03-08 16:18:24 -06:00
Dario Nieuwenhuis
ccc3468e62 Merge pull request #126 from GrantM11235/make-tmp-dmas
Create `tmp/dmas/` if it doesn't exist
2022-03-08 23:07:10 +01:00
Grant Miller
a1972e7a22 Create tmp/dmas/ if it doesn't exist 2022-03-08 15:53:16 -06:00
Dario Nieuwenhuis
e977f83fe1 Merge pull request #124 from msamsonoff/g0-updates
STM32G0 updates
2022-03-02 18:22:37 +01:00
Matthew W. Samsonoff
03b2707944 stm32g0: fix embarrassing typo 2022-03-02 11:45:26 -05:00
Matthew W. Samsonoff
1a4706a799 stm32g0: add registers for FLASH 2022-03-02 11:27:38 -05:00
Matthew W. Samsonoff
57903f105d stm32g0: add enums for RCC 2022-03-02 11:27:33 -05:00
Matthew W. Samsonoff
14a26e9edd stm32g0: fix typo 2022-03-02 11:26:45 -05:00
Matthew W. Samsonoff
0f5292f20e stm32g0: CCIPR2/USBSEL is two bits wide 2022-03-02 11:26:38 -05:00
Dario Nieuwenhuis
ce7ba764c9 fix multicore nvic 2022-02-25 01:14:39 +01:00
Dario Nieuwenhuis
8a935d22e5 Fix parsing of H7ab BDMA1/BDMA2 2022-02-24 05:55:16 +01:00
Dario Nieuwenhuis
324e5bee8d rcc/h7: add missing stuff, cleanup. 2022-02-24 05:54:43 +01:00
Dario Nieuwenhuis
b6bccb1456 cleanup gpio regs. 2022-02-24 01:59:57 +01:00
Dario Nieuwenhuis
85854d8f42 usart_v2: fix wrong M1 bit 2022-02-14 02:07:49 +01:00
Dario Nieuwenhuis
fde7738019 flash/u5: fix inconsistent BKPRAM vs BKPSRAM 2022-02-14 02:07:33 +01:00
Dario Nieuwenhuis
9b32ce66b6 mdios: fix accidentally merge-regs'd file. 2022-02-14 02:07:20 +01:00
Dario Nieuwenhuis
c2804abc9a rcc: fix inconsistent naming. 2022-02-14 02:07:08 +01:00
Dario Nieuwenhuis
2c5e858584 chiptool fmt 2022-02-14 00:45:36 +01:00
Dario Nieuwenhuis
7b2df420ac rcc: remove useless enums. 2022-02-14 00:26:46 +01:00
Dario Nieuwenhuis
66ecaf8b98 rcc: unify rcc_f0, rcc_f0x0 2022-02-14 00:25:12 +01:00
Dario Nieuwenhuis
3d6895a77f Rename clocks AHB -> AHB1, APB -> APB1.
This makes it more consistent across chips, no more "AHB vs AHB1" issues.
2022-02-13 23:22:10 +01:00
Dario Nieuwenhuis
fcd18b3e3d i2c: cleanup a bit. 2022-02-13 23:21:48 +01:00
Dario Nieuwenhuis
8402b43853 remove 'registers' nested struct in rcc 2022-02-07 23:12:40 +01:00
Dario Nieuwenhuis
5365ea053a split "magic" block string into an object, so consumers don't have to do tricky parsing. 2022-02-07 23:12:40 +01:00
Dario Nieuwenhuis
32b5a815c6 change memory regions from dict to array 2022-02-07 20:37:35 +01:00
Dario Nieuwenhuis
00fc25453d switch chip files from yaml to json. remove OrderedDict. 2022-02-07 02:06:23 +01:00