Jensenn
974de5f19b
Add BUFEN field from l4xx devices
2022-04-25 12:05:36 -06:00
Jensenn
338c78b771
Add LCD register set from l100 device
2022-04-25 12:04:23 -06:00
David Lenfesty
a0368410a5
Add STM32F107 ethernet v1a peripheral
2022-04-21 17:05:23 -06:00
David Lenfesty
670f270c0a
add xmltodict requirement to README
2022-04-21 17:04:59 -06:00
Dario Nieuwenhuis
c01cb449e9
Add L5 PWR
2022-04-10 01:46:46 +02:00
Dario Nieuwenhuis
4c99f450b3
Merge pull request #138 from ant32/main
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add stm32l4 power registers
2022-04-09 20:53:33 +02:00
Philip A Reimer
13a9eebb52
add l4 pwr enums
2022-04-09 11:05:50 -06:00
Philip A Reimer
5f64d3d148
arrayify l4 power control registers
2022-04-09 11:05:50 -06:00
Philip A Reimer
e81eeb157e
add pwr_l4
2022-04-09 11:05:50 -06:00
Dario Nieuwenhuis
c90234583e
RCC: fix USBFS -> USB
2022-04-09 00:43:48 +02:00
Dario Nieuwenhuis
6107d5a72e
Add USB
2022-04-09 00:28:44 +02:00
Dario Nieuwenhuis
b5d84de6e6
L5: add FLASH, SYSCFG
2022-04-08 02:54:56 +02:00
Dario Nieuwenhuis
eb678443a3
L5: fix RCC
2022-04-08 02:54:37 +02:00
Dario Nieuwenhuis
1d5853be40
run chiptool fmt with new version that trims descriptions.
2022-04-08 01:17:53 +02:00
Dario Nieuwenhuis
b797baeb14
Merge pull request #136 from ant32/main
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Use OTG v1 for v3
2022-03-30 01:27:02 +02:00
Dario Nieuwenhuis
e130607888
Merge pull request #137 from chemicstry/timer_regs
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Add missing timer ITR3 field
2022-03-30 01:01:32 +02:00
chemicstry
1d9e453670
Add missing timer ITR3 field
2022-03-30 01:59:08 +03:00
Philip A Reimer
62ebc483f9
use otg v1 for v3
2022-03-28 22:37:11 -06:00
Dario Nieuwenhuis
9838bd78f3
Merge pull request #135 from ant32/main
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WIP: add usb registers to l4r5
2022-03-26 18:53:45 +01:00
Philip A Reimer
55163d5857
Add OTG FS v3
2022-03-24 21:16:11 -06:00
Dario Nieuwenhuis
ecad66103f
Merge pull request #134 from nviennot/otg
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Add USB_OTG_FS registers
2022-03-22 17:11:27 +01:00
Nicolas Viennot
4ed9a42360
Add OTG register definitions
2022-03-20 19:07:24 -04:00
Dario Nieuwenhuis
b5ffa60b5f
Merge pull request #133 from nviennot/fsmc
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FSMC register block
2022-03-20 21:01:20 +01:00
Dario Nieuwenhuis
6ee54e8bf1
Merge pull request #131 from chemicstry/f4_uart
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Fix F4 UART definitions
2022-03-20 21:00:04 +01:00
Dario Nieuwenhuis
d5b53707d0
Merge pull request #132 from Gekkio/improve-f2-support
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F2: Add SYSCFG/FLASH/PWR, fix DBGMCU SVD typos
2022-03-20 20:59:33 +01:00
Dario Nieuwenhuis
ca8f4b3e0d
Merge pull request #130 from chemicstry/sdio_fix2
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Unify SDMMC v1 and v2 register names
2022-03-20 20:52:20 +01:00
Dario Nieuwenhuis
5c2ec818f6
Merge pull request #129 from nviennot/timer_clock
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Timers use the clock speed apb1_tim and apb2_tim
2022-03-20 20:51:45 +01:00
Nicolas Viennot
f9301d42f0
Add the FSMC register block
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The current v1 yaml has a few extra registers defined that don't belong to
some of the chips out there (the ones at byte_offset 320 and above), but
the rest of registers are identical.
2022-03-18 23:41:56 -04:00
Joonas Javanainen
f622be8f03
Add PWR block for F2
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Verified using RM0033 (F205xx/F207xx/F215xx/F217xx) Rev 9
2022-03-17 21:44:23 +02:00
Joonas Javanainen
dfc24f37fd
Fix F2 DBGMCU typos
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The typos come from the original SVD files
2022-03-17 21:37:27 +02:00
Joonas Javanainen
e36b972e3c
Add FLASH block for F2
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Verified using PM0059 Programming manual (F205/215, F207/217) Rev 5
2022-03-17 21:32:59 +02:00
Joonas Javanainen
b47951b4a2
Add SYSCFG block for F2
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Verified using RM0033 (F205xx/F207xx/F215xx/F217xx) Rev 9
2022-03-17 21:32:37 +02:00
chemicstry
0f80d10a1f
Fix F4 UART parsing
2022-03-17 16:33:34 +02:00
chemicstry
410790c595
Update fieldset
2022-03-16 19:18:12 +02:00
chemicstry
802a2b8a29
Update fieldset
2022-03-16 18:50:55 +02:00
chemicstry
d29a2a3d20
Update fieldset
2022-03-16 18:48:50 +02:00
chemicstry
118dde4d4c
Fix fieldset
2022-03-16 18:44:25 +02:00
chemicstry
caa613eab2
Unify SDMMC register names
2022-03-16 18:40:36 +02:00
Dario Nieuwenhuis
67a00a393e
Merge pull request #128 from nviennot/spi
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Add SPI modules for F1 family
2022-03-15 23:54:46 +01:00
Nicolas Viennot
b3f9f3e286
Timers use the clock speed apb1_tim and apb2_tim
2022-03-15 02:55:33 -04:00
Nicolas Viennot
2cd7632fc9
Add SPI modules for F1 family
2022-03-15 02:51:18 -04:00
Dario Nieuwenhuis
cf354c22e1
Merge pull request #127 from GrantM11235/dont-rename-dma-ch
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Don't rename DMA channels if they don't start at zero
2022-03-08 23:27:33 +01:00
Grant Miller
ea9e59931f
Don't rename DMA channels if they don't start at zero
2022-03-08 16:18:24 -06:00
Dario Nieuwenhuis
ccc3468e62
Merge pull request #126 from GrantM11235/make-tmp-dmas
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Create `tmp/dmas/` if it doesn't exist
2022-03-08 23:07:10 +01:00
Grant Miller
a1972e7a22
Create tmp/dmas/ if it doesn't exist
2022-03-08 15:53:16 -06:00
Dario Nieuwenhuis
e977f83fe1
Merge pull request #124 from msamsonoff/g0-updates
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STM32G0 updates
2022-03-02 18:22:37 +01:00
Matthew W. Samsonoff
03b2707944
stm32g0: fix embarrassing typo
2022-03-02 11:45:26 -05:00
Matthew W. Samsonoff
1a4706a799
stm32g0: add registers for FLASH
2022-03-02 11:27:38 -05:00
Matthew W. Samsonoff
57903f105d
stm32g0: add enums for RCC
2022-03-02 11:27:33 -05:00
Matthew W. Samsonoff
14a26e9edd
stm32g0: fix typo
2022-03-02 11:26:45 -05:00
