Dario Nieuwenhuis
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ff45aa382e
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rcc: add more missing enums.
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2023-10-11 00:07:28 +02:00 |
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Dario Nieuwenhuis
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e89b8cfc30
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rcc: add PLL enums.
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2023-10-09 02:44:42 +02:00 |
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xoviat
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eecd80c34d
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Merge pull request #278 from xoviat/rcc
rcc: lower field names
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2023-10-08 23:15:53 +00:00 |
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xoviat
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926dfb5ed2
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Merge branch 'main' of https://github.com/embassy-rs/stm32-data into rcc
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2023-10-08 18:05:40 -05:00 |
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xoviat
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421c595a13
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rcc: lower reg data
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2023-10-08 18:05:16 -05:00 |
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xoviat
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81fbbfdf56
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Merge pull request #277 from xoviat/mux
rcc: fix mux determinism
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2023-10-08 20:53:18 +00:00 |
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xoviat
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61c9f8c691
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rcc: fix mux determinism
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2023-10-08 15:43:06 -05:00 |
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xoviat
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6371d5472b
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Merge pull request #276 from xoviat/pretty-print
gen: pretty print ir
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2023-10-08 20:05:41 +00:00 |
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xoviat
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ee8e8c82dc
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gen: pretty print ir
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2023-10-08 14:46:58 -05:00 |
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Dario Nieuwenhuis
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a7bf7f02d1
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Fix MCO/MCO1 inconsistency in G0, C0.
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2023-10-07 01:13:03 +02:00 |
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Dario Nieuwenhuis
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6c73ffbd0b
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rcc: make naming consistent between "mco" and "mcosel".
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2023-10-07 00:46:19 +02:00 |
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Dario Nieuwenhuis
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8d112b7a93
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rcc: add MCO enums for WB
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2023-10-07 00:20:42 +02:00 |
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Dario Nieuwenhuis
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e701705d79
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rcc: add MCOPRE enum for h5, h7.
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2023-10-07 00:10:08 +02:00 |
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Dario Nieuwenhuis
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11256dc370
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chiptool fmt.
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2023-10-07 00:09:14 +02:00 |
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xoviat
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f0f06b4c95
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Merge pull request #274 from xoviat/pin-sort
sort pins by key
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2023-10-06 01:17:59 +00:00 |
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xoviat
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e7a291e659
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sort pins by key
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2023-10-05 20:04:58 -05:00 |
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xoviat
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9075e499c2
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Merge pull request #272 from mattico/h7-lsedrv-errata
RCC: LSEDRV Register Fixes
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2023-10-06 00:49:46 +00:00 |
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xoviat
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2271da1671
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Merge branch 'main' of https://github.com/embassy-rs/stm32-data into h7-lsedrv-errata
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2023-10-05 19:30:38 -05:00 |
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xoviat
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5b75119688
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Merge pull request #273 from xoviat/pin-sorting
sort pins to avoid diff
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2023-10-06 00:14:36 +00:00 |
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xoviat
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ab12bb45b1
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sort pins to avoid diff
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2023-10-05 19:08:51 -05:00 |
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Matt Ickstadt
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2ceed56e94
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RCC: add LSEDRV enums for WB and WL series
These are in the RMs but previously missing.
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2023-10-05 11:18:49 -05:00 |
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Matt Ickstadt
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60d034f9fa
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RCC: unify LSEDRV enum variant names and descriptions
Now the only differences are the series which have swapped medium low/high bits: F0, F3v2, F3, F7, and H7_RM0433.
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2023-10-05 10:56:02 -05:00 |
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Matt Ickstadt
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32b3bd75ea
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H7: Fix LSEDRV bits of RM0433
Errata ES0392 2.2.14
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2023-10-05 10:37:07 -05:00 |
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Matt Ickstadt
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568a7058a1
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Create rcc_h7rm04ee.yaml as a copy of rcc_h7.yaml
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2023-10-05 10:35:43 -05:00 |
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xoviat
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172c5ea188
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Merge pull request #271 from xoviat/opamp
opamp: add other pins for f3 and g4
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2023-10-04 01:45:36 +00:00 |
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xoviat
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feec3c1617
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opamp: add other pins for f3 and g4
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2023-10-03 20:38:38 -05:00 |
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xoviat
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06d13dfd24
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Merge pull request #267 from oll3/tamp_block
add TAMP register block for g0, g4, l5, u5 and wl
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2023-10-02 21:00:10 +00:00 |
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xoviat
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1638192e54
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ci: clone with more depth
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2023-10-02 15:57:14 -05:00 |
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Dario Nieuwenhuis
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4baa9a0079
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Merge pull request #265 from xoviat/sel
rcc: pipe through sel mux and generate ir
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2023-10-02 20:40:01 +00:00 |
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Olle Sandberg
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00894c8e3d
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clean up TAMP registers
Remove obvious 1 bit enums and make arrays of repeated fields.
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2023-10-02 07:15:40 +02:00 |
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xoviat
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dfb25f393c
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Merge pull request #270 from xoviat/periph-pins
add man impl. pin signals
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2023-10-01 20:30:15 +00:00 |
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xoviat
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92ae3d5870
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optimize hashset gen.
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2023-10-01 13:44:30 -05:00 |
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xoviat
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4a893c37da
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add man impl. pin signals
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2023-10-01 13:28:31 -05:00 |
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xoviat
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8ee2862086
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Merge pull request #254 from JuliDi/dont-remove-analogswitch-pins
Handle "_C" pins
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2023-09-30 15:28:30 +00:00 |
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xoviat
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7ddfef6034
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Merge branch 'main' of https://github.com/embassy-rs/stm32-data into sel
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2023-09-29 18:22:19 -05:00 |
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xoviat
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23f9d9b236
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metapac: allow runtime inspection of ir types
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2023-09-29 18:21:03 -05:00 |
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xoviat
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735cab337a
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Merge pull request #269 from xoviat/sbs
rename sbs to syscfg
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2023-09-29 00:09:13 +00:00 |
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xoviat
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e36d73af66
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Merge branch 'main' of https://github.com/embassy-rs/stm32-data into sbs
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2023-09-28 18:52:19 -05:00 |
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xoviat
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97a4fb22b2
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rename sbs to syscfg
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2023-09-28 18:50:30 -05:00 |
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xoviat
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a1052bed00
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Merge pull request #268 from xoviat/opamp
opamp: add f3 and g4
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2023-09-28 23:35:20 +00:00 |
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xoviat
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0041cf976c
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opamp: add f3 and g4
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2023-09-28 18:32:30 -05:00 |
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xoviat
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149ea79f2c
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Merge pull request #230 from xoviat/lptim-basic
lptim: consolidate and add for stm32wb
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2023-09-28 02:12:08 +00:00 |
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xoviat
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1b39301d8c
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Merge branch 'master' into lptim-basic
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2023-09-27 21:09:34 -05:00 |
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xoviat
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6ed00dbbd0
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Merge pull request #266 from Radiator-Labs/main
Add enums MCOPRE & MCOSEL to wl5 & wle targets
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2023-09-27 22:47:15 +00:00 |
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Olle Sandberg
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e7de675353
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add TAMP register block for g0, g4, l5, u5 and wl
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2023-09-27 07:35:27 +02:00 |
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xoviat
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d63a20e69b
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Merge branch 'main' of https://github.com/embassy-rs/stm32-data into sel
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2023-09-26 20:20:38 -05:00 |
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xoviat
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38619f8b99
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metapac: generate ir
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2023-09-26 20:20:28 -05:00 |
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shakencodes
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0adf2a75d1
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Add enums MCOPRE & MCOSEL to wl5 & wle targets
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2023-09-26 10:55:19 -07:00 |
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Dario Nieuwenhuis
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bdbf126746
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flash: set for all l0 chips.
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2023-09-26 05:06:10 +02:00 |
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xoviat
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1595920962
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rcc: pipe through sel mux
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2023-09-25 19:26:46 -05:00 |
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