54 Commits

Author SHA1 Message Date
Dario Nieuwenhuis
00fc25453d switch chip files from yaml to json. remove OrderedDict. 2022-02-07 02:06:23 +01:00
Dario Nieuwenhuis
7b368b0035 move memory parsing to own file 2022-02-07 02:06:23 +01:00
Dario Nieuwenhuis
48fdf50203 Change peripherals from dict to array 2022-02-07 02:05:30 +01:00
Dario Nieuwenhuis
d8b8bac3a5 change dma channels from dict to array 2022-02-07 02:05:30 +01:00
Dario Nieuwenhuis
f07c93a64a change chip interrupts from dict to array 2022-02-07 02:05:30 +01:00
Dario Nieuwenhuis
2a14936a5e Split interrupt parsing to separate module 2022-02-05 01:45:34 +01:00
Dario Nieuwenhuis
048f6766fd lpuart: cleanup v1, v2. Merge v2 and v3 2022-02-05 00:59:20 +01:00
Maarten Oosting
e5da7538e1 LPUART: append lpuart peripherals to perimap 2022-02-05 00:59:20 +01:00
chemicstry
432619467f Fix encoding on windows 2022-02-04 15:49:56 +02:00
chemicstry
f1d0a09b79 Fix USB OTG pin AF parsing 2022-02-04 02:32:39 +02:00
chemicstry
8e1a07b928 Fix peripheral names with underscores 2022-02-04 01:49:39 +02:00
chemicstry
ce95fe0ac5 Fix path separators on windows 2022-02-04 01:47:29 +02:00
Dario Nieuwenhuis
11290fd274 rcc: make GPIOxEN/IOPxEN consistent. 2022-01-24 02:13:24 +01:00
Greg V
76572f3d55 Add flash for STM32L1
NOTE: named 'Flash' instead of 'FLASH' in SVD
2022-01-14 16:50:35 +03:00
Dario Nieuwenhuis
e5e7e26d05 Fix duplicated irqn in stm32f100 2022-01-06 16:30:33 +01:00
Dominik Boehi
bb6321bc87 Extract flash information for STM32WB by looking for FLASH_REG_BASE define 2022-01-04 19:38:05 +01:00
Dominik Boehi
d8189255fa Add Flash, RTC, PWR for STM32WB55, fix IPCC CPU registers 2022-01-04 18:52:34 +01:00
Dario Nieuwenhuis
36e6571960 Add exception for STM32WL SUBGHZSPI naming. 2022-01-01 12:05:51 +01:00
Dario Nieuwenhuis
398fb17bf4 Ignore EXTIx signals in ADCs. 2022-01-01 11:28:02 +01:00
Nikita Strygin
d50f6b4676 Use signals from MCU xml
Use MCU xml as a source of truth for signal and pin assignments

This has some nice side-effects as exposing analog signals without
handling them as special cases and not having __some__ (or maybe all)
pins not exposed in the chip package occur in the yamls

But the most useful part probably is the better support for F1 series,
which don't have all pins defined in GPIO due to not being remappable
2022-01-01 10:52:39 +01:00
Dario Nieuwenhuis
8e9e8522d1 Sort analog pins 2022-01-01 10:51:45 +01:00
Sjoerd Simons
2616e499c6 Recognize ADC on STM32F1xx
Translate the ADC block available in the F1 family to adc_f1
2021-12-29 15:50:38 +01:00
Dario Nieuwenhuis
73902044de Fix typo 2021-12-23 20:32:39 +01:00
VasanthakumarV
a5008c71d5 [manual] Map register blocks to timers for F3 chips 2021-12-23 16:10:22 +05:30
Dario Nieuwenhuis
0e9fa2f438 Merge pull request #109 from VasanthakumarV/f3-registers
Add `SYSCFG`, `PWR`, `FLASH` and `SPI` registers for `STM32F3`
2021-12-16 08:12:07 +01:00
Matous Hybl
8402040d17 Fix generation of FMC peripheral in chip yamls. Add FMC registers. 2021-12-08 20:01:57 +01:00
VasanthakumarV
3275e41057 [manual] Add register mappings for F3
Pattern matching for `FLASH`, `SYSCFG`, `PWR` and `SPI` registers
added for F3.
2021-12-08 15:43:23 +05:30
Ulf Lilleengen
cc3ea51778 Merge pull request #108 from embassy-rs/detect-iop-clock
Detect iop bus
2021-12-02 11:25:27 +01:00
Ulf Lilleengen
6eab78746e Fix wording 2021-12-02 11:23:16 +01:00
Ulf Lilleengen
57c7058739 Detect GPIO enable/reset registers on chips with separate bus for GPIO 2021-12-02 11:17:52 +01:00
Dario Nieuwenhuis
9afa81e824 Merge pull request #107 from matoushybl/timers
Add correct timer register mapping for the H7 family.
2021-11-30 20:16:05 +01:00
Matous Hybl
c2e87d9cc8 Relax DCMI peripheral matching condition. 2021-11-30 11:49:31 +01:00
Matous Hybl
2b56ec9e99 Add correct H7 timer register blocks. 2021-11-30 11:28:22 +01:00
Dario Nieuwenhuis
cf665a99f3 better handling of naming exceptions. 2021-11-29 01:57:34 +01:00
Dario Nieuwenhuis
620afab503 more complete rcc info: clock, and enable/reset registers 2021-11-29 01:57:34 +01:00
Dario Nieuwenhuis
f93860b894 Do not output kind to the yamls.
I originally added it for debugging of the stm32-data script itself.
It is useless to anyone trying to consume the yamls, due to the wonky st versioning.
2021-11-29 01:57:34 +01:00
Dario Nieuwenhuis
a83949d082 Only parse rcc from the registers, not the modes xml.
The info we have is available in both, the registers seem a bit
more reliable.
2021-11-29 01:57:34 +01:00
Dario Nieuwenhuis
2d6befa3a4 Unify handling of "ghost peripherals" missing from the XMLs. 2021-11-29 01:57:34 +01:00
Dario Nieuwenhuis
a447451969 Ban STM32GBK1CB.
It's a ghost stm32g4 chip that completely breaks the naming convention
and is apparently full-unobtainium (doesn't exist on mouser, digikey, etc.)
2021-11-28 23:34:12 +01:00
Dario Nieuwenhuis
b4191f4d1c clocks: accept regs like xxENR1 (previously it'd only accept xxENR)
This adds a few more `clock` entries.
2021-11-28 22:26:22 +01:00
Dario Nieuwenhuis
ac50274c95 Ensure consistent order for dmamuxes. 2021-11-28 21:56:02 +01:00
Dario Nieuwenhuis
353411841c stm32g4 support. 2021-11-27 02:20:17 +01:00
Ulf Lilleengen
6e3877238c Add overrides for missing GPIO blocks for STM32L432 2021-11-22 13:27:04 +01:00
Bob McWhirter
2f142fadef Adjust to apply I2C for U5. 2021-11-11 15:52:31 -05:00
Bob McWhirter
46513a50f8 Further adjustment for U5. 2021-11-08 13:48:03 -05:00
Dario Nieuwenhuis
c34409d6f8 Add analog pins for all analog peris, not just ADC 2021-11-05 19:18:58 +01:00
Dario Nieuwenhuis
8833e7a8df Add stub stm32f1 gpio parsing 2021-11-05 18:20:53 +01:00
Dario Nieuwenhuis
8b5f735c6d Remove duplicated gpio maps 2021-11-05 17:46:12 +01:00
Dario Nieuwenhuis
5cd5d2b110 Add back parsing for ADC pins. 2021-11-05 17:46:12 +01:00
Dario Nieuwenhuis
ffc40c718a Unify all docs under the docs key, sort them. 2021-11-05 17:46:11 +01:00