change DSIPHY to DSI_PHY for rcc_l4plus.yaml to match other families

2024-04-08 13:48:25 +02:00 · 2024-04-08 13:48:25 +02:00 · dd12c3787a
commit dd12c3787a
parent c8a3e8875d
1 changed files with 1 additions and 1 deletions
--- a/data/registers/rcc_l4plus.yaml
+++ b/data/registers/rcc_l4plus.yaml
@ -1713,7 +1713,7 @@ enum/DFSDMSEL:
 enum/DSISEL:
  bit_size: 1
  variants:
-  - name: DSIPHY
+  - name: DSI_PHY
    description: DSI-PHY is selected as DSI byte lane clock source (usual case)
    value: 0
  - name: PLLSAI2_Q