diff --git a/data/registers/rcc_l4plus.yaml b/data/registers/rcc_l4plus.yaml
index 17e9f27..9db03de 100644
--- a/data/registers/rcc_l4plus.yaml
+++ b/data/registers/rcc_l4plus.yaml
@@ -1713,7 +1713,7 @@ enum/DFSDMSEL:
 enum/DSISEL:
   bit_size: 1
   variants:
-  - name: DSIPHY
+  - name: DSI_PHY
     description: DSI-PHY is selected as DSI byte lane clock source (usual case)
     value: 0
   - name: PLLSAI2_Q