timer: add 16-bit register info
This commit is contained in:
parent
cc525f1b25
commit
868dec1630
@ -5,6 +5,7 @@ block/TIM_1CH:
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- name: CR1
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- name: CR1
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description: control register 1
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description: control register 1
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byte_offset: 0
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byte_offset: 0
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bit_size: 16
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fieldset: CR1_1CH
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fieldset: CR1_1CH
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- name: DIER
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- name: DIER
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description: DMA/Interrupt enable register
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description: DMA/Interrupt enable register
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@ -18,6 +19,7 @@ block/TIM_1CH:
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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bit_size: 16
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fieldset: EGR_1CH
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fieldset: EGR_1CH
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- name: CCMR_Input
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- name: CCMR_Input
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description: capture/compare mode register 1 (input mode)
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description: capture/compare mode register 1 (input mode)
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@ -73,6 +75,7 @@ block/TIM_2CH:
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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bit_size: 16
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fieldset: EGR_2CH
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fieldset: EGR_2CH
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- name: CCMR_Input
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- name: CCMR_Input
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description: capture/compare mode register 1 (input mode)
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description: capture/compare mode register 1 (input mode)
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@ -121,6 +124,7 @@ block/TIM_CORE:
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- name: CR1
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- name: CR1
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description: control register 1
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description: control register 1
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byte_offset: 0
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byte_offset: 0
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bit_size: 16
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fieldset: CR1_CORE
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fieldset: CR1_CORE
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- name: DIER
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- name: DIER
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description: DMA/Interrupt enable register
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description: DMA/Interrupt enable register
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@ -134,6 +138,7 @@ block/TIM_CORE:
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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bit_size: 16
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fieldset: EGR_CORE
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fieldset: EGR_CORE
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- name: CNT
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- name: CNT
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description: counter
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description: counter
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@ -154,6 +159,7 @@ block/TIM_GP16:
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- name: CR1
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- name: CR1
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description: control register 1
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description: control register 1
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byte_offset: 0
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byte_offset: 0
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bit_size: 16
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fieldset: CR1_GP16
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fieldset: CR1_GP16
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- name: CR2
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- name: CR2
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description: control register 2
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description: control register 2
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@ -175,6 +181,7 @@ block/TIM_GP16:
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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bit_size: 16
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fieldset: EGR_GP16
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fieldset: EGR_GP16
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- name: CCMR_Input
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- name: CCMR_Input
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description: capture/compare mode register 1-2 (input mode)
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description: capture/compare mode register 1-2 (input mode)
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@ -5,6 +5,7 @@ block/TIM_1CH:
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- name: CR1
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- name: CR1
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description: control register 1
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description: control register 1
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byte_offset: 0
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byte_offset: 0
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bit_size: 16
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fieldset: CR1_1CH
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fieldset: CR1_1CH
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- name: DIER
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- name: DIER
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description: DMA/Interrupt enable register
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description: DMA/Interrupt enable register
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@ -18,6 +19,7 @@ block/TIM_1CH:
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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bit_size: 16
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fieldset: EGR_1CH
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fieldset: EGR_1CH
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- name: CCMR_Input
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- name: CCMR_Input
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description: capture/compare mode register 1 (input mode)
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description: capture/compare mode register 1 (input mode)
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@ -73,6 +75,7 @@ block/TIM_1CH_CMP:
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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bit_size: 16
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fieldset: EGR_1CH_CMP
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fieldset: EGR_1CH_CMP
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- name: CCER
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- name: CCER
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description: capture/compare enable register
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description: capture/compare enable register
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@ -81,6 +84,7 @@ block/TIM_1CH_CMP:
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- name: RCR
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- name: RCR
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description: repetition counter register
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description: repetition counter register
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byte_offset: 48
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byte_offset: 48
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bit_size: 16
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fieldset: RCR_1CH_CMP
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fieldset: RCR_1CH_CMP
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- name: BDTR
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- name: BDTR
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description: break and dead-time register
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description: break and dead-time register
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@ -122,6 +126,7 @@ block/TIM_2CH:
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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bit_size: 16
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fieldset: EGR_2CH
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fieldset: EGR_2CH
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- name: CCMR_Input
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- name: CCMR_Input
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description: capture/compare mode register 1 (input mode)
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description: capture/compare mode register 1 (input mode)
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@ -176,6 +181,7 @@ block/TIM_2CH_CMP:
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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bit_size: 16
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fieldset: EGR_2CH_CMP
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fieldset: EGR_2CH_CMP
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- name: CCMR_Input
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- name: CCMR_Input
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description: capture/compare mode register 1 (input mode)
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description: capture/compare mode register 1 (input mode)
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@ -225,6 +231,7 @@ block/TIM_ADV:
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- name: CR1
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- name: CR1
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description: control register 1
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description: control register 1
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byte_offset: 0
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byte_offset: 0
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bit_size: 16
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fieldset: CR1_GP16
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fieldset: CR1_GP16
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- name: CR2
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- name: CR2
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description: control register 2
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description: control register 2
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@ -246,6 +253,7 @@ block/TIM_ADV:
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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bit_size: 16
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fieldset: EGR_ADV
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fieldset: EGR_ADV
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- name: CCMR_Input
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- name: CCMR_Input
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description: capture/compare mode register 1-2 (input mode)
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description: capture/compare mode register 1-2 (input mode)
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@ -268,6 +276,7 @@ block/TIM_ADV:
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- name: RCR
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- name: RCR
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description: repetition counter register
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description: repetition counter register
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byte_offset: 48
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byte_offset: 48
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bit_size: 16
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fieldset: RCR_ADV
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fieldset: RCR_ADV
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- name: CCR
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- name: CCR
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description: capture/compare register x (x=1-4)
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description: capture/compare register x (x=1-4)
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@ -329,6 +338,7 @@ block/TIM_CORE:
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- name: CR1
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- name: CR1
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description: control register 1
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description: control register 1
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byte_offset: 0
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byte_offset: 0
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bit_size: 16
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fieldset: CR1_CORE
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fieldset: CR1_CORE
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- name: DIER
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- name: DIER
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description: DMA/Interrupt enable register
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description: DMA/Interrupt enable register
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@ -342,6 +352,7 @@ block/TIM_CORE:
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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bit_size: 16
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fieldset: EGR_CORE
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fieldset: EGR_CORE
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- name: CNT
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- name: CNT
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description: counter
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description: counter
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@ -362,6 +373,7 @@ block/TIM_GP16:
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- name: CR1
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- name: CR1
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description: control register 1
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description: control register 1
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byte_offset: 0
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byte_offset: 0
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bit_size: 16
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fieldset: CR1_GP16
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fieldset: CR1_GP16
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- name: CR2
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- name: CR2
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description: control register 2
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description: control register 2
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@ -383,6 +395,7 @@ block/TIM_GP16:
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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bit_size: 16
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fieldset: EGR_GP16
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fieldset: EGR_GP16
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- name: CCMR_Input
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- name: CCMR_Input
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description: capture/compare mode register 1-2 (input mode)
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description: capture/compare mode register 1-2 (input mode)
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@ -5,6 +5,7 @@ block/TIM_1CH:
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- name: CR1
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- name: CR1
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description: control register 1
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description: control register 1
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byte_offset: 0
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byte_offset: 0
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bit_size: 16
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fieldset: CR1_1CH
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fieldset: CR1_1CH
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- name: DIER
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- name: DIER
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description: DMA/Interrupt enable register
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description: DMA/Interrupt enable register
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@ -18,6 +19,7 @@ block/TIM_1CH:
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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bit_size: 16
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fieldset: EGR_1CH
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fieldset: EGR_1CH
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- name: CCMR_Input
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- name: CCMR_Input
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description: capture/compare mode register 1 (input mode)
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description: capture/compare mode register 1 (input mode)
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@ -80,6 +82,7 @@ block/TIM_1CH_CMP:
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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bit_size: 16
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fieldset: EGR_1CH_CMP
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fieldset: EGR_1CH_CMP
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- name: CCER
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- name: CCER
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description: capture/compare enable register
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description: capture/compare enable register
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@ -88,6 +91,7 @@ block/TIM_1CH_CMP:
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- name: RCR
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- name: RCR
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description: repetition counter register
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description: repetition counter register
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byte_offset: 48
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byte_offset: 48
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bit_size: 16
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fieldset: RCR_1CH_CMP
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fieldset: RCR_1CH_CMP
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- name: BDTR
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- name: BDTR
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description: break and dead-time register
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description: break and dead-time register
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@ -136,6 +140,7 @@ block/TIM_2CH:
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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bit_size: 16
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fieldset: EGR_2CH
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fieldset: EGR_2CH
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- name: CCMR_Input
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- name: CCMR_Input
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description: capture/compare mode register 1 (input mode)
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description: capture/compare mode register 1 (input mode)
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@ -197,6 +202,7 @@ block/TIM_2CH_CMP:
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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bit_size: 16
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fieldset: EGR_2CH_CMP
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fieldset: EGR_2CH_CMP
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- name: CCMR_Input
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- name: CCMR_Input
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description: capture/compare mode register 1 (input mode)
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description: capture/compare mode register 1 (input mode)
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@ -238,6 +244,7 @@ block/TIM_ADV:
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- name: CR1
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- name: CR1
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description: control register 1
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description: control register 1
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byte_offset: 0
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byte_offset: 0
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bit_size: 16
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fieldset: CR1_GP16
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fieldset: CR1_GP16
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- name: CR2
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- name: CR2
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description: control register 2
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description: control register 2
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@ -259,6 +266,7 @@ block/TIM_ADV:
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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bit_size: 16
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fieldset: EGR_ADV
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fieldset: EGR_ADV
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- name: CCMR_Input
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- name: CCMR_Input
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description: capture/compare mode register 1-2 (input mode)
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description: capture/compare mode register 1-2 (input mode)
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@ -281,6 +289,7 @@ block/TIM_ADV:
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- name: RCR
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- name: RCR
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description: repetition counter register
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description: repetition counter register
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byte_offset: 48
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byte_offset: 48
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bit_size: 16
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fieldset: RCR_ADV
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fieldset: RCR_ADV
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- name: CCR
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- name: CCR
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description: capture/compare register x (x=1-4)
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description: capture/compare register x (x=1-4)
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@ -347,6 +356,7 @@ block/TIM_CORE:
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- name: CR1
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- name: CR1
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description: control register 1
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description: control register 1
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byte_offset: 0
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byte_offset: 0
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bit_size: 16
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fieldset: CR1_CORE
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fieldset: CR1_CORE
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- name: DIER
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- name: DIER
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description: DMA/Interrupt enable register
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description: DMA/Interrupt enable register
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@ -360,6 +370,7 @@ block/TIM_CORE:
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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bit_size: 16
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fieldset: EGR_CORE
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fieldset: EGR_CORE
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- name: CNT
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- name: CNT
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description: counter
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description: counter
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@ -384,6 +395,7 @@ block/TIM_GP16:
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- name: CR1
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- name: CR1
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description: control register 1
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description: control register 1
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byte_offset: 0
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byte_offset: 0
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bit_size: 16
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fieldset: CR1_GP16
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fieldset: CR1_GP16
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- name: CR2
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- name: CR2
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description: control register 2
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description: control register 2
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@ -405,6 +417,7 @@ block/TIM_GP16:
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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bit_size: 16
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fieldset: EGR_GP16
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fieldset: EGR_GP16
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- name: CCMR_Input
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- name: CCMR_Input
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description: capture/compare mode register 1-2 (input mode)
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description: capture/compare mode register 1-2 (input mode)
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