diff --git a/data/registers/timer_l0.yaml b/data/registers/timer_l0.yaml index b795a7f..3e4cb28 100644 --- a/data/registers/timer_l0.yaml +++ b/data/registers/timer_l0.yaml @@ -5,6 +5,7 @@ block/TIM_1CH: - name: CR1 description: control register 1 byte_offset: 0 + bit_size: 16 fieldset: CR1_1CH - name: DIER description: DMA/Interrupt enable register @@ -18,6 +19,7 @@ block/TIM_1CH: description: event generation register byte_offset: 20 access: Write + bit_size: 16 fieldset: EGR_1CH - name: CCMR_Input description: capture/compare mode register 1 (input mode) @@ -73,6 +75,7 @@ block/TIM_2CH: description: event generation register byte_offset: 20 access: Write + bit_size: 16 fieldset: EGR_2CH - name: CCMR_Input description: capture/compare mode register 1 (input mode) @@ -121,6 +124,7 @@ block/TIM_CORE: - name: CR1 description: control register 1 byte_offset: 0 + bit_size: 16 fieldset: CR1_CORE - name: DIER description: DMA/Interrupt enable register @@ -134,6 +138,7 @@ block/TIM_CORE: description: event generation register byte_offset: 20 access: Write + bit_size: 16 fieldset: EGR_CORE - name: CNT description: counter @@ -154,6 +159,7 @@ block/TIM_GP16: - name: CR1 description: control register 1 byte_offset: 0 + bit_size: 16 fieldset: CR1_GP16 - name: CR2 description: control register 2 @@ -175,6 +181,7 @@ block/TIM_GP16: description: event generation register byte_offset: 20 access: Write + bit_size: 16 fieldset: EGR_GP16 - name: CCMR_Input description: capture/compare mode register 1-2 (input mode) diff --git a/data/registers/timer_v1.yaml b/data/registers/timer_v1.yaml index e8cd3a3..ba0cea9 100644 --- a/data/registers/timer_v1.yaml +++ b/data/registers/timer_v1.yaml @@ -5,6 +5,7 @@ block/TIM_1CH: - name: CR1 description: control register 1 byte_offset: 0 + bit_size: 16 fieldset: CR1_1CH - name: DIER description: DMA/Interrupt enable register @@ -18,6 +19,7 @@ block/TIM_1CH: description: event generation register byte_offset: 20 access: Write + bit_size: 16 fieldset: EGR_1CH - name: CCMR_Input description: capture/compare mode register 1 (input mode) @@ -73,6 +75,7 @@ block/TIM_1CH_CMP: description: event generation register byte_offset: 20 access: Write + bit_size: 16 fieldset: EGR_1CH_CMP - name: CCER description: capture/compare enable register @@ -81,6 +84,7 @@ block/TIM_1CH_CMP: - name: RCR description: repetition counter register byte_offset: 48 + bit_size: 16 fieldset: RCR_1CH_CMP - name: BDTR description: break and dead-time register @@ -122,6 +126,7 @@ block/TIM_2CH: description: event generation register byte_offset: 20 access: Write + bit_size: 16 fieldset: EGR_2CH - name: CCMR_Input description: capture/compare mode register 1 (input mode) @@ -176,6 +181,7 @@ block/TIM_2CH_CMP: description: event generation register byte_offset: 20 access: Write + bit_size: 16 fieldset: EGR_2CH_CMP - name: CCMR_Input description: capture/compare mode register 1 (input mode) @@ -225,6 +231,7 @@ block/TIM_ADV: - name: CR1 description: control register 1 byte_offset: 0 + bit_size: 16 fieldset: CR1_GP16 - name: CR2 description: control register 2 @@ -246,6 +253,7 @@ block/TIM_ADV: description: event generation register byte_offset: 20 access: Write + bit_size: 16 fieldset: EGR_ADV - name: CCMR_Input description: capture/compare mode register 1-2 (input mode) @@ -268,6 +276,7 @@ block/TIM_ADV: - name: RCR description: repetition counter register byte_offset: 48 + bit_size: 16 fieldset: RCR_ADV - name: CCR description: capture/compare register x (x=1-4) @@ -329,6 +338,7 @@ block/TIM_CORE: - name: CR1 description: control register 1 byte_offset: 0 + bit_size: 16 fieldset: CR1_CORE - name: DIER description: DMA/Interrupt enable register @@ -342,6 +352,7 @@ block/TIM_CORE: description: event generation register byte_offset: 20 access: Write + bit_size: 16 fieldset: EGR_CORE - name: CNT description: counter @@ -362,6 +373,7 @@ block/TIM_GP16: - name: CR1 description: control register 1 byte_offset: 0 + bit_size: 16 fieldset: CR1_GP16 - name: CR2 description: control register 2 @@ -383,6 +395,7 @@ block/TIM_GP16: description: event generation register byte_offset: 20 access: Write + bit_size: 16 fieldset: EGR_GP16 - name: CCMR_Input description: capture/compare mode register 1-2 (input mode) diff --git a/data/registers/timer_v2.yaml b/data/registers/timer_v2.yaml index b3cfab0..58bfed2 100644 --- a/data/registers/timer_v2.yaml +++ b/data/registers/timer_v2.yaml @@ -5,6 +5,7 @@ block/TIM_1CH: - name: CR1 description: control register 1 byte_offset: 0 + bit_size: 16 fieldset: CR1_1CH - name: DIER description: DMA/Interrupt enable register @@ -18,6 +19,7 @@ block/TIM_1CH: description: event generation register byte_offset: 20 access: Write + bit_size: 16 fieldset: EGR_1CH - name: CCMR_Input description: capture/compare mode register 1 (input mode) @@ -80,6 +82,7 @@ block/TIM_1CH_CMP: description: event generation register byte_offset: 20 access: Write + bit_size: 16 fieldset: EGR_1CH_CMP - name: CCER description: capture/compare enable register @@ -88,6 +91,7 @@ block/TIM_1CH_CMP: - name: RCR description: repetition counter register byte_offset: 48 + bit_size: 16 fieldset: RCR_1CH_CMP - name: BDTR description: break and dead-time register @@ -136,6 +140,7 @@ block/TIM_2CH: description: event generation register byte_offset: 20 access: Write + bit_size: 16 fieldset: EGR_2CH - name: CCMR_Input description: capture/compare mode register 1 (input mode) @@ -197,6 +202,7 @@ block/TIM_2CH_CMP: description: event generation register byte_offset: 20 access: Write + bit_size: 16 fieldset: EGR_2CH_CMP - name: CCMR_Input description: capture/compare mode register 1 (input mode) @@ -238,6 +244,7 @@ block/TIM_ADV: - name: CR1 description: control register 1 byte_offset: 0 + bit_size: 16 fieldset: CR1_GP16 - name: CR2 description: control register 2 @@ -259,6 +266,7 @@ block/TIM_ADV: description: event generation register byte_offset: 20 access: Write + bit_size: 16 fieldset: EGR_ADV - name: CCMR_Input description: capture/compare mode register 1-2 (input mode) @@ -281,6 +289,7 @@ block/TIM_ADV: - name: RCR description: repetition counter register byte_offset: 48 + bit_size: 16 fieldset: RCR_ADV - name: CCR description: capture/compare register x (x=1-4) @@ -347,6 +356,7 @@ block/TIM_CORE: - name: CR1 description: control register 1 byte_offset: 0 + bit_size: 16 fieldset: CR1_CORE - name: DIER description: DMA/Interrupt enable register @@ -360,6 +370,7 @@ block/TIM_CORE: description: event generation register byte_offset: 20 access: Write + bit_size: 16 fieldset: EGR_CORE - name: CNT description: counter @@ -384,6 +395,7 @@ block/TIM_GP16: - name: CR1 description: control register 1 byte_offset: 0 + bit_size: 16 fieldset: CR1_GP16 - name: CR2 description: control register 2 @@ -405,6 +417,7 @@ block/TIM_GP16: description: event generation register byte_offset: 20 access: Write + bit_size: 16 fieldset: EGR_GP16 - name: CCMR_Input description: capture/compare mode register 1-2 (input mode)