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2023-11-14 16:25:09 -05:00

55 lines
2.2 KiB
C
Executable File

#include <stdint.h>
typedef struct {
uint32_t syncokie : 1; // 0 SYNC event OK interrupt enable
uint32_t syncwarnie: 1; // 1 SYNC warning interrupt enable
uint32_t errie : 1; // 2 Synchronization or trimming error interrupt enable
uint32_t esyncie : 1; // 3 Expected SYNC interrupt enable
uint32_t reserve0 : 1; // 4 Reserve
uint32_t cen : 1; // 5 Frequency error counter enable
uint32_t autotrimen: 1; // 6 Automatic trimming enable
uint32_t swsync : 1; // 7 Generate software SYNC event
uint32_t trim : 7; // 8 HSI48 oscillator smooth trimming
uint32_t reserve1 : 17; // 15 Reserve
} reg_crs_cr_t;
typedef struct {
uint32_t reload : 16; // 0 Counter reload value
uint32_t felim : 8; // 16 Frequency error limit
uint32_t syncdiv : 3; // 24 SYNC divider
uint32_t reserve0 : 1; // 27 Reserve
uint32_t syncsrc : 2; // 28 SYNC signal source selection
uint32_t reserve1 : 1; // 30 Reserve
uint32_t syncpol : 1; // 31 SYNC polarity selection
} reg_crs_cfgr_t;
typedef struct {
uint32_t syncokf : 1; // 0 SYNC event OK flag
uint32_t syncwarnf : 1; // 1 SYNC warning flag
uint32_t errf : 1; // 2 Error flag
uint32_t esyncf : 1; // 3 Expected SYNC flag
uint32_t reserve0 : 4; // 4 Reserve
uint32_t syncerr : 1; // 8 SYNC error
uint32_t syncmiss : 1; // 9 SYNC missed
uint32_t trimovf : 1; // 10 Trimming overflow or underflow
uint32_t reserve1 : 4; // 11 Reserve
uint32_t fedir : 1; // 15 Frequency error direction
uint32_t fecap : 16; // 16 Frequency error capture
} reg_crs_isr_t;
typedef struct {
uint32_t syncokc : 1; // 0 SYNC event OK clear flag
uint32_t syncwarnc : 1; // 1 SYNC warning clear flag
uint32_t errc : 1; // 2 Error clear flag
uint32_t esyncc : 1; // 3 Expected SYNC clear flag
uint32_t reserve0 : 28; // 4 Reserve
} reg_crs_icr_t;
typedef struct {
volatile reg_crs_cr_t cr;
volatile reg_crs_cfgr_t cfgr;
volatile reg_crs_isr_t isr;
volatile reg_crs_icr_t icr;
} reg_crs_t;