466 lines
44 KiB
C
Executable File
466 lines
44 KiB
C
Executable File
#include <stdint.h>
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typedef struct {
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uint32_t tamp1e : 1; // 0 Tamper detection on TAMP_IN1 enable
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uint32_t tamp2e : 1; // 1 Tamper detection on TAMP_IN2 enable
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uint32_t tamp3e : 1; // 2 Tamper detection on TAMP_IN3 enable
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uint32_t tamp4e : 1; // 3 Tamper detection on TAMP_IN4 enable
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uint32_t tamp5e : 1; // 4 Tamper detection on TAMP_IN5 enable
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uint32_t tamp6e : 1; // 5 Tamper detection on TAMP_IN6 enable
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uint32_t tamp7e : 1; // 6 Tamper detection on TAMP_IN7 enable
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uint32_t tamp8e : 1; // 7 Tamper detection on TAMP_IN8 enable
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uint32_t reserve0 : 8; // 8 Reserve
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uint32_t itamp1e : 1; // 16 Internal tamper 1 enable
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uint32_t itamp2e : 1; // 17 Internal tamper 2 enable
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uint32_t itamp3e : 1; // 18 Internal tamper 3 enable
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uint32_t reserve1 : 1; // 19 Reserve
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uint32_t itamp5e : 1; // 20 Internal tamper 5 enable
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uint32_t itamp6e : 1; // 21 Internal tamper 6 enable
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uint32_t itamp7e : 1; // 22 Internal tamper 7 enable
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uint32_t itamp8e : 1; // 23 Internal tamper 8 enable
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uint32_t itamp9e : 1; // 24 Internal tamper 9 enable
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uint32_t reserve2 : 1; // 25 Reserve
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uint32_t itamp11e : 1; // 26 Internal tamper 11 enable
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uint32_t itamp12e : 1; // 27 Internal tamper 12 enable
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uint32_t itamp13e : 1; // 28 Internal tamper 13 enable
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uint32_t reserve3 : 3; // 29 Reserve
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} reg_sec_tamp_tamp_cr1_t;
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typedef struct {
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uint32_t tamp1noer : 1; // 0 Tamper 1 no erase
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uint32_t tamp2noer : 1; // 1 Tamper 2 no erase
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uint32_t tamp3noer : 1; // 2 Tamper 3 no erase
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uint32_t tamp4noer : 1; // 3 Tamper 4 no erase
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uint32_t tamp5noer : 1; // 4 Tamper 5 no erase
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uint32_t tamp6noer : 1; // 5 Tamper 6 no erase
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uint32_t tamp7noer : 1; // 6 Tamper 7 no erase
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uint32_t tamp8noer : 1; // 7 Tamper 8 no erase
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uint32_t reserve0 : 8; // 8 Reserve
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uint32_t tamp1msk : 1; // 16 Tamper 1 mask The tamper 1 interrupt must not be enabled when TAMP1MSK is set.
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uint32_t tamp2msk : 1; // 17 Tamper 2 mask The tamper 2 interrupt must not be enabled when TAMP2MSK is set.
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uint32_t tamp3msk : 1; // 18 Tamper 3 mask The tamper 3 interrupt must not be enabled when TAMP3MSK is set.
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uint32_t reserve1 : 3; // 19 Reserve
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uint32_t bkblock : 1; // 22 Backup registers and device secrets access blocked
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uint32_t bkerase : 1; // 23 Backup registers and device secrets erase Writing '1 to this bit reset the backup registers and device secrets(1). Writing 0 has no effect. This bit is always read as 0.
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uint32_t tamp1trg : 1; // 24 Active level for tamper 1 input If TAMPFLT = 00 Tamper 1 input rising edge and high level triggers a tamper detection event. If TAMPFLT = 00 Tamper 1 input falling edge and low level triggers a tamper detection event.
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uint32_t tamp2trg : 1; // 25 Active level for tamper 2 input If TAMPFLT = 00 Tamper 2 input rising edge and high level triggers a tamper detection event. If TAMPFLT = 00 Tamper 2 input falling edge and low level triggers a tamper detection event.
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uint32_t tamp3trg : 1; // 26 Active level for tamper 3 input If TAMPFLT = 00 Tamper 3 input rising edge and high level triggers a tamper detection event. If TAMPFLT = 00 Tamper 3 input falling edge and low level triggers a tamper detection event.
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uint32_t tamp4trg : 1; // 27 Active level for tamper 4 input (active mode disabled) If TAMPFLT = 00 Tamper 4 input rising edge and high level triggers a tamper detection event. If TAMPFLT = 00 Tamper 4 input falling edge and low level triggers a tamper detection event.
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uint32_t tamp5trg : 1; // 28 Active level for tamper 5 input (active mode disabled) If TAMPFLT = 00 Tamper 5 input rising edge and high level triggers a tamper detection event. If TAMPFLT = 00 Tamper 5 input falling edge and low level triggers a tamper detection event.
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uint32_t tamp6trg : 1; // 29 Active level for tamper 6 input (active mode disabled) If TAMPFLT = 00 Tamper 6 input rising edge and high level triggers a tamper detection event. If TAMPFLT = 00 Tamper 6 input falling edge and low level triggers a tamper detection event.
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uint32_t tamp7trg : 1; // 30 Active level for tamper 7 input (active mode disabled) If TAMPFLT = 00 Tamper 7 input rising edge and high level triggers a tamper detection event. If TAMPFLT = 00 Tamper 7 input falling edge and low level triggers a tamper detection event.
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uint32_t tamp8trg : 1; // 31 Active level for tamper 8 input (active mode disabled) If TAMPFLT = 00 Tamper 8 input rising edge and high level triggers a tamper detection event. If TAMPFLT = 00 Tamper 8 input falling edge and low level triggers a tamper detection event.
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} reg_sec_tamp_tamp_cr2_t;
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typedef struct {
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uint32_t itamp1noer: 1; // 0 Internal Tamper 1 no erase
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uint32_t itamp2noer: 1; // 1 Internal Tamper 2 no erase
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uint32_t itamp3noer: 1; // 2 Internal Tamper 3 no erase
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uint32_t reserve0 : 1; // 3 Reserve
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uint32_t itamp5noer: 1; // 4 Internal Tamper 5 no erase
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uint32_t itamp6noer: 1; // 5 Internal Tamper 6 no erase
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uint32_t itamp7noer: 1; // 6 Internal Tamper 7 no erase
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uint32_t itamp8noer: 1; // 7 Internal Tamper 8 no erase
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uint32_t itamp9noer: 1; // 8 Internal Tamper 9 no erase
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uint32_t reserve1 : 1; // 9 Reserve
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uint32_t itamp11noer: 1; // 10 Internal Tamper 11 no erase
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uint32_t itamp12noer: 1; // 11 Internal Tamper 12 no erase
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uint32_t itamp13noer: 1; // 12 Internal Tamper 13 no erase
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uint32_t reserve2 : 19; // 13 Reserve
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} reg_sec_tamp_tamp_cr3_t;
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typedef struct {
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uint32_t tampfreq : 3; // 0 Tamper sampling frequency Determines the frequency at which each of the TAMP_INx inputs are sampled.
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uint32_t tampflt : 2; // 3 TAMP_INx filter count These bits determines the number of consecutive samples at the specified level (TAMP*TRG) needed to activate a tamper event. TAMPFLT is valid for each of the TAMP_INx inputs.
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uint32_t tampprch : 2; // 5 TAMP_INx precharge duration These bit determines the duration of time during which the pull-up/is activated before each sample. TAMPPRCH is valid for each of the TAMP_INx inputs.
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uint32_t tamppudis : 1; // 7 TAMP_INx pull-up disable This bit determines if each of the TAMPx pins are precharged before each sample.
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uint32_t reserve0 : 24; // 8 Reserve
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} reg_sec_tamp_tamp_fltcr_t;
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typedef struct {
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uint32_t tamp1am : 1; // 0 Tamper 1 active mode
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uint32_t tamp2am : 1; // 1 Tamper 2 active mode
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uint32_t tamp3am : 1; // 2 Tamper 3 active mode
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uint32_t tamp4am : 1; // 3 Tamper 4 active mode
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uint32_t tamp5am : 1; // 4 Tamper 5 active mode
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uint32_t tamp6am : 1; // 5 Tamper 6 active mode
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uint32_t tamp7am : 1; // 6 Tamper 7 active mode
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uint32_t tamp8am : 1; // 7 Tamper 8 active mode
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uint32_t atosel1 : 2; // 8 Active tamper shared output 1 selection The selected output must be available in the package pinout
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uint32_t atosel2 : 2; // 10 Active tamper shared output 2 selection The selected output must be available in the package pinout
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uint32_t atosel3 : 2; // 12 Active tamper shared output 3 selection The selected output must be available in the package pinout
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uint32_t atosel4 : 2; // 14 Active tamper shared output 4 selection The selected output must be available in the package pinout.
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uint32_t atcksel : 3; // 16 Active tamper RTC asynchronous prescaler clock selection These bits selects the RTC asynchronous prescaler stage output.The selected clock is CK_ATPRE. fCK_ATPRE = fRTCCLK / 2ATCKSEL when (PREDIV_A+1) = 128. ... These bits can be written only when all active tampers are disabled. The write protection remains for up to 1.5 ck_atpre cycles after all the active tampers are disable.
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uint32_t reserve0 : 5; // 19 Reserve
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uint32_t atper : 3; // 24 Active tamper output change period The tamper output is changed every CK_ATPER = (2ATPER x CK_ATPRE) cycles. Refer to .
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uint32_t reserve1 : 3; // 27 Reserve
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uint32_t atoshare : 1; // 30 Active tamper output sharing TAMP_IN1 is compared with TAMPOUTSEL1 TAMP_IN2 is compared with TAMPOUTSEL2 TAMP_IN3 is compared with TAMPOUTSEL3 TAMP_IN4 is compared with TAMPOUTSEL4 TAMP_IN5 is compared with TAMPOUTSEL5 TAMP_IN6 is compared with TAMPOUTSEL6 TAMP_IN7 is compared with TAMPOUTSEL7 TAMP_IN8 is compared with TAMPOUTSEL8
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uint32_t flten : 1; // 31 Active tamper filter enable
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} reg_sec_tamp_tamp_atcr1_t;
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typedef struct {
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uint32_t seed : 32; // 0 Pseudo-random generator seed value This register must be written four times with 32-bit values to provide the 128-bit seed to the PRNG. Writing to this register automatically sends the seed value to the PRNG.
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} reg_sec_tamp_tamp_atseedr_t;
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typedef struct {
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uint32_t prng : 8; // 0 Pseudo-random generator value This field provides the values of the PRNG output. Because of potential inconsistencies due to synchronization delays, PRNG must be read at least twice. The read value is correct if it is equal to previous read value. This field can only be read when the APB is in secure mode.
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uint32_t reserve0 : 6; // 8 Reserve
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uint32_t seedf : 1; // 14 Seed running flag This flag is set by hardware when a new seed is written in the TAMP_ATSEEDR. It is cleared by hardware when the PRNG has absorbed this new seed, and by system reset. The TAMP APB cock must not be switched off as long as SEEDF is set.
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uint32_t inits : 1; // 15 Active tamper initialization status This flag is set by hardware when the PRNG has absorbed the first 128-bit seed, meaning that the enabled active tampers are functional. This flag is cleared when the active tampers are disabled.
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uint32_t reserve1 : 16; // 16 Reserve
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} reg_sec_tamp_tamp_ator_t;
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typedef struct {
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uint32_t reserve0 : 8; // 0 Reserve
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uint32_t atosel1 : 3; // 8 Active tamper shared output 1 selection The selected output must be available in the package pinout. Bits 9:8 are the mirror of ATOSEL1[1:0] in the TAMP_ATCR1, and so can also be read or written through TAMP_ATCR1.
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uint32_t atosel2 : 3; // 11 Active tamper shared output 2 selection The selected output must be available in the package pinout. Bits 12:11 are the mirror of ATOSEL2[1:0] in the TAMP_ATCR1, and so can also be read or written through TAMP_ATCR1.
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uint32_t atosel3 : 3; // 14 Active tamper shared output 3 selection The selected output must be available in the package pinout. Bits 15:14 are the mirror of ATOSEL3[1:0] in the TAMP_ATCR1, and so can also be read or written through TAMP_ATCR1.
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uint32_t atosel4 : 3; // 17 Active tamper shared output 4 selection The selected output must be available in the package pinout. Bits 18:17 are the mirror of ATOSEL2[1:0] in the TAMP_ATCR1, and so can also be read or written through TAMP_ATCR1.
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uint32_t atosel5 : 3; // 20 Active tamper shared output 5 selection The selected output must be available in the package pinout.
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uint32_t atosel6 : 3; // 23 Active tamper shared output 6 selection The selected output must be available in the package pinout.
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uint32_t atosel7 : 3; // 26 Active tamper shared output 7 selection The selected output must be available in the package pinout.
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uint32_t atosel8 : 3; // 29 Active tamper shared output 8 selection The selected output must be available in the package pinout.
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} reg_sec_tamp_tamp_atcr2_t;
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typedef struct {
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uint32_t bkprwsec : 8; // 0 Backup registers read/write protection offset Protection zone 1 is defined for backup registers from TAMP_BKP0R to TAMP_BKPxR (x = BKPRWSEC-1, from 0 to 128). if TZEN=1, these backup registers can be read and written only with secure access. If TZEN=0: the protection zone 1 can be read and written with non-secure access. If BKPRWSEC = 0: there is no protection zone 1. If BKPRWPRIV is set, BKPRWSEC[7:0] can be written only in privileged mode.
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uint32_t reserve0 : 7; // 8 Reserve
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uint32_t cnt1sec : 1; // 15 Monotonic counter 1 secure protection
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uint32_t bkpwsec : 8; // 16 Backup registers write protection offset Protection zone 2 is defined for backup registers from TAMP_BKPyR (y = BKPRWSEC, from 0 to 128) to TAMP_BKPzR (z = BKPWSEC-1, from 0 to 128, BKPWSEC ¥ BKPRWSEC): if TZEN=1, these backup registers can be written only with secure access. They can be read with secure or non-secure access. Protection zone 3 defined for backup registers from TAMP_BKPtR (t = BKPWSEC, from 0 to 127). They can be read or written with secure or non-secure access. If TZEN=0: the protection zone 2 can be read and written with non-secure access. If BKPWSEC = 0 or if BKPWSEC ¤ BKPRWSEC: there is no protection zone 2. If BKPWPRIV is set, BKPRWSEC[7:0] can be written only in privileged mode.
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uint32_t reserve1 : 6; // 24 Reserve
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uint32_t bhklock : 1; // 30 Boot hardware key lock This bit can be read and can only be written to 1 by software. It is cleared by hardware together with the backup registers following a tamper detection event or when the readout protection (RDP) is disabled.
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uint32_t tampsec : 1; // 31 Tamper protection (excluding monotonic counters and backup registers) Note: Refer to for details on the read protection.
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} reg_sec_tamp_tamp_seccfgr_t;
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typedef struct {
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uint32_t reserve0 : 15; // 0 Reserve
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uint32_t cnt1priv : 1; // 15 Monotonic counter 1 privilege protection
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uint32_t reserve1 : 13; // 16 Reserve
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uint32_t bkprwpriv : 1; // 29 Backup registers zone 1 privilege protection
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uint32_t bkpwpriv : 1; // 30 Backup registers zone 2 privilege protection
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uint32_t tamppriv : 1; // 31 Tamper privilege protection (excluding backup registers) Note: Refer to for details on the read protection.
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} reg_sec_tamp_tamp_privcr_t;
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typedef struct {
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uint32_t tamp1ie : 1; // 0 Tamper 1 interrupt enable
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uint32_t tamp2ie : 1; // 1 Tamper 2 interrupt enable
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uint32_t tamp3ie : 1; // 2 Tamper 3 interrupt enable
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uint32_t tamp4ie : 1; // 3 Tamper 4 interrupt enable
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uint32_t tamp5ie : 1; // 4 Tamper 5 interrupt enable
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uint32_t tamp6ie : 1; // 5 Tamper 6 interrupt enable
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uint32_t tamp7ie : 1; // 6 Tamper 7interrupt enable
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uint32_t tamp8ie : 1; // 7 Tamper 8 interrupt enable
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uint32_t reserve0 : 8; // 8 Reserve
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uint32_t itamp1ie : 1; // 16 Internal tamper 1 interrupt enable
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uint32_t itamp2ie : 1; // 17 Internal tamper 2 interrupt enable
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uint32_t itamp3ie : 1; // 18 Internal tamper 3 interrupt enable
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uint32_t reserve1 : 1; // 19 Reserve
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uint32_t itamp5ie : 1; // 20 Internal tamper 5 interrupt enable
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uint32_t itamp6ie : 1; // 21 Internal tamper 6 interrupt enable
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uint32_t itamp7ie : 1; // 22 Internal tamper 7 interrupt enable
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uint32_t itamp8ie : 1; // 23 Internal tamper 8 interrupt enable
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uint32_t itamp9ie : 1; // 24 Internal tamper 9 interrupt enable
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uint32_t reserve2 : 1; // 25 Reserve
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uint32_t itamp11ie : 1; // 26 Internal tamper 11 interrupt enable
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uint32_t itamp12ie : 1; // 27 Internal tamper 12 interrupt enable
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uint32_t itamp13ie : 1; // 28 Internal tamper 13 interrupt enable
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uint32_t reserve3 : 3; // 29 Reserve
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} reg_sec_tamp_tamp_ier_t;
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typedef struct {
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uint32_t tamp1f : 1; // 0 TAMP1 detection flag This flag is set by hardware when a tamper detection event is detected on the TAMP1 input.
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uint32_t tamp2f : 1; // 1 TAMP2 detection flag This flag is set by hardware when a tamper detection event is detected on the TAMP2 input.
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uint32_t tamp3f : 1; // 2 TAMP3 detection flag This flag is set by hardware when a tamper detection event is detected on the TAMP3 input.
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uint32_t tamp4f : 1; // 3 TAMP4 detection flag This flag is set by hardware when a tamper detection event is detected on the TAMP4 input.
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uint32_t tamp5f : 1; // 4 TAMP5 detection flag This flag is set by hardware when a tamper detection event is detected on the TAMP5 input.
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uint32_t tamp6f : 1; // 5 TAMP6 detection flag This flag is set by hardware when a tamper detection event is detected on the TAMP6 input.
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uint32_t tamp7f : 1; // 6 TAMP7 detection flag This flag is set by hardware when a tamper detection event is detected on the TAMP7 input.
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uint32_t tamp8f : 1; // 7 TAMP8 detection flag This flag is set by hardware when a tamper detection event is detected on the TAMP8 input
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uint32_t reserve0 : 8; // 8 Reserve
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uint32_t itamp1f : 1; // 16 Internal tamper 1 flag This flag is set by hardware when a tamper detection event is detected on the internal tamper 1.
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uint32_t itamp2f : 1; // 17 Internal tamper 2 flag This flag is set by hardware when a tamper detection event is detected on the internal tamper 2.
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uint32_t itamp3f : 1; // 18 Internal tamper 3 flag This flag is set by hardware when a tamper detection event is detected on the internal tamper 3.
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uint32_t reserve1 : 1; // 19 Reserve
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uint32_t itamp5f : 1; // 20 Internal tamper 5 flag This flag is set by hardware when a tamper detection event is detected on the internal tamper 5.
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uint32_t itamp6f : 1; // 21 Internal tamper 6 flag This flag is set by hardware when a tamper detection event is detected on the internal tamper 6.
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uint32_t itamp7f : 1; // 22 Internal tamper 7 flag This flag is set by hardware when a tamper detection event is detected on the internal tamper 7.
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uint32_t itamp8f : 1; // 23 Internal tamper 8 flag This flag is set by hardware when a tamper detection event is detected on the internal tamper 8.
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uint32_t itamp9f : 1; // 24 Internal tamper 9 flag This flag is set by hardware when a tamper detection event is detected on the internal tamper 9.
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uint32_t reserve2 : 1; // 25 Reserve
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uint32_t itamp11f : 1; // 26 Internal tamper 11 flag This flag is set by hardware when a tamper detection event is detected on the internal tamper 11.
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uint32_t itamp12f : 1; // 27 Internal tamper 12 flag This flag is set by hardware when a tamper detection event is detected on the internal tamper 12.
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uint32_t itamp13f : 1; // 28 Internal tamper 13 flag This flag is set by hardware when a tamper detection event is detected on the internal tamper 13.
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uint32_t reserve3 : 3; // 29 Reserve
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} reg_sec_tamp_tamp_sr_t;
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typedef struct {
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uint32_t tamp1mf : 1; // 0 TAMP1 non-secure interrupt masked flag This flag is set by hardware when the tamper 1 non-secure interrupt is raised.
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uint32_t tamp2mf : 1; // 1 TAMP2 non-secure interrupt masked flag This flag is set by hardware when the tamper 2 non-secure interrupt is raised.
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uint32_t tamp3mf : 1; // 2 TAMP3 non-secure interrupt masked flag This flag is set by hardware when the tamper 3 non-secure interrupt is raised.
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uint32_t tamp4mf : 1; // 3 TAMP4 non-secure interrupt masked flag This flag is set by hardware when the tamper 4 non-secure interrupt is raised.
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uint32_t tamp5mf : 1; // 4 TAMP5 non-secure interrupt masked flag This flag is set by hardware when the tamper 5 non-secure interrupt is raised.
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uint32_t tamp6mf : 1; // 5 TAMP6 non-secure interrupt masked flag This flag is set by hardware when the tamper 6 non-secure interrupt is raised.
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uint32_t tamp7mf : 1; // 6 TAMP7 non-secure interrupt masked flag This flag is set by hardware when the tamper 7 non-secure interrupt is raised.
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uint32_t tamp8mf : 1; // 7 TAMP8 non-secure interrupt masked flag This flag is set by hardware when the tamper 8 non-secure interrupt is raised.
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uint32_t reserve0 : 8; // 8 Reserve
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uint32_t itamp1mf : 1; // 16 Internal tamper 1 non-secure interrupt masked flag This flag is set by hardware when the internal tamper 1 non-secure interrupt is raised.
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uint32_t itamp2mf : 1; // 17 Internal tamper 2 non-secure interrupt masked flag This flag is set by hardware when the internal tamper 2 non-secure interrupt is raised.
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uint32_t itamp3mf : 1; // 18 Internal tamper 3 non-secure interrupt masked flag This flag is set by hardware when the internal tamper 3 non-secure interrupt is raised.
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uint32_t reserve1 : 1; // 19 Reserve
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uint32_t itamp5mf : 1; // 20 Internal tamper 5 non-secure interrupt masked flag This flag is set by hardware when the internal tamper 5 non-secure interrupt is raised.
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uint32_t itamp6mf : 1; // 21 Internal tamper 6 non-secure interrupt masked flag This flag is set by hardware when the internal tamper 6 non-secure interrupt is raised.
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uint32_t itamp7mf : 1; // 22 VCORE monitoring tamper non-secure interrupt masked flag This flag is set by hardware when the internal tamper 7 non-secure interrupt is raised.
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uint32_t itamp8mf : 1; // 23 Internal tamper 8 non-secure interrupt masked flag This flag is set by hardware when the internal tamper 8 non-secure interrupt is raised.
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uint32_t itamp9mf : 1; // 24 internal tamper 9 non-secure interrupt masked flag This flag is set by hardware when the internal tamper 9 non-secure interrupt is raised.
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uint32_t reserve2 : 1; // 25 Reserve
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uint32_t itamp11mf : 1; // 26 internal tamper 11 non-secure interrupt masked flag This flag is set by hardware when the internal tamper 11 non-secure interrupt is raised.
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uint32_t itamp12mf : 1; // 27 internal tamper 12 non-secure interrupt masked flag This flag is set by hardware when the internal tamper 12 non-secure interrupt is raised.
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uint32_t itamp13mf : 1; // 28 internal tamper 13 non-secure interrupt masked flag This flag is set by hardware when the internal tamper 13 non-secure interrupt is raised.
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uint32_t reserve3 : 3; // 29 Reserve
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} reg_sec_tamp_tamp_misr_t;
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typedef struct {
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uint32_t tamp1mf : 1; // 0 TAMP1 secure interrupt masked flag This flag is set by hardware when the tamper 1 secure interrupt is raised.
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uint32_t tamp2mf : 1; // 1 TAMP2 secure interrupt masked flag This flag is set by hardware when the tamper 2 secure interrupt is raised.
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uint32_t tamp3mf : 1; // 2 TAMP3 secure interrupt masked flag This flag is set by hardware when the tamper 3 secure interrupt is raised.
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uint32_t tamp4mf : 1; // 3 TAMP4 secure interrupt masked flag This flag is set by hardware when the tamper 4 secure interrupt is raised.
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uint32_t tamp5mf : 1; // 4 TAMP5 secure interrupt masked flag This flag is set by hardware when the tamper 5 secure interrupt is raised.
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uint32_t tamp6mf : 1; // 5 TAMP6 secure interrupt masked flag This flag is set by hardware when the tamper 6 secure interrupt is raised.
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uint32_t tamp7mf : 1; // 6 TAMP7 secure interrupt masked flag This flag is set by hardware when the tamper 7 secure interrupt is raised.
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uint32_t tamp8mf : 1; // 7 TAMP8 secure interrupt masked flag This flag is set by hardware when the tamper 8 secure interrupt is raised.
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uint32_t reserve0 : 8; // 8 Reserve
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uint32_t itamp1mf : 1; // 16 Internal tamper 1 secure interrupt masked flag This flag is set by hardware when the internal tamper 1 secure interrupt is raised.
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uint32_t itamp2mf : 1; // 17 Internal tamper 2 secure interrupt masked flag This flag is set by hardware when the internal tamper 2 secure interrupt is raised.
|
||
uint32_t itamp3mf : 1; // 18 Internal tamper 3 secure interrupt masked flag This flag is set by hardware when the internal tamper 3 secure interrupt is raised.
|
||
uint32_t reserve1 : 1; // 19 Reserve
|
||
uint32_t itamp5mf : 1; // 20 Internal tamper 5 secure interrupt masked flag This flag is set by hardware when the internal tamper 5 secure interrupt is raised.
|
||
uint32_t itamp6mf : 1; // 21 Internal tamper 6 secure interrupt masked flag This flag is set by hardware when the internal tamper 6 secure interrupt is raised.
|
||
uint32_t itamp7mf : 1; // 22 VCORE monitoring tamper secure interrupt masked flag This flag is set by hardware when the internal tamper 7 secure interrupt is raised.
|
||
uint32_t itamp8mf : 1; // 23 Internal tamper 8 secure interrupt masked flag This flag is set by hardware when the internal tamper 8 secure interrupt is raised.
|
||
uint32_t itamp9mf : 1; // 24 internal tamper 9 secure interrupt masked flag This flag is set by hardware when the internal tamper 9 secure interrupt is raised.
|
||
uint32_t reserve2 : 1; // 25 Reserve
|
||
uint32_t itamp11mf : 1; // 26 internal tamper 11 secure interrupt masked flag This flag is set by hardware when the internal tamper 11 secure interrupt is raised.
|
||
uint32_t itamp12mf : 1; // 27 internal tamper 12 secure interrupt masked flag This flag is set by hardware when the internal tamper 12 secure interrupt is raised.
|
||
uint32_t itamp13mf : 1; // 28 internal tamper 13 secure interrupt masked flag This flag is set by hardware when the internal tamper 13 secure interrupt is raised.
|
||
uint32_t reserve3 : 3; // 29 Reserve
|
||
} reg_sec_tamp_tamp_smisr_t;
|
||
|
||
typedef struct {
|
||
uint32_t ctamp1f : 1; // 0 Clear TAMP1 detection flag Writing 1 in this bit clears the TAMP1F bit in the TAMP_SR register.
|
||
uint32_t ctamp2f : 1; // 1 Clear TAMP2 detection flag Writing 1 in this bit clears the TAMP2F bit in the TAMP_SR register.
|
||
uint32_t ctamp3f : 1; // 2 Clear TAMP3 detection flag Writing 1 in this bit clears the TAMP3F bit in the TAMP_SR register.
|
||
uint32_t ctamp4f : 1; // 3 Clear TAMP4 detection flag Writing 1 in this bit clears the TAMP4F bit in the TAMP_SR register.
|
||
uint32_t ctamp5f : 1; // 4 Clear TAMP5 detection flag Writing 1 in this bit clears the TAMP5F bit in the TAMP_SR register.
|
||
uint32_t ctamp6f : 1; // 5 Clear TAMP6 detection flag Writing 1 in this bit clears the TAMP6F bit in the TAMP_SR register.
|
||
uint32_t ctamp7f : 1; // 6 Clear TAMP7 detection flag Writing 1 in this bit clears the TAMP7F bit in the TAMP_SR register.
|
||
uint32_t ctamp8f : 1; // 7 Clear TAMP8 detection flag Writing 1 in this bit clears the TAMP8F bit in the TAMP_SR register.
|
||
uint32_t reserve0 : 8; // 8 Reserve
|
||
uint32_t citamp1f : 1; // 16 Clear ITAMP1 detection flag Writing 1 in this bit clears the ITAMP1F bit in the TAMP_SR register.
|
||
uint32_t citamp2f : 1; // 17 Clear ITAMP2 detection flag Writing 1 in this bit clears the ITAMP2F bit in the TAMP_SR register.
|
||
uint32_t citamp3f : 1; // 18 Clear ITAMP3 detection flag Writing 1 in this bit clears the ITAMP3F bit in the TAMP_SR register.
|
||
uint32_t reserve1 : 1; // 19 Reserve
|
||
uint32_t citamp5f : 1; // 20 Clear ITAMP5 detection flag Writing 1 in this bit clears the ITAMP5F bit in the TAMP_SR register.
|
||
uint32_t citamp6f : 1; // 21 Clear ITAMP6 detection flag Writing 1 in this bit clears the ITAMP6F bit in the TAMP_SR register.
|
||
uint32_t citamp7f : 1; // 22 Clear ITAMP7 detection flag Writing 1 in this bit clears the ITAMP7F bit in the TAMP_SR register.
|
||
uint32_t citamp8f : 1; // 23 Clear ITAMP8 detection flag Writing 1 in this bit clears the ITAMP8F bit in the TAMP_SR register.
|
||
uint32_t citamp9f : 1; // 24 Clear ITAMP9 detection flag Writing 1 in this bit clears the ITAMP9F bit in the TAMP_SR register.
|
||
uint32_t reserve2 : 1; // 25 Reserve
|
||
uint32_t citamp11f : 1; // 26 Clear ITAMP11 detection flag Writing 1 in this bit clears the ITAMP11F bit in the TAMP_SR register.
|
||
uint32_t citamp12f : 1; // 27 Clear ITAMP12 detection flag Writing 1 in this bit clears the ITAMP12F bit in the TAMP_SR register.
|
||
uint32_t citamp13f : 1; // 28 Clear ITAMP13 detection flag Writing 1 in this bit clears the ITAMP13F bit in the TAMP_SR register.
|
||
uint32_t reserve3 : 3; // 29 Reserve
|
||
} reg_sec_tamp_tamp_scr_t;
|
||
|
||
typedef struct {
|
||
uint32_t count : 32; // 0 This register is read-only only and is incremented by one when a write access is done to this register. This register cannot roll-over and is frozen when reaching the maximum value.
|
||
} reg_sec_tamp_tamp_count1r_t;
|
||
|
||
typedef struct {
|
||
uint32_t ercfg0 : 1; // 0 Configurable device secrets configuration
|
||
uint32_t reserve0 : 31; // 1 Reserve
|
||
} reg_sec_tamp_tamp_ercfgr_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp0r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp1r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp2r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp3r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp4r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp5r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp6r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp7r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp8r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp9r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp10r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp11r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp12r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp13r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp14r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp15r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp16r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp17r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp18r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp19r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp20r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp21r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp22r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp23r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp24r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp25r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp26r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp27r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp28r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp29r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp30r_t;
|
||
|
||
typedef struct {
|
||
uint32_t bkp : 32; // 0 The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.
|
||
} reg_sec_tamp_tamp_bkp31r_t;
|
||
|
||
typedef struct {
|
||
volatile reg_sec_tamp_tamp_cr1_t tamp_cr1;
|
||
volatile reg_sec_tamp_tamp_cr2_t tamp_cr2;
|
||
volatile reg_sec_tamp_tamp_cr3_t tamp_cr3;
|
||
volatile reg_sec_tamp_tamp_fltcr_t tamp_fltcr;
|
||
volatile reg_sec_tamp_tamp_atcr1_t tamp_atcr1;
|
||
volatile reg_sec_tamp_tamp_atseedr_t tamp_atseedr;
|
||
volatile reg_sec_tamp_tamp_ator_t tamp_ator;
|
||
volatile reg_sec_tamp_tamp_atcr2_t tamp_atcr2;
|
||
volatile reg_sec_tamp_tamp_seccfgr_t tamp_seccfgr;
|
||
volatile reg_sec_tamp_tamp_privcr_t tamp_privcr;
|
||
volatile uint32_t reserve0[1];
|
||
volatile reg_sec_tamp_tamp_ier_t tamp_ier;
|
||
volatile reg_sec_tamp_tamp_sr_t tamp_sr;
|
||
volatile reg_sec_tamp_tamp_misr_t tamp_misr;
|
||
volatile reg_sec_tamp_tamp_smisr_t tamp_smisr;
|
||
volatile reg_sec_tamp_tamp_scr_t tamp_scr;
|
||
volatile reg_sec_tamp_tamp_count1r_t tamp_count1r;
|
||
volatile uint32_t reserve1[4];
|
||
volatile reg_sec_tamp_tamp_ercfgr_t tamp_ercfgr;
|
||
volatile uint32_t reserve2[42];
|
||
volatile reg_sec_tamp_tamp_bkp0r_t tamp_bkp0r;
|
||
volatile reg_sec_tamp_tamp_bkp1r_t tamp_bkp1r;
|
||
volatile reg_sec_tamp_tamp_bkp2r_t tamp_bkp2r;
|
||
volatile reg_sec_tamp_tamp_bkp3r_t tamp_bkp3r;
|
||
volatile reg_sec_tamp_tamp_bkp4r_t tamp_bkp4r;
|
||
volatile reg_sec_tamp_tamp_bkp5r_t tamp_bkp5r;
|
||
volatile reg_sec_tamp_tamp_bkp6r_t tamp_bkp6r;
|
||
volatile reg_sec_tamp_tamp_bkp7r_t tamp_bkp7r;
|
||
volatile reg_sec_tamp_tamp_bkp8r_t tamp_bkp8r;
|
||
volatile reg_sec_tamp_tamp_bkp9r_t tamp_bkp9r;
|
||
volatile reg_sec_tamp_tamp_bkp10r_t tamp_bkp10r;
|
||
volatile reg_sec_tamp_tamp_bkp11r_t tamp_bkp11r;
|
||
volatile reg_sec_tamp_tamp_bkp12r_t tamp_bkp12r;
|
||
volatile reg_sec_tamp_tamp_bkp13r_t tamp_bkp13r;
|
||
volatile reg_sec_tamp_tamp_bkp14r_t tamp_bkp14r;
|
||
volatile reg_sec_tamp_tamp_bkp15r_t tamp_bkp15r;
|
||
volatile reg_sec_tamp_tamp_bkp16r_t tamp_bkp16r;
|
||
volatile reg_sec_tamp_tamp_bkp17r_t tamp_bkp17r;
|
||
volatile reg_sec_tamp_tamp_bkp18r_t tamp_bkp18r;
|
||
volatile reg_sec_tamp_tamp_bkp19r_t tamp_bkp19r;
|
||
volatile reg_sec_tamp_tamp_bkp20r_t tamp_bkp20r;
|
||
volatile reg_sec_tamp_tamp_bkp21r_t tamp_bkp21r;
|
||
volatile reg_sec_tamp_tamp_bkp22r_t tamp_bkp22r;
|
||
volatile reg_sec_tamp_tamp_bkp23r_t tamp_bkp23r;
|
||
volatile reg_sec_tamp_tamp_bkp24r_t tamp_bkp24r;
|
||
volatile reg_sec_tamp_tamp_bkp25r_t tamp_bkp25r;
|
||
volatile reg_sec_tamp_tamp_bkp26r_t tamp_bkp26r;
|
||
volatile reg_sec_tamp_tamp_bkp27r_t tamp_bkp27r;
|
||
volatile reg_sec_tamp_tamp_bkp28r_t tamp_bkp28r;
|
||
volatile reg_sec_tamp_tamp_bkp29r_t tamp_bkp29r;
|
||
volatile reg_sec_tamp_tamp_bkp30r_t tamp_bkp30r;
|
||
volatile reg_sec_tamp_tamp_bkp31r_t tamp_bkp31r;
|
||
} reg_sec_tamp_t;
|
||
|