111 lines
3.8 KiB
C
Executable File
111 lines
3.8 KiB
C
Executable File
#include <stdint.h>
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typedef struct {
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uint32_t en : 1; // 0 EN
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uint32_t cacheinv : 1; // 1 CACHEINV
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uint32_t waysel : 1; // 2 WAYSEL
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uint32_t reserve0 : 13; // 3 Reserve
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uint32_t hitmen : 1; // 16 HITMEN
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uint32_t missmen : 1; // 17 MISSMEN
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uint32_t hitmrst : 1; // 18 HITMRST
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uint32_t missmrst : 1; // 19 MISSMRST
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uint32_t reserve1 : 12; // 20 Reserve
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} reg_icache_icache_cr_t;
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typedef struct {
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uint32_t busyf : 1; // 0 BUSYF
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uint32_t bsyendf : 1; // 1 BSYENDF
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uint32_t errf : 1; // 2 ERRF
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uint32_t reserve0 : 29; // 3 Reserve
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} reg_icache_icache_sr_t;
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typedef struct {
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uint32_t reserve0 : 1; // 0 Reserve
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uint32_t bsyendie : 1; // 1 BSYENDIE
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uint32_t errie : 1; // 2 ERRIE
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uint32_t reserve1 : 29; // 3 Reserve
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} reg_icache_icache_ier_t;
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typedef struct {
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uint32_t reserve0 : 1; // 0 Reserve
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uint32_t cbsyendf : 1; // 1 CBSYENDF
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uint32_t cerrf : 1; // 2 CERRF
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uint32_t reserve1 : 29; // 3 Reserve
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} reg_icache_icache_fcr_t;
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typedef struct {
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uint32_t hitmon : 32; // 0 HITMON
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} reg_icache_icache_hmonr_t;
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typedef struct {
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uint32_t missmon : 16; // 0 MISSMON
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uint32_t reserve0 : 16; // 16 Reserve
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} reg_icache_icache_mmonr_t;
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typedef struct {
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uint32_t baseaddr : 8; // 0 BASEADDR
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uint32_t reserve0 : 1; // 8 Reserve
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uint32_t rsize : 3; // 9 RSIZE
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uint32_t reserve1 : 3; // 12 Reserve
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uint32_t ren : 1; // 15 REN
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uint32_t remapaddr : 11; // 16 REMAPADDR
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uint32_t reserve2 : 1; // 27 Reserve
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uint32_t mstsel : 1; // 28 MSTSEL
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uint32_t reserve3 : 2; // 29 Reserve
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uint32_t hburst : 1; // 31 HBURST
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} reg_icache_icache_crr0_t;
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typedef struct {
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uint32_t baseaddr : 8; // 0 BASEADDR
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uint32_t reserve0 : 1; // 8 Reserve
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uint32_t rsize : 3; // 9 RSIZE
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uint32_t reserve1 : 3; // 12 Reserve
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uint32_t ren : 1; // 15 REN
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uint32_t remapaddr : 11; // 16 REMAPADDR
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uint32_t reserve2 : 1; // 27 Reserve
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uint32_t mstsel : 1; // 28 MSTSEL
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uint32_t reserve3 : 2; // 29 Reserve
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uint32_t hburst : 1; // 31 HBURST
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} reg_icache_icache_crr1_t;
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typedef struct {
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uint32_t baseaddr : 8; // 0 BASEADDR
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uint32_t reserve0 : 1; // 8 Reserve
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uint32_t rsize : 3; // 9 RSIZE
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uint32_t reserve1 : 3; // 12 Reserve
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uint32_t ren : 1; // 15 REN
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uint32_t remapaddr : 11; // 16 REMAPADDR
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uint32_t reserve2 : 1; // 27 Reserve
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uint32_t mstsel : 1; // 28 MSTSEL
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uint32_t reserve3 : 2; // 29 Reserve
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uint32_t hburst : 1; // 31 HBURST
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} reg_icache_icache_crr2_t;
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typedef struct {
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uint32_t baseaddr : 8; // 0 BASEADDR
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uint32_t reserve0 : 1; // 8 Reserve
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uint32_t rsize : 3; // 9 RSIZE
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uint32_t reserve1 : 3; // 12 Reserve
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uint32_t ren : 1; // 15 REN
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uint32_t remapaddr : 11; // 16 REMAPADDR
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uint32_t reserve2 : 1; // 27 Reserve
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uint32_t mstsel : 1; // 28 MSTSEL
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uint32_t reserve3 : 2; // 29 Reserve
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uint32_t hburst : 1; // 31 HBURST
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} reg_icache_icache_crr3_t;
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typedef struct {
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volatile reg_icache_icache_cr_t icache_cr;
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volatile reg_icache_icache_sr_t icache_sr;
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volatile reg_icache_icache_ier_t icache_ier;
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volatile reg_icache_icache_fcr_t icache_fcr;
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volatile reg_icache_icache_hmonr_t icache_hmonr;
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volatile reg_icache_icache_mmonr_t icache_mmonr;
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volatile uint32_t reserve0[2];
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volatile reg_icache_icache_crr0_t icache_crr0;
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volatile reg_icache_icache_crr1_t icache_crr1;
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volatile reg_icache_icache_crr2_t icache_crr2;
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volatile reg_icache_icache_crr3_t icache_crr3;
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} reg_icache_t;
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