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stm32u5_cargo/stm32u5/includes/u575xx/reg_sec_rtc_gen.h
2023-11-14 16:25:09 -05:00

295 lines
12 KiB
C
Executable File

#include <stdint.h>
typedef struct {
uint32_t su : 4; // 0 Second units in BCD format
uint32_t st : 3; // 4 Second tens in BCD format
uint32_t reserve0 : 1; // 7 Reserve
uint32_t mnu : 4; // 8 Minute units in BCD format
uint32_t mnt : 3; // 12 Minute tens in BCD format
uint32_t reserve1 : 1; // 15 Reserve
uint32_t hu : 4; // 16 Hour units in BCD format
uint32_t ht : 2; // 20 Hour tens in BCD format
uint32_t pm : 1; // 22 AM/PM notation
uint32_t reserve2 : 9; // 23 Reserve
} reg_sec_rtc_tr_t;
typedef struct {
uint32_t du : 4; // 0 Date units in BCD format
uint32_t dt : 2; // 4 Date tens in BCD format
uint32_t reserve0 : 2; // 6 Reserve
uint32_t mu : 4; // 8 Month units in BCD format
uint32_t mt : 1; // 12 Month tens in BCD format
uint32_t wdu : 3; // 13 Week day units
uint32_t yu : 4; // 16 Year units in BCD format
uint32_t yt : 4; // 20 Year tens in BCD format
uint32_t reserve1 : 8; // 24 Reserve
} reg_sec_rtc_dr_t;
typedef struct {
uint32_t ss : 32; // 0 SS
} reg_sec_rtc_ssr_t;
typedef struct {
uint32_t reserve0 : 2; // 0 Reserve
uint32_t wutwf : 1; // 2 Wakeup timer write flag
uint32_t shpf : 1; // 3 Shift operation pending
uint32_t inits : 1; // 4 Initialization status flag
uint32_t rsf : 1; // 5 Registers synchronization flag
uint32_t initf : 1; // 6 Initialization flag
uint32_t init : 1; // 7 Initialization mode
uint32_t bin : 2; // 8 BIN
uint32_t bcdu : 3; // 10 BCDU
uint32_t reserve1 : 3; // 13 Reserve
uint32_t recalpf : 1; // 16 Recalibration pending Flag
uint32_t reserve2 : 15; // 17 Reserve
} reg_sec_rtc_icsr_t;
typedef struct {
uint32_t prediv_s : 15; // 0 Synchronous prescaler factor
uint32_t reserve0 : 1; // 15 Reserve
uint32_t prediv_a : 7; // 16 Asynchronous prescaler factor
uint32_t reserve1 : 9; // 23 Reserve
} reg_sec_rtc_prer_t;
typedef struct {
uint32_t wut : 16; // 0 Wakeup auto-reload value bits
uint32_t wutoclr : 16; // 16 WUTOCLR
} reg_sec_rtc_wutr_t;
typedef struct {
uint32_t wucksel : 3; // 0 WUCKSEL
uint32_t tsedge : 1; // 3 TSEDGE
uint32_t refckon : 1; // 4 REFCKON
uint32_t bypshad : 1; // 5 BYPSHAD
uint32_t fmt : 1; // 6 FMT
uint32_t ssruie : 1; // 7 SSRUIE
uint32_t alrae : 1; // 8 ALRAE
uint32_t alrbe : 1; // 9 ALRBE
uint32_t wute : 1; // 10 WUTE
uint32_t tse : 1; // 11 TSE
uint32_t alraie : 1; // 12 ALRAIE
uint32_t alrbie : 1; // 13 ALRBIE
uint32_t wutie : 1; // 14 WUTIE
uint32_t tsie : 1; // 15 TSIE
uint32_t add1h : 1; // 16 ADD1H
uint32_t sub1h : 1; // 17 SUB1H
uint32_t bkp : 1; // 18 BKP
uint32_t cosel : 1; // 19 COSEL
uint32_t pol : 1; // 20 POL
uint32_t osel : 2; // 21 OSEL
uint32_t coe : 1; // 23 COE
uint32_t itse : 1; // 24 ITSE
uint32_t tampts : 1; // 25 TAMPTS
uint32_t tampoe : 1; // 26 TAMPOE
uint32_t alrafclr : 1; // 27 ALRAFCLR
uint32_t alrbfclr : 1; // 28 ALRBFCLR
uint32_t tampalrm_pu: 1; // 29 TAMPALRM_PU
uint32_t tampalrm_type: 1; // 30 TAMPALRM_TYPE
uint32_t out2en : 1; // 31 OUT2EN
} reg_sec_rtc_cr_t;
typedef struct {
uint32_t alrapriv : 1; // 0 ALRAPRIV
uint32_t alrbpriv : 1; // 1 ALRBPRIV
uint32_t wutpriv : 1; // 2 WUTPRIV
uint32_t tspriv : 1; // 3 TSPRIV
uint32_t reserve0 : 9; // 4 Reserve
uint32_t calpriv : 1; // 13 CALPRIV
uint32_t initpriv : 1; // 14 INITPRIV
uint32_t priv : 1; // 15 PRIV
uint32_t reserve1 : 16; // 16 Reserve
} reg_sec_rtc_privcr_t;
typedef struct {
uint32_t alrasec : 1; // 0 ALRASEC
uint32_t alrbsec : 1; // 1 ALRBSEC
uint32_t wutsec : 1; // 2 WUTSEC
uint32_t tssec : 1; // 3 TSSEC
uint32_t reserve0 : 9; // 4 Reserve
uint32_t calsec : 1; // 13 CALSEC
uint32_t initsec : 1; // 14 INITSEC
uint32_t sec : 1; // 15 SEC
uint32_t reserve1 : 16; // 16 Reserve
} reg_sec_rtc_seccfgr_t;
typedef struct {
uint32_t key : 8; // 0 Write protection key
uint32_t reserve0 : 24; // 8 Reserve
} reg_sec_rtc_wpr_t;
typedef struct {
uint32_t calm : 9; // 0 Calibration minus
uint32_t reserve0 : 3; // 9 Reserve
uint32_t lpcal : 1; // 12 LPCAL
uint32_t calw16 : 1; // 13 Use a 16-second calibration cycle period
uint32_t calw8 : 1; // 14 Use an 8-second calibration cycle period
uint32_t calp : 1; // 15 Increase frequency of RTC by 488.5 ppm
uint32_t reserve1 : 16; // 16 Reserve
} reg_sec_rtc_calr_t;
typedef struct {
uint32_t subfs : 15; // 0 Subtract a fraction of a second
uint32_t reserve0 : 16; // 15 Reserve
uint32_t add1s : 1; // 31 Add one second
} reg_sec_rtc_shiftr_t;
typedef struct {
uint32_t su : 4; // 0 Second units in BCD format
uint32_t st : 3; // 4 Second tens in BCD format
uint32_t reserve0 : 1; // 7 Reserve
uint32_t mnu : 4; // 8 Minute units in BCD format
uint32_t mnt : 3; // 12 Minute tens in BCD format
uint32_t reserve1 : 1; // 15 Reserve
uint32_t hu : 4; // 16 Hour units in BCD format
uint32_t ht : 2; // 20 Hour tens in BCD format
uint32_t pm : 1; // 22 AM/PM notation
uint32_t reserve2 : 9; // 23 Reserve
} reg_sec_rtc_tstr_t;
typedef struct {
uint32_t du : 4; // 0 Date units in BCD format
uint32_t dt : 2; // 4 Date tens in BCD format
uint32_t reserve0 : 2; // 6 Reserve
uint32_t mu : 4; // 8 Month units in BCD format
uint32_t mt : 1; // 12 Month tens in BCD format
uint32_t wdu : 3; // 13 Week day units
uint32_t reserve1 : 16; // 16 Reserve
} reg_sec_rtc_tsdr_t;
typedef struct {
uint32_t ss : 32; // 0 Sub second value
} reg_sec_rtc_tsssr_t;
typedef struct {
uint32_t su : 4; // 0 Second units in BCD format
uint32_t st : 3; // 4 Second tens in BCD format
uint32_t msk1 : 1; // 7 Alarm A seconds mask
uint32_t mnu : 4; // 8 Minute units in BCD format
uint32_t mnt : 3; // 12 Minute tens in BCD format
uint32_t msk2 : 1; // 15 Alarm A minutes mask
uint32_t hu : 4; // 16 Hour units in BCD format
uint32_t ht : 2; // 20 Hour tens in BCD format
uint32_t pm : 1; // 22 AM/PM notation
uint32_t msk3 : 1; // 23 Alarm A hours mask
uint32_t du : 4; // 24 Date units or day in BCD format
uint32_t dt : 2; // 28 Date tens in BCD format
uint32_t wdsel : 1; // 30 Week day selection
uint32_t msk4 : 1; // 31 Alarm A date mask
} reg_sec_rtc_alrmar_t;
typedef struct {
uint32_t ss : 15; // 0 Sub seconds value
uint32_t reserve0 : 9; // 15 Reserve
uint32_t maskss : 6; // 24 Mask the most-significant bits starting at this bit
uint32_t reserve1 : 1; // 30 Reserve
uint32_t ssclr : 1; // 31 SSCLR
} reg_sec_rtc_alrmassr_t;
typedef struct {
uint32_t su : 4; // 0 Second units in BCD format
uint32_t st : 3; // 4 Second tens in BCD format
uint32_t msk1 : 1; // 7 Alarm B seconds mask
uint32_t mnu : 4; // 8 Minute units in BCD format
uint32_t mnt : 3; // 12 Minute tens in BCD format
uint32_t msk2 : 1; // 15 Alarm B minutes mask
uint32_t hu : 4; // 16 Hour units in BCD format
uint32_t ht : 2; // 20 Hour tens in BCD format
uint32_t pm : 1; // 22 AM/PM notation
uint32_t msk3 : 1; // 23 Alarm B hours mask
uint32_t du : 4; // 24 Date units or day in BCD format
uint32_t dt : 2; // 28 Date tens in BCD format
uint32_t wdsel : 1; // 30 Week day selection
uint32_t msk4 : 1; // 31 Alarm B date mask
} reg_sec_rtc_alrmbr_t;
typedef struct {
uint32_t ss : 15; // 0 Sub seconds value
uint32_t reserve0 : 9; // 15 Reserve
uint32_t maskss : 6; // 24 Mask the most-significant bits starting at this bit
uint32_t reserve1 : 1; // 30 Reserve
uint32_t ssclr : 1; // 31 SSCLR
} reg_sec_rtc_alrmbssr_t;
typedef struct {
uint32_t alraf : 1; // 0 ALRAF
uint32_t alrbf : 1; // 1 ALRBF
uint32_t wutf : 1; // 2 WUTF
uint32_t tsf : 1; // 3 TSF
uint32_t tsovf : 1; // 4 TSOVF
uint32_t itsf : 1; // 5 ITSF
uint32_t ssruf : 1; // 6 SSRUF
uint32_t reserve0 : 25; // 7 Reserve
} reg_sec_rtc_sr_t;
typedef struct {
uint32_t alramf : 1; // 0 ALRAMF
uint32_t alrbmf : 1; // 1 ALRBMF
uint32_t wutmf : 1; // 2 WUTMF
uint32_t tsmf : 1; // 3 TSMF
uint32_t tsovmf : 1; // 4 TSOVMF
uint32_t itsmf : 1; // 5 ITSMF
uint32_t ssrumf : 1; // 6 SSRUMF
uint32_t reserve0 : 25; // 7 Reserve
} reg_sec_rtc_misr_t;
typedef struct {
uint32_t alramf : 1; // 0 ALRAMF
uint32_t alrbmf : 1; // 1 ALRBMF
uint32_t wutmf : 1; // 2 WUTMF
uint32_t tsmf : 1; // 3 TSMF
uint32_t tsovmf : 1; // 4 TSOVMF
uint32_t itsmf : 1; // 5 ITSMF
uint32_t ssrumf : 1; // 6 SSRUMF
uint32_t reserve0 : 25; // 7 Reserve
} reg_sec_rtc_smisr_t;
typedef struct {
uint32_t calraf : 1; // 0 CALRAF
uint32_t calrbf : 1; // 1 CALRBF
uint32_t cwutf : 1; // 2 CWUTF
uint32_t ctsf : 1; // 3 CTSF
uint32_t ctsovf : 1; // 4 CTSOVF
uint32_t citsf : 1; // 5 CITSF
uint32_t cssruf : 1; // 6 CSSRUF
uint32_t reserve0 : 25; // 7 Reserve
} reg_sec_rtc_scr_t;
typedef struct {
uint32_t ss : 32; // 0 Synchronous counter alarm value in Binary mode
} reg_sec_rtc_alrabinr_t;
typedef struct {
uint32_t ss : 32; // 0 Synchronous counter alarm value in Binary mode
} reg_sec_rtc_alrbbinr_t;
typedef struct {
volatile reg_sec_rtc_tr_t tr;
volatile reg_sec_rtc_dr_t dr;
volatile reg_sec_rtc_ssr_t ssr;
volatile reg_sec_rtc_icsr_t icsr;
volatile reg_sec_rtc_prer_t prer;
volatile reg_sec_rtc_wutr_t wutr;
volatile reg_sec_rtc_cr_t cr;
volatile reg_sec_rtc_privcr_t privcr;
volatile reg_sec_rtc_seccfgr_t seccfgr;
volatile reg_sec_rtc_wpr_t wpr;
volatile reg_sec_rtc_calr_t calr;
volatile reg_sec_rtc_shiftr_t shiftr;
volatile reg_sec_rtc_tstr_t tstr;
volatile reg_sec_rtc_tsdr_t tsdr;
volatile reg_sec_rtc_tsssr_t tsssr;
volatile uint32_t reserve0[1];
volatile reg_sec_rtc_alrmar_t alrmar;
volatile reg_sec_rtc_alrmassr_t alrmassr;
volatile reg_sec_rtc_alrmbr_t alrmbr;
volatile reg_sec_rtc_alrmbssr_t alrmbssr;
volatile reg_sec_rtc_sr_t sr;
volatile reg_sec_rtc_misr_t misr;
volatile reg_sec_rtc_smisr_t smisr;
volatile reg_sec_rtc_scr_t scr;
volatile uint32_t reserve1[4];
volatile reg_sec_rtc_alrabinr_t alrabinr;
volatile reg_sec_rtc_alrbbinr_t alrbbinr;
} reg_sec_rtc_t;