287 lines
9.0 KiB
C
Executable File
287 lines
9.0 KiB
C
Executable File
#include <stdint.h>
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typedef struct {
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uint32_t enc : 1; // 0 Encryption mode bit
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uint32_t reserve0 : 31; // 1 Reserve
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} reg_otfdec_cr_t;
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typedef struct {
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uint32_t priv : 1; // 0 Encryption mode bit
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uint32_t reserve0 : 31; // 1 Reserve
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} reg_otfdec_privcfgr_t;
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typedef struct {
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uint32_t reg_en : 1; // 0 region on-the-fly decryption enable
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uint32_t configlock: 1; // 1 region config lock
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uint32_t keylock : 1; // 2 region key lock
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uint32_t reserve0 : 1; // 3 Reserve
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uint32_t mode : 2; // 4 operating mode
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uint32_t reserve1 : 2; // 6 Reserve
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uint32_t keycrc : 8; // 8 region key 8-bit CRC
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uint32_t regx_version: 16; // 16 region firmware version
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} reg_otfdec_r1cfgr_t;
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typedef struct {
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uint32_t reg_en : 1; // 0 region on-the-fly decryption enable
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uint32_t configlock: 1; // 1 region config lock
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uint32_t keylock : 1; // 2 region key lock
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uint32_t reserve0 : 1; // 3 Reserve
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uint32_t mode : 2; // 4 operating mode
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uint32_t reserve1 : 2; // 6 Reserve
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uint32_t keycrc : 8; // 8 region key 8-bit CRC
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uint32_t regx_version: 16; // 16 region firmware version
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} reg_otfdec_r2cfgr_t;
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typedef struct {
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uint32_t reg_en : 1; // 0 region on-the-fly decryption enable
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uint32_t configlock: 1; // 1 region config lock
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uint32_t keylock : 1; // 2 region key lock
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uint32_t reserve0 : 1; // 3 Reserve
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uint32_t mode : 2; // 4 operating mode
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uint32_t reserve1 : 2; // 6 Reserve
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uint32_t keycrc : 8; // 8 region key 8-bit CRC
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uint32_t regx_version: 16; // 16 region firmware version
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} reg_otfdec_r3cfgr_t;
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typedef struct {
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uint32_t reg_en : 1; // 0 region on-the-fly decryption enable
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uint32_t configlock: 1; // 1 region config lock
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uint32_t keylock : 1; // 2 region key lock
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uint32_t reserve0 : 1; // 3 Reserve
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uint32_t mode : 2; // 4 operating mode
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uint32_t reserve1 : 2; // 6 Reserve
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uint32_t keycrc : 8; // 8 region key 8-bit CRC
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uint32_t regx_version: 16; // 16 region firmware version
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} reg_otfdec_r4cfgr_t;
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typedef struct {
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uint32_t regx_start_addr: 32; // 0 Region AXI start address
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} reg_otfdec_r1startaddr_t;
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typedef struct {
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uint32_t regx_start_addr: 32; // 0 Region AXI start address
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} reg_otfdec_r2startaddr_t;
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typedef struct {
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uint32_t regx_start_addr: 32; // 0 Region AXI start address
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} reg_otfdec_r3startaddr_t;
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typedef struct {
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uint32_t regx_start_addr: 32; // 0 Region AXI start address
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} reg_otfdec_r4startaddr_t;
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typedef struct {
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uint32_t regx_end_addr: 32; // 0 Region AXI end address
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} reg_otfdec_r1endaddr_t;
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typedef struct {
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uint32_t regx_end_addr: 32; // 0 Region AXI end address
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} reg_otfdec_r2endaddr_t;
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typedef struct {
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uint32_t regx_end_addr: 32; // 0 Region AXI end address
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} reg_otfdec_r3endaddr_t;
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typedef struct {
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uint32_t regx_end_addr: 32; // 0 Region AXI end address
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} reg_otfdec_r4endaddr_t;
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typedef struct {
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uint32_t regx_nonce: 32; // 0 REGx_NONCE
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} reg_otfdec_r1noncer0_t;
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typedef struct {
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uint32_t regx_nonce: 32; // 0 REGx_NONCE
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} reg_otfdec_r2noncer0_t;
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typedef struct {
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uint32_t regx_nonce: 32; // 0 REGx_NONCE
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} reg_otfdec_r3noncer0_t;
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typedef struct {
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uint32_t regx_nonce: 32; // 0 REGx_NONCE
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} reg_otfdec_r4noncer0_t;
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typedef struct {
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uint32_t regx_nonce: 32; // 0 Region nonce
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} reg_otfdec_r1noncer1_t;
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typedef struct {
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uint32_t regx_nonce: 32; // 0 Region nonce, bits [63:32]REGx_NONCE[63:32]
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} reg_otfdec_r2noncer1_t;
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typedef struct {
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uint32_t regx_nonce: 32; // 0 REGx_NONCE
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} reg_otfdec_r3noncer1_t;
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typedef struct {
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uint32_t regx_nonce: 32; // 0 REGx_NONCE
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} reg_otfdec_r4noncer1_t;
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typedef struct {
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uint32_t regx_key : 32; // 0 REGx_KEY
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} reg_otfdec_r1keyr0_t;
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typedef struct {
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uint32_t regx_key : 32; // 0 REGx_KEY
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} reg_otfdec_r2keyr0_t;
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typedef struct {
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uint32_t regx_key : 32; // 0 REGx_KEY
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} reg_otfdec_r3keyr0_t;
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typedef struct {
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uint32_t regx_key : 32; // 0 REGx_KEY
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} reg_otfdec_r4keyr0_t;
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typedef struct {
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uint32_t regx_key : 32; // 0 REGx_KEY
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} reg_otfdec_r1keyr1_t;
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typedef struct {
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uint32_t regx_key : 32; // 0 REGx_KEY
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} reg_otfdec_r2keyr1_t;
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typedef struct {
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uint32_t regx_key : 32; // 0 REGx_KEY
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} reg_otfdec_r3keyr1_t;
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typedef struct {
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uint32_t regx_key : 32; // 0 REGx_KEY
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} reg_otfdec_r4keyr1_t;
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typedef struct {
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uint32_t regx_key : 32; // 0 REGx_KEY
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} reg_otfdec_r1keyr2_t;
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typedef struct {
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uint32_t regx_key_ : 32; // 0 REGx_KEY
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} reg_otfdec_r2keyr2_t;
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typedef struct {
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uint32_t regx_key : 32; // 0 REGx_KEY
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} reg_otfdec_r3keyr2_t;
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typedef struct {
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uint32_t regx_key : 32; // 0 REGx_KEY
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} reg_otfdec_r4keyr2_t;
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typedef struct {
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uint32_t regx_key : 32; // 0 REGx_KEY
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} reg_otfdec_r1keyr3_t;
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typedef struct {
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uint32_t regx_key : 32; // 0 REGx_KEY
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} reg_otfdec_r2keyr3_t;
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typedef struct {
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uint32_t regx_key : 32; // 0 REGx_KEY
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} reg_otfdec_r3keyr3_t;
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typedef struct {
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uint32_t regx_key : 32; // 0 REGx_KEY
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} reg_otfdec_r4keyr3_t;
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typedef struct {
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uint32_t seif : 1; // 0 Security Error Interrupt Flag status
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uint32_t xoneif : 1; // 1 Execute-only execute-Never Error Interrupt Flag status
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uint32_t keif : 1; // 2 Key Error Interrupt Flag status
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uint32_t reserve0 : 29; // 3 Reserve
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} reg_otfdec_isr_t;
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typedef struct {
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uint32_t seif : 1; // 0 SEIF
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uint32_t xoneif : 1; // 1 Execute-only execute-Never Error Interrupt Flag clear
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uint32_t keif : 1; // 2 KEIF
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uint32_t reserve0 : 29; // 3 Reserve
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} reg_otfdec_icr_t;
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typedef struct {
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uint32_t seie : 1; // 0 Security Error Interrupt Enable
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uint32_t xoneie : 1; // 1 XONEIE
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uint32_t keie : 1; // 2 KEIE
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uint32_t reserve0 : 29; // 3 Reserve
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} reg_otfdec_ier_t;
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typedef struct {
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volatile reg_otfdec_cr_t cr;
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volatile uint32_t reserve0[3];
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volatile reg_otfdec_privcfgr_t privcfgr;
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volatile uint32_t reserve1[3];
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volatile reg_otfdec_r1cfgr_t r1cfgr;
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volatile uint32_t reserve2[11];
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volatile reg_otfdec_r2cfgr_t r2cfgr;
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volatile uint32_t reserve3[11];
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volatile reg_otfdec_r3cfgr_t r3cfgr;
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volatile uint32_t reserve4[11];
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volatile reg_otfdec_r4cfgr_t r4cfgr;
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volatile uint32_t reserve5[-36];
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volatile reg_otfdec_r1startaddr_t r1startaddr;
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volatile uint32_t reserve6[11];
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volatile reg_otfdec_r2startaddr_t r2startaddr;
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volatile uint32_t reserve7[11];
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volatile reg_otfdec_r3startaddr_t r3startaddr;
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volatile uint32_t reserve8[11];
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volatile reg_otfdec_r4startaddr_t r4startaddr;
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volatile uint32_t reserve9[-36];
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volatile reg_otfdec_r1endaddr_t r1endaddr;
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volatile uint32_t reserve10[11];
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volatile reg_otfdec_r2endaddr_t r2endaddr;
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volatile uint32_t reserve11[11];
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volatile reg_otfdec_r3endaddr_t r3endaddr;
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volatile reg_otfdec_r4endaddr_t r4endaddr;
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volatile uint32_t reserve12[-25];
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volatile reg_otfdec_r1noncer0_t r1noncer0;
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volatile uint32_t reserve13[11];
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volatile reg_otfdec_r2noncer0_t r2noncer0;
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volatile uint32_t reserve14[11];
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volatile reg_otfdec_r3noncer0_t r3noncer0;
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volatile uint32_t reserve15[11];
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volatile reg_otfdec_r4noncer0_t r4noncer0;
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volatile uint32_t reserve16[-36];
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volatile reg_otfdec_r1noncer1_t r1noncer1;
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volatile uint32_t reserve17[11];
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volatile reg_otfdec_r2noncer1_t r2noncer1;
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volatile uint32_t reserve18[11];
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volatile reg_otfdec_r3noncer1_t r3noncer1;
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volatile uint32_t reserve19[11];
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volatile reg_otfdec_r4noncer1_t r4noncer1;
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volatile uint32_t reserve20[-36];
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volatile reg_otfdec_r1keyr0_t r1keyr0;
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volatile uint32_t reserve21[11];
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volatile reg_otfdec_r2keyr0_t r2keyr0;
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volatile uint32_t reserve22[11];
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volatile reg_otfdec_r3keyr0_t r3keyr0;
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volatile uint32_t reserve23[11];
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volatile reg_otfdec_r4keyr0_t r4keyr0;
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volatile uint32_t reserve24[-36];
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volatile reg_otfdec_r1keyr1_t r1keyr1;
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volatile uint32_t reserve25[11];
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volatile reg_otfdec_r2keyr1_t r2keyr1;
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volatile uint32_t reserve26[11];
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volatile reg_otfdec_r3keyr1_t r3keyr1;
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volatile uint32_t reserve27[11];
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volatile reg_otfdec_r4keyr1_t r4keyr1;
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volatile uint32_t reserve28[-36];
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volatile reg_otfdec_r1keyr2_t r1keyr2;
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volatile uint32_t reserve29[11];
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volatile reg_otfdec_r2keyr2_t r2keyr2;
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volatile uint32_t reserve30[11];
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volatile reg_otfdec_r3keyr2_t r3keyr2;
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volatile uint32_t reserve31[11];
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volatile reg_otfdec_r4keyr2_t r4keyr2;
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volatile uint32_t reserve32[-36];
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volatile reg_otfdec_r1keyr3_t r1keyr3;
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volatile uint32_t reserve33[11];
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volatile reg_otfdec_r2keyr3_t r2keyr3;
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volatile uint32_t reserve34[11];
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volatile reg_otfdec_r3keyr3_t r3keyr3;
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volatile uint32_t reserve35[11];
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volatile reg_otfdec_r4keyr3_t r4keyr3;
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volatile uint32_t reserve36[139];
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volatile reg_otfdec_isr_t isr;
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volatile reg_otfdec_icr_t icr;
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volatile reg_otfdec_ier_t ier;
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} reg_otfdec_t;
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