274 lines
16 KiB
C
Executable File
274 lines
16 KiB
C
Executable File
#include <stdint.h>
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typedef struct {
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uint32_t mode0 : 2; // 0 Port x configuration bits (y = 0..15)
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uint32_t mode1 : 2; // 2 Port x configuration bits (y = 0..15)
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uint32_t mode2 : 2; // 4 Port x configuration bits (y = 0..15)
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uint32_t mode3 : 2; // 6 Port x configuration bits (y = 0..15)
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uint32_t mode4 : 2; // 8 Port x configuration bits (y = 0..15)
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uint32_t mode5 : 2; // 10 Port x configuration bits (y = 0..15)
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uint32_t mode6 : 2; // 12 Port x configuration bits (y = 0..15)
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uint32_t mode7 : 2; // 14 Port x configuration bits (y = 0..15)
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uint32_t mode8 : 2; // 16 Port x configuration bits (y = 0..15)
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uint32_t mode9 : 2; // 18 Port x configuration bits (y = 0..15)
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uint32_t mode10 : 2; // 20 Port x configuration bits (y = 0..15)
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uint32_t mode11 : 2; // 22 Port x configuration bits (y = 0..15)
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uint32_t mode12 : 2; // 24 Port x configuration bits (y = 0..15)
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uint32_t mode13 : 2; // 26 Port x configuration bits (y = 0..15)
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uint32_t mode14 : 2; // 28 Port x configuration bits (y = 0..15)
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uint32_t mode15 : 2; // 30 Port x configuration bits (y = 0..15)
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} reg_gpio_moder_t;
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typedef struct {
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uint32_t ot0 : 1; // 0 Port x configuration bits (y = 0..15)
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uint32_t ot1 : 1; // 1 Port x configuration bits (y = 0..15)
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uint32_t ot2 : 1; // 2 Port x configuration bits (y = 0..15)
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uint32_t ot3 : 1; // 3 Port x configuration bits (y = 0..15)
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uint32_t ot4 : 1; // 4 Port x configuration bits (y = 0..15)
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uint32_t ot5 : 1; // 5 Port x configuration bits (y = 0..15)
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uint32_t ot6 : 1; // 6 Port x configuration bits (y = 0..15)
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uint32_t ot7 : 1; // 7 Port x configuration bits (y = 0..15)
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uint32_t ot8 : 1; // 8 Port x configuration bits (y = 0..15)
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uint32_t ot9 : 1; // 9 Port x configuration bits (y = 0..15)
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uint32_t ot10 : 1; // 10 Port x configuration bits (y = 0..15)
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uint32_t ot11 : 1; // 11 Port x configuration bits (y = 0..15)
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uint32_t ot12 : 1; // 12 Port x configuration bits (y = 0..15)
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uint32_t ot13 : 1; // 13 Port x configuration bits (y = 0..15)
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uint32_t ot14 : 1; // 14 Port x configuration bits (y = 0..15)
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uint32_t ot15 : 1; // 15 Port x configuration bits (y = 0..15)
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uint32_t reserve0 : 16; // 16 Reserve
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} reg_gpio_otyper_t;
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typedef struct {
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uint32_t ospeed0 : 2; // 0 Port x configuration bits (y = 0..15)
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uint32_t ospeed1 : 2; // 2 Port x configuration bits (y = 0..15)
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uint32_t ospeed2 : 2; // 4 Port x configuration bits (y = 0..15)
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uint32_t ospeed3 : 2; // 6 Port x configuration bits (y = 0..15)
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uint32_t ospeed4 : 2; // 8 Port x configuration bits (y = 0..15)
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uint32_t ospeed5 : 2; // 10 Port x configuration bits (y = 0..15)
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uint32_t ospeed6 : 2; // 12 Port x configuration bits (y = 0..15)
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uint32_t ospeed7 : 2; // 14 Port x configuration bits (y = 0..15)
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uint32_t ospeed8 : 2; // 16 Port x configuration bits (y = 0..15)
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uint32_t ospeed9 : 2; // 18 Port x configuration bits (y = 0..15)
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uint32_t ospeed10 : 2; // 20 Port x configuration bits (y = 0..15)
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uint32_t ospeed11 : 2; // 22 Port x configuration bits (y = 0..15)
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uint32_t ospeed12 : 2; // 24 Port x configuration bits (y = 0..15)
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uint32_t ospeed13 : 2; // 26 Port x configuration bits (y = 0..15)
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uint32_t ospeed14 : 2; // 28 Port x configuration bits (y = 0..15)
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uint32_t ospeed15 : 2; // 30 Port x configuration bits (y = 0..15)
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} reg_gpio_ospeedr_t;
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typedef struct {
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uint32_t pupd0 : 2; // 0 Port x configuration bits (y = 0..15)
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uint32_t pupd1 : 2; // 2 Port x configuration bits (y = 0..15)
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uint32_t pupd2 : 2; // 4 Port x configuration bits (y = 0..15)
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uint32_t pupd3 : 2; // 6 Port x configuration bits (y = 0..15)
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uint32_t pupd4 : 2; // 8 Port x configuration bits (y = 0..15)
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uint32_t pupd5 : 2; // 10 Port x configuration bits (y = 0..15)
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uint32_t pupd6 : 2; // 12 Port x configuration bits (y = 0..15)
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uint32_t pupd7 : 2; // 14 Port x configuration bits (y = 0..15)
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uint32_t pupd8 : 2; // 16 Port x configuration bits (y = 0..15)
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uint32_t pupd9 : 2; // 18 Port x configuration bits (y = 0..15)
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uint32_t pupd10 : 2; // 20 Port x configuration bits (y = 0..15)
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uint32_t pupd11 : 2; // 22 Port x configuration bits (y = 0..15)
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uint32_t pupd12 : 2; // 24 Port x configuration bits (y = 0..15)
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uint32_t pupd13 : 2; // 26 Port x configuration bits (y = 0..15)
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uint32_t pupd14 : 2; // 28 Port x configuration bits (y = 0..15)
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uint32_t pupd15 : 2; // 30 Port x configuration bits (y = 0..15)
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} reg_gpio_pupdr_t;
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typedef struct {
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uint32_t id0 : 1; // 0 Port input data (y = 0..15)
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uint32_t id1 : 1; // 1 Port input data (y = 0..15)
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uint32_t id2 : 1; // 2 Port input data (y = 0..15)
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uint32_t id3 : 1; // 3 Port input data (y = 0..15)
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uint32_t id4 : 1; // 4 Port input data (y = 0..15)
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uint32_t id5 : 1; // 5 Port input data (y = 0..15)
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uint32_t id6 : 1; // 6 Port input data (y = 0..15)
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uint32_t id7 : 1; // 7 Port input data (y = 0..15)
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uint32_t id8 : 1; // 8 Port input data (y = 0..15)
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uint32_t id9 : 1; // 9 Port input data (y = 0..15)
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uint32_t id10 : 1; // 10 Port input data (y = 0..15)
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uint32_t id11 : 1; // 11 Port input data (y = 0..15)
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uint32_t id12 : 1; // 12 Port input data (y = 0..15)
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uint32_t id13 : 1; // 13 Port input data (y = 0..15)
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uint32_t id14 : 1; // 14 Port input data (y = 0..15)
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uint32_t id15 : 1; // 15 Port input data (y = 0..15)
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uint32_t reserve0 : 16; // 16 Reserve
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} reg_gpio_idr_t;
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typedef struct {
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uint32_t od0 : 1; // 0 Port output data (y = 0..15)
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uint32_t od1 : 1; // 1 Port output data (y = 0..15)
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uint32_t od2 : 1; // 2 Port output data (y = 0..15)
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uint32_t od3 : 1; // 3 Port output data (y = 0..15)
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uint32_t od4 : 1; // 4 Port output data (y = 0..15)
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uint32_t od5 : 1; // 5 Port output data (y = 0..15)
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uint32_t od6 : 1; // 6 Port output data (y = 0..15)
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uint32_t od7 : 1; // 7 Port output data (y = 0..15)
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uint32_t od8 : 1; // 8 Port output data (y = 0..15)
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uint32_t od9 : 1; // 9 Port output data (y = 0..15)
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uint32_t od10 : 1; // 10 Port output data (y = 0..15)
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uint32_t od11 : 1; // 11 Port output data (y = 0..15)
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uint32_t od12 : 1; // 12 Port output data (y = 0..15)
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uint32_t od13 : 1; // 13 Port output data (y = 0..15)
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uint32_t od14 : 1; // 14 Port output data (y = 0..15)
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uint32_t od15 : 1; // 15 Port output data (y = 0..15)
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uint32_t reserve0 : 16; // 16 Reserve
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} reg_gpio_odr_t;
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typedef struct {
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uint32_t bs0 : 1; // 0 Port x set bit y (y= 0..15)
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uint32_t bs1 : 1; // 1 Port x set bit y (y= 0..15)
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uint32_t bs2 : 1; // 2 Port x set bit y (y= 0..15)
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uint32_t bs3 : 1; // 3 Port x set bit y (y= 0..15)
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uint32_t bs4 : 1; // 4 Port x set bit y (y= 0..15)
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uint32_t bs5 : 1; // 5 Port x set bit y (y= 0..15)
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uint32_t bs6 : 1; // 6 Port x set bit y (y= 0..15)
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uint32_t bs7 : 1; // 7 Port x set bit y (y= 0..15)
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uint32_t bs8 : 1; // 8 Port x set bit y (y= 0..15)
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uint32_t bs9 : 1; // 9 Port x set bit y (y= 0..15)
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uint32_t bs10 : 1; // 10 Port x set bit y (y= 0..15)
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uint32_t bs11 : 1; // 11 Port x set bit y (y= 0..15)
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uint32_t bs12 : 1; // 12 Port x set bit y (y= 0..15)
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uint32_t bs13 : 1; // 13 Port x set bit y (y= 0..15)
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uint32_t bs14 : 1; // 14 Port x set bit y (y= 0..15)
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uint32_t bs15 : 1; // 15 Port x set bit y (y= 0..15)
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uint32_t br0 : 1; // 16 Port x set bit y (y= 0..15)
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uint32_t br1 : 1; // 17 Port x reset bit y (y = 0..15)
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uint32_t br2 : 1; // 18 Port x reset bit y (y = 0..15)
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uint32_t br3 : 1; // 19 Port x reset bit y (y = 0..15)
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uint32_t br4 : 1; // 20 Port x reset bit y (y = 0..15)
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uint32_t br5 : 1; // 21 Port x reset bit y (y = 0..15)
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uint32_t br6 : 1; // 22 Port x reset bit y (y = 0..15)
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uint32_t br7 : 1; // 23 Port x reset bit y (y = 0..15)
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uint32_t br8 : 1; // 24 Port x reset bit y (y = 0..15)
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uint32_t br9 : 1; // 25 Port x reset bit y (y = 0..15)
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uint32_t br10 : 1; // 26 Port x reset bit y (y = 0..15)
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uint32_t br11 : 1; // 27 Port x reset bit y (y = 0..15)
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uint32_t br12 : 1; // 28 Port x reset bit y (y = 0..15)
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uint32_t br13 : 1; // 29 Port x reset bit y (y = 0..15)
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uint32_t br14 : 1; // 30 Port x reset bit y (y = 0..15)
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uint32_t br15 : 1; // 31 Port x reset bit y (y = 0..15)
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} reg_gpio_bsrr_t;
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typedef struct {
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uint32_t lck0 : 1; // 0 Port x lock bit y (y= 0..15)
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uint32_t lck1 : 1; // 1 Port x lock bit y (y= 0..15)
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uint32_t lck2 : 1; // 2 Port x lock bit y (y= 0..15)
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uint32_t lck3 : 1; // 3 Port x lock bit y (y= 0..15)
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uint32_t lck4 : 1; // 4 Port x lock bit y (y= 0..15)
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uint32_t lck5 : 1; // 5 Port x lock bit y (y= 0..15)
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uint32_t lck6 : 1; // 6 Port x lock bit y (y= 0..15)
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uint32_t lck7 : 1; // 7 Port x lock bit y (y= 0..15)
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uint32_t lck8 : 1; // 8 Port x lock bit y (y= 0..15)
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uint32_t lck9 : 1; // 9 Port x lock bit y (y= 0..15)
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uint32_t lck10 : 1; // 10 Port x lock bit y (y= 0..15)
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uint32_t lck11 : 1; // 11 Port x lock bit y (y= 0..15)
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uint32_t lck12 : 1; // 12 Port x lock bit y (y= 0..15)
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uint32_t lck13 : 1; // 13 Port x lock bit y (y= 0..15)
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uint32_t lck14 : 1; // 14 Port x lock bit y (y= 0..15)
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uint32_t lck15 : 1; // 15 Port x lock bit y (y= 0..15)
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uint32_t lckk : 1; // 16 Lock key
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uint32_t reserve0 : 15; // 17 Reserve
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} reg_gpio_lckr_t;
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typedef struct {
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uint32_t afsel0 : 4; // 0 Alternate function selection for port x bit y (y = 0..7)
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uint32_t afsel1 : 4; // 4 Alternate function selection for port x bit y (y = 0..7)
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uint32_t afsel2 : 4; // 8 Alternate function selection for port x bit y (y = 0..7)
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uint32_t afsel3 : 4; // 12 Alternate function selection for port x bit y (y = 0..7)
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uint32_t afsel4 : 4; // 16 Alternate function selection for port x bit y (y = 0..7)
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uint32_t afsel5 : 4; // 20 Alternate function selection for port x bit y (y = 0..7)
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uint32_t afsel6 : 4; // 24 Alternate function selection for port x bit y (y = 0..7)
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uint32_t afsel7 : 4; // 28 Alternate function selection for port x bit y (y = 0..7)
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} reg_gpio_afrl_t;
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typedef struct {
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uint32_t afsel8 : 4; // 0 Alternate function selection for port x bit y (y = 8..15)
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uint32_t afsel9 : 4; // 4 Alternate function selection for port x bit y (y = 8..15)
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uint32_t afsel10 : 4; // 8 Alternate function selection for port x bit y (y = 8..15)
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uint32_t afsel11 : 4; // 12 Alternate function selection for port x bit y (y = 8..15)
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uint32_t afsel12 : 4; // 16 Alternate function selection for port x bit y (y = 8..15)
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uint32_t afsel13 : 4; // 20 Alternate function selection for port x bit y (y = 8..15)
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uint32_t afsel14 : 4; // 24 Alternate function selection for port x bit y (y = 8..15)
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uint32_t afsel15 : 4; // 28 Alternate function selection for port x bit y (y = 8..15)
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} reg_gpio_afrh_t;
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typedef struct {
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uint32_t br0 : 1; // 0 Port x reset IO pin y
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uint32_t br1 : 1; // 1 Port x reset IO pin y
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uint32_t br2 : 1; // 2 Port x reset IO pin y
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uint32_t br3 : 1; // 3 Port x reset IO pin y
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uint32_t br4 : 1; // 4 Port x reset IO pin y
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uint32_t br5 : 1; // 5 Port x reset IO pin y
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uint32_t br6 : 1; // 6 Port x reset IO pin y
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uint32_t br7 : 1; // 7 Port x reset IO pin y
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uint32_t br8 : 1; // 8 Port x reset IO pin y
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uint32_t br9 : 1; // 9 Port x reset IO pin y
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uint32_t br10 : 1; // 10 Port x reset IO pin y
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uint32_t br11 : 1; // 11 Port x reset IO pin y
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uint32_t br12 : 1; // 12 Port x reset IO pin y
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uint32_t br13 : 1; // 13 Port x reset IO pin y
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uint32_t br14 : 1; // 14 Port x reset IO pin y
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uint32_t br15 : 1; // 15 Port x reset IO pin y
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uint32_t reserve0 : 16; // 16 Reserve
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} reg_gpio_brr_t;
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typedef struct {
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uint32_t hslv0 : 1; // 0 Port x high-speed low-voltage configuration (y= 15 to 0)
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uint32_t hslv1 : 1; // 1 Port x high-speed low-voltage configuration (y= 15 to 0)
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uint32_t hslv2 : 1; // 2 Port x high-speed low-voltage configuration (y= 15 to 0)
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uint32_t hslv3 : 1; // 3 Port x high-speed low-voltage configuration (y= 15 to 0)
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uint32_t hslv4 : 1; // 4 Port x high-speed low-voltage configuration (y= 15 to 0)
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uint32_t hslv5 : 1; // 5 Port x high-speed low-voltage configuration (y= 15 to 0)
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uint32_t hslv6 : 1; // 6 Port x high-speed low-voltage configuration (y= 15 to 0)
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uint32_t hslv7 : 1; // 7 Port x high-speed low-voltage configuration (y= 15 to 0)
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uint32_t hslv8 : 1; // 8 Port x high-speed low-voltage configuration (y= 15 to 0)
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uint32_t hslv9 : 1; // 9 Port x high-speed low-voltage configuration (y= 15 to 0)
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uint32_t hslv10 : 1; // 10 Port x high-speed low-voltage configuration (y= 15 to 0)
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uint32_t hslv11 : 1; // 11 Port x high-speed low-voltage configuration (y= 15 to 0)
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uint32_t hslv12 : 1; // 12 Port x high-speed low-voltage configuration (y= 15 to 0)
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uint32_t hslv13 : 1; // 13 Port x high-speed low-voltage configuration (y= 15 to 0)
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uint32_t hslv14 : 1; // 14 Port x high-speed low-voltage configuration (y= 15 to 0)
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uint32_t hslv15 : 1; // 15 Port x high-speed low-voltage configuration (y= 15 to 0)
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uint32_t reserve0 : 16; // 16 Reserve
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} reg_gpio_hslvr_t;
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typedef struct {
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uint32_t sec0 : 1; // 0 I/O pin of Port x secure bit enable
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uint32_t sec1 : 1; // 1 I/O pin of Port x secure bit enable
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uint32_t sec2 : 1; // 2 I/O pin of Port x secure bit enable
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uint32_t sec3 : 1; // 3 I/O pin of Port x secure bit enable
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uint32_t sec4 : 1; // 4 I/O pin of Port x secure bit enable
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uint32_t sec5 : 1; // 5 I/O pin of Port x secure bit enable
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uint32_t sec6 : 1; // 6 I/O pin of Port x secure bit enable
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uint32_t sec7 : 1; // 7 I/O pin of Port x secure bit enable
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uint32_t sec8 : 1; // 8 I/O pin of Port x secure bit enable
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uint32_t sec9 : 1; // 9 I/O pin of Port x secure bit enable
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uint32_t sec10 : 1; // 10 I/O pin of Port x secure bit enable
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uint32_t sec11 : 1; // 11 I/O pin of Port x secure bit enable
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uint32_t sec12 : 1; // 12 I/O pin of Port x secure bit enable
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uint32_t sec13 : 1; // 13 I/O pin of Port x secure bit enable
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uint32_t sec14 : 1; // 14 I/O pin of Port x secure bit enable
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uint32_t sec15 : 1; // 15 I/O pin of Port x secure bit enable
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uint32_t reserve0 : 16; // 16 Reserve
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} reg_gpio_seccfgr_t;
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typedef struct {
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volatile reg_gpio_moder_t moder;
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volatile reg_gpio_otyper_t otyper;
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volatile reg_gpio_ospeedr_t ospeedr;
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volatile reg_gpio_pupdr_t pupdr;
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volatile reg_gpio_idr_t idr;
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volatile reg_gpio_odr_t odr;
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volatile reg_gpio_bsrr_t bsrr;
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volatile reg_gpio_lckr_t lckr;
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volatile reg_gpio_afrl_t afrl;
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volatile reg_gpio_afrh_t afrh;
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volatile reg_gpio_brr_t brr;
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volatile reg_gpio_hslvr_t hslvr;
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volatile reg_gpio_seccfgr_t seccfgr;
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} reg_gpio_t;
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