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stm32u5_cargo/stm32u5/includes/lowlevel/reg_gpio.h
Mason dbefded049
update
2023-11-14 16:25:09 -05:00

366 lines
8.4 KiB
C
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#ifndef LL_GPIO_H
#define LL_GPIO_H
#ifdef __cplusplus
extern "C" {
#endif
#include "stm32u575xx.h"
#include "stm32u5xx.h"
//typedef enum {
// GGPIO_PIN_0 = 0, GGPIO_PIN_1, GGPIO_PIN_2, GGPIO_PIN_3,
// GGPIO_PIN_4, GGPIO_PIN_5, GGPIO_PIN_6, GGPIO_PIN_7,
// GGPIO_PIN_8, GGPIO_PIN_9, GGPIO_PIN_10, GGPIO_PIN_11,
// GGPIO_PIN_12, GGPIO_PIN_13, GGPIO_PIN_14, GGPIO_PIN_15,
//} uint32_t; ///< GPIO pin enum
typedef enum {
PULL_PUSH = 0, ///< push-pull (default)
OPEN_DRAIN = 1, ///< open drain (most situation requires external pull-up resistor)
} reg_gpio_out_type; ///< GPIO output type enum
typedef enum {
//TODO: add speed range for each port port
LOW_SPEED = 0, ///< low speed
MEDIUM_SPEED, ///< medium speed
HIGH_SPEED, ///< high speed
VERY_HIGH_SPEED, ///< very high speed
} reg_gpio_speed; /// GPIO output speed enum
typedef enum {
INPUT = 0, ///< Input mode
OUTPUT = 1, ///< general purpose output mode
AF = 2, ///< alternate function mode
ANALOG = 3 ///< analog mode
} reg_gpio_mode; ///< GPIO mode enum
/// @brief set port mode
/// @param gpio port port
/// @param pin pin number
/// @param mode mode
inline static void reg_gpio_set_mode(GPIO_TypeDef *gpio, uint8_t pin, reg_gpio_mode mode) {
MODIFY_REG(gpio->MODER, GPIO_MODER_MODE0 << (pin * 2), mode << (pin * 2));
}
/// @brief set port output speed
/// @param gpio port port
/// @param pin pin number
/// @param speed speed
inline static void reg_gpio_set_speed(GPIO_TypeDef *gpio, uint32_t pin, reg_gpio_speed speed) {
MODIFY_REG(gpio->OSPEEDR, GPIO_OSPEEDR_OSPEED0 << (pin * 2), speed << (pin * 2));
}
/// @brief set port output type, push-pull or open-drain
/// @param gpio port port
/// @param pin pin number
/// @param type type
inline static void reg_gpio_set_output_type(GPIO_TypeDef *gpio, uint32_t pin, reg_gpio_out_type type) {
MODIFY_REG(gpio->OTYPER, GPIO_OTYPER_OT0 << pin, type << pin);
}
/// @brief set port pull alternative function
/// @param gpio port port
/// @param pin pin number
/// @param af alternative function number
inline static void reg_gpio_set_alternative_function(GPIO_TypeDef *gpio, uint32_t pin, uint32_t af) {
if (pin <= 7)
MODIFY_REG(gpio->AFR[0], GPIO_AFRL_AFSEL0_Msk << (pin * 4), af << (pin * 4));
else
MODIFY_REG(gpio->AFR[1], GPIO_AFRH_AFSEL8_Msk << ((pin - 8) * 4), af << ((pin - 8) * 4));
}
typedef enum {
LL_NOPUPD = 0, ///< no pull-up or pull-down
LL_PULLUP = 1, ///< pull-up
LL_PULLDOWN = 2 ///< pull-down
} reg_gpio_pupd;
/// @brief set port pull-up or pull-down
/// @param gpio port port
/// @param pin pin number
/// @param pull pull-up or pull-down
inline static void reg_gpio_set_pull(GPIO_TypeDef *gpio, uint32_t pin, reg_gpio_pupd pull) {
MODIFY_REG(gpio->PUPDR, GPIO_PUPDR_PUPD0 << (pin * 2), pull << (pin * 2));
}
typedef struct {
uint32_t moder0:2;
uint32_t moder1:2;
uint32_t moder2:2;
uint32_t moder3:2;
uint32_t moder4:2;
uint32_t moder5:2;
uint32_t moder6:2;
uint32_t moder7:2;
uint32_t moder8:2;
uint32_t moder9:2;
uint32_t moder10:2;
uint32_t moder11:2;
uint32_t moder12:2;
uint32_t moder13:2;
uint32_t moder14:2;
uint32_t moder15:2;
}reg_gpio_moder_t;
typedef struct {
uint32_t otyper0:1;
uint32_t otyper1:1;
uint32_t otyper2:1;
uint32_t otyper3:1;
uint32_t otyper4:1;
uint32_t otyper5:1;
uint32_t otyper6:1;
uint32_t otyper7:1;
uint32_t otyper8:1;
uint32_t otyper9:1;
uint32_t otyper10:1;
uint32_t otyper11:1;
uint32_t otyper12:1;
uint32_t otyper13:1;
uint32_t otyper14:1;
uint32_t otyper15:1;
uint32_t reserved:16;
}reg_gpio_otyper_t;
typedef struct {
uint32_t ospeedr0:2;
uint32_t ospeedr1:2;
uint32_t ospeedr2:2;
uint32_t ospeedr3:2;
uint32_t ospeedr4:2;
uint32_t ospeedr5:2;
uint32_t ospeedr6:2;
uint32_t ospeedr7:2;
uint32_t ospeedr8:2;
uint32_t ospeedr9:2;
uint32_t ospeedr10:2;
uint32_t ospeedr11:2;
uint32_t ospeedr12:2;
uint32_t ospeedr13:2;
uint32_t ospeedr14:2;
uint32_t ospeedr15:2;
}reg_gpio_ospeedr_t;
typedef struct {
uint32_t pupdr0:2;
uint32_t pupdr1:2;
uint32_t pupdr2:2;
uint32_t pupdr3:2;
uint32_t pupdr4:2;
uint32_t pupdr5:2;
uint32_t pupdr6:2;
uint32_t pupdr7:2;
uint32_t pupdr8:2;
uint32_t pupdr9:2;
uint32_t pupdr10:2;
uint32_t pupdr11:2;
uint32_t pupdr12:2;
uint32_t pupdr13:2;
uint32_t pupdr14:2;
uint32_t pupdr15:2;
}reg_gpio_pupdr_t;
typedef struct {
uint32_t idr0:1;
uint32_t idr1:1;
uint32_t idr2:1;
uint32_t idr3:1;
uint32_t idr4:1;
uint32_t idr5:1;
uint32_t idr6:1;
uint32_t idr7:1;
uint32_t idr8:1;
uint32_t idr9:1;
uint32_t idr10:1;
uint32_t idr11:1;
uint32_t idr12:1;
uint32_t idr13:1;
uint32_t idr14:1;
uint32_t idr15:1;
uint32_t reserved:16;
}reg_gpio_idr_t;
typedef struct {
uint32_t odr0:1;
uint32_t odr1:1;
uint32_t odr2:1;
uint32_t odr3:1;
uint32_t odr4:1;
uint32_t odr5:1;
uint32_t odr6:1;
uint32_t odr7:1;
uint32_t odr8:1;
uint32_t odr9:1;
uint32_t odr10:1;
uint32_t odr11:1;
uint32_t odr12:1;
uint32_t odr13:1;
uint32_t odr14:1;
uint32_t odr15:1;
uint32_t reserved:16;
}reg_gpio_odr_t;
typedef struct {
uint32_t bs0:1;
uint32_t bs1:1;
uint32_t bs2:1;
uint32_t bs3:1;
uint32_t bs4:1;
uint32_t bs5:1;
uint32_t bs6:1;
uint32_t bs7:1;
uint32_t bs8:1;
uint32_t bs9:1;
uint32_t bs10:1;
uint32_t bs11:1;
uint32_t bs12:1;
uint32_t bs13:1;
uint32_t bs14:1;
uint32_t bs15:1;
uint32_t br0:1;
uint32_t br1:1;
uint32_t br2:1;
uint32_t br3:1;
uint32_t br4:1;
uint32_t br5:1;
uint32_t br6:1;
uint32_t br7:1;
uint32_t br8:1;
uint32_t br9:1;
uint32_t br10:1;
uint32_t br11:1;
uint32_t br12:1;
uint32_t br13:1;
uint32_t br14:1;
uint32_t br15:1;
}reg_gpio_bsrr_t;
typedef struct {
uint32_t lck0:1;
uint32_t lck1:1;
uint32_t lck2:1;
uint32_t lck3:1;
uint32_t lck4:1;
uint32_t lck5:1;
uint32_t lck6:1;
uint32_t lck7:1;
uint32_t lck8:1;
uint32_t lck9:1;
uint32_t lck10:1;
uint32_t lck11:1;
uint32_t lck12:1;
uint32_t lck13:1;
uint32_t lck14:1;
uint32_t lck15:1;
uint32_t lckk:1;
uint32_t reserved:15;
}reg_gpio_lckr_t;
typedef struct {
uint32_t afsel0:4;
uint32_t afsel1:4;
uint32_t afsel2:4;
uint32_t afsel3:4;
uint32_t afsel4:4;
uint32_t afsel5:4;
uint32_t afsel6:4;
uint32_t afsel7:4;
uint32_t afsel8:4;
uint32_t afsel9:4;
uint32_t afsel10:4;
uint32_t afsel11:4;
uint32_t afsel12:4;
uint32_t afsel13:4;
uint32_t afsel14:4;
uint32_t afsel15:4;
}reg_gpio_afr_t;
typedef struct {
uint32_t br0:1;
uint32_t br1:1;
uint32_t br2:1;
uint32_t br3:1;
uint32_t br4:1;
uint32_t br5:1;
uint32_t br6:1;
uint32_t br7:1;
uint32_t br8:1;
uint32_t br9:1;
uint32_t br10:1;
uint32_t br11:1;
uint32_t br12:1;
uint32_t br13:1;
uint32_t br14:1;
uint32_t br15:1;
uint32_t reserved:16;
}reg_gpio_brr_t;
typedef struct {
uint32_t hslv0:1;
uint32_t hslv1:1;
uint32_t hslv2:1;
uint32_t hslv3:1;
uint32_t hslv4:1;
uint32_t hslv5:1;
uint32_t hslv6:1;
uint32_t hslv7:1;
uint32_t hslv8:1;
uint32_t hslv9:1;
uint32_t hslv10:1;
uint32_t hslv11:1;
uint32_t hslv12:1;
uint32_t hslv13:1;
uint32_t hslv14:1;
uint32_t hslv15:1;
uint32_t reserved:16;
}reg_gpio_hslv_t; //high speed low voltage register
typedef struct {
uint32_t sec0:1;
uint32_t sec1:1;
uint32_t sec2:1;
uint32_t sec3:1;
uint32_t sec4:1;
uint32_t sec5:1;
uint32_t sec6:1;
uint32_t sec7:1;
uint32_t sec8:1;
uint32_t sec9:1;
uint32_t sec10:1;
uint32_t sec11:1;
uint32_t sec12:1;
uint32_t sec13:1;
uint32_t sec14:1;
uint32_t sec15:1;
uint32_t reserved:16;
}reg_gpio_sec_cfg_t; //set clear register
typedef struct {
reg_gpio_moder_t *moder;
reg_gpio_otyper_t *otyper;
reg_gpio_ospeedr_t *ospeedr;
reg_gpio_pupdr_t *pupdr;
reg_gpio_idr_t *idr;
reg_gpio_odr_t *odr;
reg_gpio_bsrr_t *bsrr;
reg_gpio_lckr_t *lckr;
reg_gpio_afr_t *afr;
reg_gpio_brr_t *brr;
reg_gpio_hslv_t *hslv;
reg_gpio_sec_cfg_t *sec_cfg;
}reg_gpio_t;
#ifdef __cplusplus
};
#endif
#endif //LL_GPIO_H
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