stm32-data/data/registers/pwr_f7.yaml
2021-11-17 21:23:26 +01:00

183 lines
4.2 KiB
YAML

---
block/PWR:
description: Power control
items:
- name: CR1
description: power control register
byte_offset: 0
fieldset: CR1
- name: CSR1
description: power control/status register
byte_offset: 4
fieldset: CSR1
- name: CR2
description: power control register
byte_offset: 8
fieldset: CR2
- name: CSR2
description: power control/status register
byte_offset: 12
fieldset: CSR2
fieldset/CR1:
description: power control register
fields:
- name: LPDS
description: Low-power deep sleep
bit_offset: 0
bit_size: 1
- name: PDDS
description: Power down deepsleep
bit_offset: 1
bit_size: 1
enum: PDDS
- name: CSBF
description: Clear standby flag
bit_offset: 3
bit_size: 1
- name: PVDE
description: Power voltage detector enable
bit_offset: 4
bit_size: 1
- name: PLS
description: PVD level selection
bit_offset: 5
bit_size: 3
- name: DBP
description: Disable backup domain write protection
bit_offset: 8
bit_size: 1
- name: FPDS
description: Flash power down in Stop mode
bit_offset: 9
bit_size: 1
- name: LPUDS
description: Low-power regulator in deepsleep under-drive mode
bit_offset: 10
bit_size: 1
- name: MRUDS
description: Main regulator in deepsleep under-drive mode
bit_offset: 11
bit_size: 1
- name: ADCDC
description: ADCDC1
bit_offset: 13
bit_size: 1
array:
len: 1
stride: 0
- name: VOS
description: Regulator voltage scaling output selection
bit_offset: 14
bit_size: 2
enum: VOS
- name: ODEN
description: Over-drive enable
bit_offset: 16
bit_size: 1
- name: ODSWEN
description: Over-drive switching enabled
bit_offset: 17
bit_size: 1
- name: UDEN
description: Under-drive enable in stop mode
bit_offset: 18
bit_size: 2
fieldset/CR2:
description: power control register
fields:
- name: CWUPF
description: Clear Wakeup Pin flag for PA0
bit_offset: 0
bit_size: 1
array:
len: 6
stride: 1
- name: WUPP
description: Wakeup pin polarity bit for PA0
bit_offset: 8
bit_size: 1
array:
len: 6
stride: 1
fieldset/CSR1:
description: power control/status register
fields:
- name: WUIF
description: Wakeup internal flag
bit_offset: 0
bit_size: 1
- name: SBF
description: Standby flag
bit_offset: 1
bit_size: 1
- name: PVDO
description: PVD output
bit_offset: 2
bit_size: 1
- name: BRR
description: Backup regulator ready
bit_offset: 3
bit_size: 1
- name: EIWUP
description: Enable internal wakeup
bit_offset: 8
bit_size: 1
- name: BRE
description: Backup regulator enable
bit_offset: 9
bit_size: 1
- name: VOSRDY
description: Regulator voltage scaling output selection ready bit
bit_offset: 14
bit_size: 1
- name: ODRDY
description: Over-drive mode ready
bit_offset: 16
bit_size: 1
- name: ODSWRDY
description: Over-drive mode switching ready
bit_offset: 17
bit_size: 1
- name: UDRDY
description: Under-drive ready flag
bit_offset: 18
bit_size: 2
fieldset/CSR2:
description: power control/status register
fields:
- name: WUPF
description: Wakeup Pin flag for PA0
bit_offset: 0
bit_size: 1
array:
len: 6
stride: 1
- name: EWUP
description: Enable Wakeup pin for PA0
bit_offset: 8
bit_size: 1
array:
len: 6
stride: 1
enum/PDDS:
bit_size: 1
variants:
- name: STOP_MODE
description: Enter Stop mode when the CPU enters deepsleep
value: 0
- name: STANDBY_MODE
description: Enter Standby mode when the CPU enters deepsleep
value: 1
enum/VOS:
bit_size: 2
variants:
- name: SCALE3
description: Scale 3 mode
value: 1
- name: SCALE2
description: Scale 2 mode
value: 2
- name: SCALE1
description: Scale 1 mode (reset value)
value: 3