114 lines
2.6 KiB
YAML
114 lines
2.6 KiB
YAML
block/TIM:
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description: Advanced-timers
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items:
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- name: CR1
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description: control register 1
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byte_offset: 0
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fieldset: CR1
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- name: CR2
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description: control register 2
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byte_offset: 4
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fieldset: CR2
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- name: SMCR
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description: slave mode control register
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byte_offset: 8
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fieldset: SMCR
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- name: DIER
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description: DMA/Interrupt enable register
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byte_offset: 12
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fieldset: DIER
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- name: SR
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description: status register
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byte_offset: 16
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fieldset: SR
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- name: EGR
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description: event generation register
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byte_offset: 20
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access: Write
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fieldset: EGR
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- name: CCMR_Input
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description: capture/compare mode register 1-2 (input mode)
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array:
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len: 2
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stride: 4
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byte_offset: 24
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fieldset: CCMR_Input
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- name: CCMR_Output
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description: capture/compare mode register 1-2 (output mode)
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array:
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len: 2
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stride: 4
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byte_offset: 24
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fieldset: CCMR_Output
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- name: CCER
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description: capture/compare enable register
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byte_offset: 32
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fieldset: CCER
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- name: CNT
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description: counter
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byte_offset: 36
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fieldset: CNT
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- name: PSC
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description: prescaler
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byte_offset: 40
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fieldset: PSC
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- name: ARR
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description: auto-reload register
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byte_offset: 44
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fieldset: ARR
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- name: RCR
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description: repetition counter register
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byte_offset: 48
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fieldset: RCR
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- name: CCR
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description: capture/compare register x (x=1-4)
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array:
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len: 4
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stride: 4
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byte_offset: 52
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fieldset: CCR
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- name: BDTR
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description: break and dead-time register
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byte_offset: 68
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fieldset: BDTR
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- name: CCR5
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description: capture/compare register 5
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byte_offset: 72
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fieldset: CCR5
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- name: CCR6
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description: capture/compare register 6
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byte_offset: 76
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fieldset: CCR
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- name: CCMR3_Output
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description: capture/compare mode register 3 (output mode only)
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byte_offset: 80
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fieldset: CCMR_Output
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- name: DTR2
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description: break and dead-time register
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byte_offset: 84
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fieldset: DTR2
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- name: ECR
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description: encoder control register
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byte_offset: 88
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fieldset: ECR
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- name: TISEL
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description: input selection register
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byte_offset: 92
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fieldset: TISEL
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- name: AF1
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description: alternate function register 1
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byte_offset: 96
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fieldset: AF1
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- name: AF2
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description: alternate function register 2
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byte_offset: 100
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fieldset: AF2
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- name: DCR
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description: DMA control register
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byte_offset: 988
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fieldset: DCR
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- name: DMAR
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description: DMA address for full transfer
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byte_offset: 992
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fieldset: DMAR
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