block/TIM:
  description: Advanced-timers
  items:
  - name: CR1
    description: control register 1
    byte_offset: 0
    fieldset: CR1
  - name: CR2
    description: control register 2
    byte_offset: 4
    fieldset: CR2
  - name: SMCR
    description: slave mode control register
    byte_offset: 8
    fieldset: SMCR
  - name: DIER
    description: DMA/Interrupt enable register
    byte_offset: 12
    fieldset: DIER
  - name: SR
    description: status register
    byte_offset: 16
    fieldset: SR
  - name: EGR
    description: event generation register
    byte_offset: 20
    access: Write
    fieldset: EGR
  - name: CCMR_Input
    description: capture/compare mode register 1-2 (input mode)
    array:
      len: 2
      stride: 4
    byte_offset: 24
    fieldset: CCMR_Input
  - name: CCMR_Output
    description: capture/compare mode register 1-2 (output mode)
    array:
      len: 2
      stride: 4
    byte_offset: 24
    fieldset: CCMR_Output
  - name: CCER
    description: capture/compare enable register
    byte_offset: 32
    fieldset: CCER
  - name: CNT
    description: counter
    byte_offset: 36
    fieldset: CNT
  - name: PSC
    description: prescaler
    byte_offset: 40
    fieldset: PSC
  - name: ARR
    description: auto-reload register
    byte_offset: 44
    fieldset: ARR
  - name: RCR
    description: repetition counter register
    byte_offset: 48
    fieldset: RCR
  - name: CCR
    description: capture/compare register x (x=1-4)
    array:
      len: 4
      stride: 4
    byte_offset: 52
    fieldset: CCR
  - name: BDTR
    description: break and dead-time register
    byte_offset: 68
    fieldset: BDTR
  - name: CCR5
    description: capture/compare register 5
    byte_offset: 72
    fieldset: CCR5
  - name: CCR6
    description: capture/compare register 6
    byte_offset: 76
    fieldset: CCR
  - name: CCMR3_Output
    description: capture/compare mode register 3 (output mode only)
    byte_offset: 80
    fieldset: CCMR_Output
  - name: DTR2
    description: break and dead-time register
    byte_offset: 84
    fieldset: DTR2
  - name: ECR
    description: encoder control register
    byte_offset: 88
    fieldset: ECR
  - name: TISEL
    description: input selection register
    byte_offset: 92
    fieldset: TISEL
  - name: AF1
    description: alternate function register 1
    byte_offset: 96
    fieldset: AF1
  - name: AF2
    description: alternate function register 2
    byte_offset: 100
    fieldset: AF2
  - name: DCR
    description: DMA control register
    byte_offset: 988
    fieldset: DCR
  - name: DMAR
    description: DMA address for full transfer
    byte_offset: 992
    fieldset: DMAR