160921a008
update otg high speed
2024-04-14 18:35:33 -04:00
325a87c07a
u5a5 use otg-hs
2024-04-14 12:50:18 -04:00
a98c13faf5
Merge branch 'embassy-rs:main' into main
2024-04-14 12:39:59 -04:00
94439f8c67
init otg highspeed
2024-04-14 12:37:15 -04:00
Dario Nieuwenhuis
d4a97f60b1
Add stm32u0.
2024-04-13 03:16:25 +02:00
Dario Nieuwenhuis
8e26f36a8e
Manually maintain memory maps instead of parsing them from cubeprogdb.
...
First step towards fixing #301
The cubeprogdb has turned out to be a quite bad data source. It's not granular
enough (it has one entry per chip die, not per chip) so the previous code joined
the data with the C headers and cubedb to fill in the gaps, essentialy "guessing"
stuff. This has been quite error prone (see #301 ) and hard to make fixes to.
Instead, we're going to manually maintain memory maps in a .rs file. This way, if
something is wrong we can simply go and fix it.
This commit just migrates the existing data, even if it's wrong. (it does fix
a few very minor mistakes). Next steps is actually fixing the memory maps.
2024-04-09 03:38:33 +02:00
Dario Nieuwenhuis
9d3d5c9690
Sort memory regions by addr.
2024-04-09 02:43:44 +02:00
Dario Nieuwenhuis
4e3ed9abee
Remove OTP from memory map.
2024-04-09 02:19:17 +02:00
Michael Zill
b782384611
Arrayfied IER, ICR, ISR and MISR
...
IRQ registers have for all 4 variants the same name.
V1 - array size = 2 (2 cores)
V2 - array size = 1 (1 core)
V3 - array size = 2 (2 cores)
V4 - array size = 1 (1 core)
HSEM added to GHOST_PERIS
2024-04-08 13:38:36 +02:00
Michael Zill
e029a55f7a
Arrayfied v2, v3, v4 - removed enums, aligned yaml structure
...
The following list shows the different hsem yaml versions and the coresponding chips.
wba is on purpose not included at is complex and very different from the others which will
also make the HSEM implementation in the HAL more complex. I leave this out for another PR.
h747
wb55
h735
h7b3
h753v
h753
h743
h743v
wl5x_cm0p
wl5x_cm4
wle5
2024-04-08 13:36:40 +02:00
Michael Zill
6ba934d366
Remote debug code
2024-04-08 13:36:40 +02:00
Michael Zill
d1f1f4bfeb
Arrayfied v1 and v8 - preliminary fix for missing HSEM in Cube XML
2024-04-08 13:36:40 +02:00
Michael Zill
44967f3776
Initial add
2024-04-08 13:36:40 +02:00
eZio Pan
60398cad51
move "UID" to "GHOST_PERIS"
2024-04-06 22:07:19 +08:00
David Lawrence
d258cf858d
Split STM32G4 flash peripheral by device category
2024-04-05 12:10:59 -04:00
Dario Nieuwenhuis
73ab4d3f67
Merge pull request #451 from eZioPan/lptim-v2
...
lptim v2
2024-04-05 11:28:05 +00:00
qff233
cf5ab0f41b
Fix ADC resolution enum for stm32g4
2024-04-05 01:13:23 +08:00
eZio Pan
d9625637f2
add lptim_v2a to chips.rs
2024-04-05 00:06:01 +08:00
eZio Pan
029320446b
add lptim to u5 wba
2024-04-04 23:29:48 +08:00
eZio Pan
59cb83596f
add to chips.rs
2024-04-04 23:04:21 +08:00
Romain Goyet
e7b493c058
Add TSC support for STM32WBA
2024-04-02 20:30:35 -04:00
d15d4096a6
update adc and syscfg
2024-03-20 11:20:58 -04:00
Dario Nieuwenhuis
d7462d805e
Merge pull request #432 from caleb-garrett/cryp
...
CRYP perimap order
2024-02-29 15:17:40 +00:00
Caleb Garrett
c6e42fff7c
Correct CRYP perimap order.
2024-02-27 10:57:20 -05:00
eZio Pan
81d3b42d80
rename
2024-02-27 20:12:05 +08:00
eZio Pan
147d16f2e6
add to chips.rs
2024-02-27 20:03:37 +08:00
Dario Nieuwenhuis
0e12074b14
Merge pull request #427 from eZioPan/comp_h
...
COMP for H7 and H5
2024-02-27 11:10:30 +00:00
eZio Pan
4e8b96a7f0
add to chips.rs
2024-02-27 11:34:13 +08:00
eZio Pan
c5ffacbb1f
add comp_h7 to chips.rs
2024-02-27 11:07:16 +08:00
Caleb Garrett
1a27c693ab
Refine cryp perimap.
2024-02-26 16:15:42 -05:00
Dario Nieuwenhuis
f03c296cc3
Merge pull request #425 from caleb-garrett/cryp_v3
...
Add cryp v3
2024-02-26 19:23:54 +00:00
Caleb Garrett
4eccaefb0d
Add cryp v3
2024-02-26 13:59:20 -05:00
Dario Nieuwenhuis
37fa6072b3
Merge branch 'main' into otfdec_v1
2024-02-26 13:09:22 +01:00
eZio Pan
46212f468b
add PKA RAM access
2024-02-26 15:26:52 +08:00
eZio Pan
a1da820e5b
add to chips.rs
2024-02-26 14:24:50 +08:00
Dario Nieuwenhuis
d492f504e7
Merge pull request #396 from eZioPan/sai_h5_l5_u5
...
sai h5 l5 u5
2024-02-25 22:48:05 +01:00
Dario Nieuwenhuis
a54b019995
Merge pull request #414 from eZioPan/fmc_v4
...
fmc v4 (for H5)
2024-02-25 22:47:24 +01:00
Dario Nieuwenhuis
f17c5df815
Merge branch 'main' into i3c_v1
2024-02-25 22:46:58 +01:00
Dario Nieuwenhuis
22da1f4a0a
Merge branch 'main' into aes_v3
2024-02-25 22:46:31 +01:00
Dario Nieuwenhuis
8679677e81
Merge pull request #418 from eZioPan/saes_v1
...
saes v1
2024-02-25 21:42:14 +00:00
eZio Pan
2a8bc99b55
add pka to chips.rs
2024-02-25 21:48:39 +08:00
eZio Pan
213784d231
add saes to chip.rs
2024-02-25 19:38:56 +08:00
eZio Pan
12810e9455
add aes_v3b to chips.rs
2024-02-25 13:51:20 +08:00
eZio Pan
39b513b598
rename aes_u5 to aes_v3a
2024-02-25 13:14:56 +08:00
eZio Pan
99024fc817
add to chips.rs
2024-02-24 22:58:25 +08:00
eZio Pan
af02de81fd
add to chips.rs
2024-02-24 19:52:23 +08:00
eZio Pan
e4b07a5988
PDM count change
2024-02-24 19:30:44 +08:00
Dario Nieuwenhuis
755992f313
Merge pull request #407 from MaxiluxSystems/adc_h5
...
ADC support for H5
2024-02-22 21:01:36 +00:00
Dario Nieuwenhuis
f13d86cc23
Merge branch 'main' into cec
2024-02-22 19:30:51 +01:00
Torin Cooper-Bennun
23e9b3a864
ADC support for H5
2024-02-22 10:23:28 +00:00
