9 Commits

Author SHA1 Message Date
xoviat
8b8686a852 rcc: more mux and enum cleanup 2023-10-15 10:37:36 -05:00
xoviat
5d51e3b706 rcc: add more mux data 2023-10-14 17:20:25 -05:00
Dario Nieuwenhuis
e89b8cfc30 rcc: add PLL enums. 2023-10-09 02:44:42 +02:00
Dario Nieuwenhuis
6c73ffbd0b rcc: make naming consistent between "mco" and "mcosel". 2023-10-07 00:46:19 +02:00
Dario Nieuwenhuis
e701705d79 rcc: add MCOPRE enum for h5, h7. 2023-10-07 00:10:08 +02:00
Dario Nieuwenhuis
11256dc370 chiptool fmt. 2023-10-07 00:09:14 +02:00
Matt Ickstadt
60d034f9fa RCC: unify LSEDRV enum variant names and descriptions
Now the only differences are the series which have swapped medium low/high bits: F0, F3v2, F3, F7, and H7_RM0433.
2023-10-05 10:56:02 -05:00
Matt Ickstadt
32b3bd75ea H7: Fix LSEDRV bits of RM0433
Errata ES0392 2.2.14
2023-10-05 10:37:07 -05:00
Matt Ickstadt
568a7058a1 Create rcc_h7rm04ee.yaml as a copy of rcc_h7.yaml 2023-10-05 10:35:43 -05:00