David Lawrence
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bef34f5e8a
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Add 8 and 16 bit wide SPI data registers
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2024-04-05 14:07:39 -04:00 |
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David Lawrence
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d258cf858d
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Split STM32G4 flash peripheral by device category
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2024-04-05 12:10:59 -04:00 |
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Dario Nieuwenhuis
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73ab4d3f67
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Merge pull request #451 from eZioPan/lptim-v2
lptim v2
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2024-04-05 11:28:05 +00:00 |
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eZio Pan
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16b4fd12c1
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merge lptim CCMR output and input
move overlap to field level
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2024-04-05 15:01:07 +08:00 |
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qff233
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a2c4423ed5
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Fix DMA enum
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2024-04-05 13:07:24 +08:00 |
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qff233
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408a20839a
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Fix serial registers for stm32g4 serial:q
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2024-04-05 12:58:59 +08:00 |
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eZio Pan
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f789074a4b
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merge input mode and output mode
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2024-04-05 12:36:35 +08:00 |
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qff233
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9dfb42cd91
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Fix ADC sample_time enum for stm32g4
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2024-04-05 01:39:04 +08:00 |
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qff233
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cf5ab0f41b
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Fix ADC resolution enum for stm32g4
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2024-04-05 01:13:23 +08:00 |
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eZio Pan
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d9625637f2
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add lptim_v2a to chips.rs
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2024-04-05 00:06:01 +08:00 |
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eZio Pan
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8b036d7f87
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add enum
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2024-04-04 23:47:06 +08:00 |
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eZio Pan
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c25b401647
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extract lptim_v2a from l5
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2024-04-04 23:40:12 +08:00 |
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eZio Pan
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029320446b
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add lptim to u5 wba
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2024-04-04 23:29:48 +08:00 |
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eZio Pan
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59cb83596f
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add to chips.rs
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2024-04-04 23:04:21 +08:00 |
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eZio Pan
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8bd35deb56
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add enum
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2024-04-04 23:04:21 +08:00 |
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eZio Pan
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8bfe8b90f4
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split lptim and bug fix ...
LPTIM4 has less function, so it's a LPTIM_Basic, the reset are full feature, thus a LPTIM_Adv.
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2024-04-04 23:04:21 +08:00 |
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eZio Pan
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43e02bf3ec
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apply transform
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2024-04-04 23:04:21 +08:00 |
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eZio Pan
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ac23a24b9b
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extract lptim_v2h5 from h573 lptim1
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2024-04-04 23:04:21 +08:00 |
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Karun Koppula
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ad31d48657
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Fix mislabeling for h7ab octospi rcc registers
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2024-04-03 13:16:08 -04:00 |
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Karun Koppula
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c4be0da68c
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updated l4plus and l5 rcc registers
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2024-04-02 15:05:12 -04:00 |
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eZio Pan
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a671657453
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add enums
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2024-04-01 13:20:00 +08:00 |
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eZio Pan
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187a8d68af
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apply transform
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2024-03-31 17:14:34 +08:00 |
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eZio Pan
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b87360cd61
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extract
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2024-03-31 15:37:00 +08:00 |
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eZio Pan
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868dec1630
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timer: add 16-bit register info
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2024-03-13 01:11:26 +08:00 |
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eZio Pan
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cc525f1b25
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timer: remove PSC fieldset
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2024-03-13 01:06:29 +08:00 |
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eZio Pan
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f0532de10a
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cordic: add scale enum
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2024-03-13 01:06:16 +08:00 |
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eZio Pan
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ec4e31491e
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update desc
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2024-03-07 01:41:36 +08:00 |
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eZio Pan
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f0d4f717ea
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merge enums
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2024-03-07 01:40:36 +08:00 |
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Torin Cooper-Bennun
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d1f376978d
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fix ADC, DAC clock muxes for H5, U5
the clock selection bit is named ADCDACSEL, shared between all ADCs and
DACs
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2024-03-04 10:52:06 +00:00 |
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Dario Nieuwenhuis
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e7f91751fb
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rcc/c0: sysdiv doesn't exist.
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2024-03-03 23:50:04 +01:00 |
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Dario Nieuwenhuis
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59bb84fbcb
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rcc/c0: fix HSI -> HSISYS/HSIKER
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2024-03-03 23:50:04 +01:00 |
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Dario Nieuwenhuis
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448e82b56a
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rcc/c0: consistencify HSI48 -> HSI
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2024-03-03 23:44:12 +01:00 |
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Dario Nieuwenhuis
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114c075601
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rcc/g0: unify USARTxSEL
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2024-03-03 23:43:23 +01:00 |
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Dario Nieuwenhuis
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6911e21bfd
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chiptool fmt.
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2024-03-03 23:43:11 +01:00 |
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Dario Nieuwenhuis
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d67103f97f
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More accurate USB muxes.
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2024-03-01 22:50:31 +01:00 |
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eZio Pan
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409019e987
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add PGA_GAIN enum, rename OPAEN
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2024-02-28 23:34:57 +08:00 |
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eZio Pan
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dd7fb87c83
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remove 32-bit fieldset from TIM
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2024-02-28 16:33:52 +08:00 |
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eZio Pan
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d9353ac72e
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tim fix: move BIE from GP16 to ADV
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2024-02-28 16:29:03 +08:00 |
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Torin Cooper-Bennun
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435ed7b163
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can_fdcan: add enum for tfqm
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2024-02-27 14:57:06 +00:00 |
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eZio Pan
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81d3b42d80
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rename
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2024-02-27 20:12:05 +08:00 |
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eZio Pan
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69c3921fc3
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add enum
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2024-02-27 20:03:37 +08:00 |
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eZio Pan
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cb9c35bb4b
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branch from opamp_h7 to h5
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2024-02-27 20:03:37 +08:00 |
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eZio Pan
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3447a8f6eb
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add enum
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2024-02-27 20:03:37 +08:00 |
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eZio Pan
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57b221bf09
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apply transform and remove OPAMP2
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2024-02-27 20:03:37 +08:00 |
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eZio Pan
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6fdbf26a5c
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extract
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2024-02-27 20:03:37 +08:00 |
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Dario Nieuwenhuis
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0e12074b14
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Merge pull request #427 from eZioPan/comp_h
COMP for H7 and H5
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2024-02-27 11:10:30 +00:00 |
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eZio Pan
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edad32f27e
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replace un-renderable character
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2024-02-27 11:44:10 +08:00 |
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eZio Pan
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35e6e284ab
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add enum
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2024-02-27 11:33:14 +08:00 |
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eZio Pan
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dc6e928e11
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apply transform
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2024-02-27 11:22:11 +08:00 |
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eZio Pan
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abe30cc151
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extract
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2024-02-27 11:14:21 +08:00 |
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