add enum

data/registers/lptim_v2h5.yaml

@@ -80,10 +80,14 @@ block/OC_Adv:
     description: LPTIM interrupt enable register.
     byte_offset: 8
     fieldset: DIER_OC_Adv
-  - name: CCMR1
+  - name: CCMR_IC
     description: LPTIM capture/compare mode register 1.
     byte_offset: 44
-    fieldset: CCMR1
+    fieldset: CCMR_IC
+  - name: CCMR_OC
+    description: LPTIM capture/compare mode register 1.
+    byte_offset: 44
+    fieldset: CCMR_OC
 block/OC_Basic:
   items:
   - name: ISR
@@ -105,8 +109,32 @@ fieldset/ARR:
     description: Auto reload value ARR is the autoreload value for the LPTIM. This value must be strictly greater than the CCRx[15:0] value.
     bit_offset: 0
     bit_size: 16
-fieldset/CCMR1:
-  description: LPTIM capture/compare mode register 1.
+fieldset/CCMR_IC:
+  extends: CCMR_partial
+  description: LPTIM input capture mode register 1.
+  fields:
+  - name: CCP
+    description: Capture/compare 1 output polarity. Only bit2 is used to set polarity when output mode is enabled, bit3 is don't care. This field is used to select the IC1 polarity for capture operations.
+    bit_offset: 2
+    bit_size: 2
+    array:
+      len: 2
+      stride: 16
+    enum: CCP_IC
+fieldset/CCMR_OC:
+  extends: CCMR_partial
+  description: LPTIM output compare mode register 1.
+  fields:
+  - name: CCP
+    description: Capture/compare 1 output polarity. Only bit2 is used to set polarity when output mode is enabled, bit3 is don't care. This field is used to select the IC1 polarity for capture operations.
+    bit_offset: 2
+    bit_size: 2
+    array:
+      len: 2
+      stride: 16
+    enum: CCP_OC
+fieldset/CCMR_partial:
+  description: internal use only - common fields between CCMR input mode and output mode
   fields:
   - name: CCSEL
     description: Capture/compare 1 selection This bitfield defines the direction of the channel input (capture) or output mode.
@@ -115,6 +143,7 @@ fieldset/CCMR1:
     array:
       len: 2
       stride: 16
+    enum: CCSEL
   - name: CCE
     description: Capture/compare 1 output enable. This bit determines if a capture of the counter value can actually be done into the input capture/compare register 1 (LPTIM_CCR1) or not.
     bit_offset: 1
@@ -122,13 +151,6 @@ fieldset/CCMR1:
     array:
       len: 2
       stride: 16
-  - name: CCP
-    description: Capture/compare 1 output polarity. Only bit2 is used to set polarity when output mode is enabled, bit3 is don't care. This field is used to select the IC1 polarity for capture operations.
-    bit_offset: 2
-    bit_size: 2
-    array:
-      len: 2
-      stride: 16
   - name: ICPSC
     description: Input capture 1 prescaler This bitfield defines the ratio of the prescaler acting on the CC1 input (IC1).
     bit_offset: 8
@@ -136,6 +158,7 @@ fieldset/CCMR1:
     array:
       len: 2
       stride: 16
+    enum: Filter
   - name: ICF
     description: Input capture 1 filter This bitfield defines the number of consecutive equal samples that should be detected when a level change occurs on an external input capture signal before it is considered as a valid level transition. An internal clock source must be present to use this feature.
     bit_offset: 12
@@ -143,6 +166,7 @@ fieldset/CCMR1:
     array:
       len: 2
       stride: 16
+    enum: Filter
 fieldset/CCR:
   description: LPTIM compare register 1.
   fields:
@@ -157,22 +181,27 @@ fieldset/CFGR:
     description: Clock selector The CKSEL bit selects which clock source the LPTIM uses:.
     bit_offset: 0
     bit_size: 1
+    enum: CKSEL
   - name: CKPOL
     description: 'Clock Polarity When the LPTIM is clocked by an external clock source, CKPOL bits is used to configure the active edge or edges used by the counter: If the LPTIM is configured in Encoder mode (ENC bit is set), the encoder sub-mode 1 is active. If the LPTIM is configured in Encoder mode (ENC bit is set), the encoder sub-mode 2 is active. Refer to for more details about Encoder mode sub-modes.'
     bit_offset: 1
     bit_size: 2
+    enum: CKPOL
   - name: CKFLT
     description: Configurable digital filter for external clock The CKFLT value sets the number of consecutive equal samples that should be detected when a level change occurs on an external clock signal before it is considered as a valid level transition. An internal clock source must be present to use this feature.
     bit_offset: 3
     bit_size: 2
+    enum: Filter
   - name: TRGFLT
     description: Configurable digital filter for trigger The TRGFLT value sets the number of consecutive equal samples that should be detected when a level change occurs on an internal trigger before it is considered as a valid level transition. An internal clock source must be present to use this feature.
     bit_offset: 6
     bit_size: 2
+    enum: Filter
   - name: PRESC
     description: Clock prescaler The PRESC bits configure the prescaler division factor. It can be one among the following division factors:.
     bit_offset: 9
     bit_size: 3
+    enum: PRESC
   - name: TRIGSEL
     description: 'Trigger selector The TRIGSEL bits select the trigger source that serves as a trigger event for the LPTIM among the below 8 available sources: See for details.'
     bit_offset: 13
@@ -181,6 +210,7 @@ fieldset/CFGR:
     description: Trigger enable and polarity The TRIGEN bits controls whether the LPTIM counter is started by an external trigger or not. If the external trigger option is selected, three configurations are possible for the trigger active edge:.
     bit_offset: 17
     bit_size: 2
+    enum: TRIGEN
   - name: TIMOUT
     description: Timeout enable The TIMOUT bit controls the Timeout feature.
     bit_offset: 19
@@ -610,3 +640,94 @@ fieldset/RCR:
     description: Repetition register value REP is the repetition value for the LPTIM.
     bit_offset: 0
     bit_size: 8
+enum/CCP_IC:
+  bit_size: 2
+  variants:
+  - name: Rising
+    value: 0
+  - name: Falling
+    value: 1
+  - name: Both
+    value: 3
+enum/CCP_OC:
+  bit_size: 2
+  variants:
+  - name: ActiveHigh
+    value: 0
+  - name: ActiveLow
+    value: 1
+enum/CCSEL:
+  bit_size: 1
+  variants:
+  - name: OutputCompare
+    description: channel is configured in output PWM mode
+    value: 0
+  - name: InputCapture
+    description: channel is configured in input capture mode
+    value: 1
+enum/CKPOL:
+  bit_size: 2
+  variants:
+  - name: Rising
+    description: the rising edge is the active edge used for counting. If the LPTIM is configured in Encoder mode (ENC bit is set), the encoder sub-mode 1 is active.
+    value: 0
+  - name: Falling
+    description: the falling edge is the active edge used for counting. If the LPTIM is configured in Encoder mode (ENC bit is set), the encoder sub-mode 2 is active.
+    value: 1
+  - name: Both
+    description: both edges are active edges. When both external clock signal edges are considered active ones, the LPTIM must also be clocked by an internal clock source with a frequency equal to at least four times the external clock frequency. If the LPTIM is configured in Encoder mode (ENC bit is set), the encoder sub-mode 3 is active.
+    value: 2
+enum/CKSEL:
+  bit_size: 1
+  variants:
+  - name: Internal
+    description: LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)
+    value: 0
+  - name: External
+    description: LPTIM is clocked by an external clock source through the LPTIM external Input1
+    value: 1
+enum/Filter:
+  bit_size: 2
+  variants:
+  - name: Count1
+    value: 0
+  - name: Count2
+    value: 1
+  - name: Count4
+    value: 2
+  - name: Count8
+    value: 3
+enum/PRESC:
+  bit_size: 3
+  variants:
+  - name: Div1
+    value: 0
+  - name: Div2
+    value: 1
+  - name: Div4
+    value: 2
+  - name: Div8
+    value: 3
+  - name: Div16
+    value: 4
+  - name: Div32
+    value: 5
+  - name: Div64
+    value: 6
+  - name: Div128
+    value: 7
+enum/TRIGEN:
+  bit_size: 2
+  variants:
+  - name: Software
+    description: software trigger (counting start is initiated by software)
+    value: 0
+  - name: RisingEdge
+    description: rising edge is the active edge
+    value: 1
+  - name: FallingEdge
+    description: falling edge is the active edge
+    value: 2
+  - name: BothEdge
+    description: both edges are active edges
+    value: 3