33 Commits

Author SHA1 Message Date
Bob McWhirter
10a1de11b1 Split TSEL back up. They are distinct. 2021-05-27 16:19:35 -04:00
Bob McWhirter
26e98df986 DAC v2-ish regs. 2021-05-27 16:16:41 -04:00
Bob McWhirter
627ec79b3d Add i2c v1 reg block. 2021-05-25 10:53:29 -04:00
Thales Fragoso
84b6d351dc Add H7 DBGMCU 2021-05-21 19:55:56 -03:00
Thales Fragoso
e101180bb0 Remove duplicates from H7 FLASH 2021-05-21 19:55:56 -03:00
Thales Fragoso
15bc0b7340 H7: Add FLASH and PWR 2021-05-21 19:55:56 -03:00
Thales Fragoso
2dda36bd49 H7 RCC: Make more arrays 2021-05-21 19:55:56 -03:00
Thales Fragoso
4199b328ee Add H7 RCC 2021-05-21 19:55:55 -03:00
Bob McWhirter
9dd8da11d4 It's just a high-latency file... 2021-05-21 13:53:06 -04:00
Bob McWhirter
4472e6e81c Move v3 to v2 because they are identical, but replace with f7x variant due to better docs. 2021-05-21 13:45:52 -04:00
Dario Nieuwenhuis
3c43f87999 Merge pull request #26 from lulf/stm32l0-rcc
Add RCC register block for STM32L0
2021-05-21 17:59:46 +02:00
Dario Nieuwenhuis
8ea824f9b7 Merge pull request #27 from bobmcwhirter/i2c
Add I2C v3 (l4+/h7)
2021-05-21 17:52:07 +02:00
Bob McWhirter
9ff282e2a4 Add I2C v3 (l4+/h7) 2021-05-21 11:49:09 -04:00
Ulf Lilleengen
2ff87b75ce Add RCC register block for STM32L0 2021-05-20 13:26:25 +02:00
Dario Nieuwenhuis
da67ddf088 Merge pull request #25 from lulf/stm32l0-syscfg
Add SYSCFG register mapping for stm32l0 family
2021-05-19 11:22:33 +02:00
Ulf Lilleengen
a942bdfbad Add SYSCFG register mapping for stm32l0 family 2021-05-19 10:31:58 +02:00
Bob McWhirter
af21df21a5 Extract SPIv3 minus I2S. 2021-05-17 09:40:43 -04:00
Dario Nieuwenhuis
abf5d3f2a2 Add usart v2 2021-05-17 01:53:12 +02:00
Dario Nieuwenhuis
5e59f22819 dma_v2: merge ISR and IFCR fieldsets 2021-05-16 02:53:43 +02:00
Thales Fragoso
74ab5e93c8 Implement h7 syscfg 2021-05-08 00:43:48 -03:00
Bob McWhirter
997900038d Add SPI v1. 2021-05-07 15:55:48 -04:00
Dario Nieuwenhuis
350d7cb38d Merge pull request #16 from bobmcwhirter/spi_v2
SPI v2 first draft.
2021-05-07 20:37:37 +02:00
Bob McWhirter
1a7fde6868 Better SPI v2. 2021-05-07 13:43:48 -04:00
Bob McWhirter
0de8be5be4 SPI v2 first draft. 2021-05-07 11:27:36 -04:00
Thales Fragoso
b993c3ad41 Fix arrayizing problem in transform 2021-05-05 23:22:40 -03:00
Thales Fragoso
8202642b61 Initial sdmmc_v2 support 2021-05-05 23:22:40 -03:00
Dario Nieuwenhuis
cfc4e2167e Add version to exti 2021-05-06 02:36:46 +02:00
Bob McWhirter
ea80d8434b Widen the bitsize on the EXTICR. 2021-05-04 14:22:46 -04:00
Bob McWhirter
bf7577f555 Try again for L4 SYSCFG. 2021-05-04 14:07:42 -04:00
Bob McWhirter
270aeae26d Extract and clean up SYSCFG for L4. 2021-05-04 11:01:58 -04:00
Bob McWhirter
88db0b0a61 Remove the DR. 2021-04-23 14:53:13 -04:00
Bob McWhirter
b6c102ec4c RNG v1. 2021-04-23 14:43:21 -04:00
Dario Nieuwenhuis
69b1c6a96c Add the thing 2021-04-15 04:42:04 +02:00