commit
f846335533
@ -25,9 +25,13 @@ fieldset/CSR:
|
|||||||
bit_size: 4
|
bit_size: 4
|
||||||
enum: PRECISION
|
enum: PRECISION
|
||||||
- name: SCALE
|
- name: SCALE
|
||||||
description: Scaling factor (2^-n for arguments, 2^n for results).
|
description: |-
|
||||||
|
Scaling factor.
|
||||||
|
Input value has been multiplied by 2^(-n) before for argument.
|
||||||
|
Output value will need to be multiplied by 2^n later for results.
|
||||||
bit_offset: 8
|
bit_offset: 8
|
||||||
bit_size: 3
|
bit_size: 3
|
||||||
|
enum: Scale
|
||||||
- name: IEN
|
- name: IEN
|
||||||
description: Enable interrupt.
|
description: Enable interrupt.
|
||||||
bit_offset: 16
|
bit_offset: 16
|
||||||
@ -154,6 +158,33 @@ enum/PRECISION:
|
|||||||
- name: Iters60
|
- name: Iters60
|
||||||
description: 60 iterations.
|
description: 60 iterations.
|
||||||
value: 15
|
value: 15
|
||||||
|
enum/Scale:
|
||||||
|
bit_size: 3
|
||||||
|
variants:
|
||||||
|
- name: A1_R1
|
||||||
|
description: Argument multiplied by 1, result multiplied by 1
|
||||||
|
value: 0
|
||||||
|
- name: A1o2_R2
|
||||||
|
description: Argument multiplied by 1/2, result multiplied by 2
|
||||||
|
value: 1
|
||||||
|
- name: A1o4_R4
|
||||||
|
description: Argument multiplied by 1/4, result multiplied by 4
|
||||||
|
value: 2
|
||||||
|
- name: A1o8_R8
|
||||||
|
description: Argument multiplied by 1/8, result multiplied by 8
|
||||||
|
value: 3
|
||||||
|
- name: A1o16_R16
|
||||||
|
description: Argument multiplied by 1/16, result multiplied by 16
|
||||||
|
value: 4
|
||||||
|
- name: A1o32_R32
|
||||||
|
description: Argument multiplied by 1/32, result multiplied by 32
|
||||||
|
value: 5
|
||||||
|
- name: A1o64_R64
|
||||||
|
description: Argument multiplied by 1/64, result multiplied by 64
|
||||||
|
value: 6
|
||||||
|
- name: A1o128_R128
|
||||||
|
description: Argument multiplied by 1/128, result multiplied by 128
|
||||||
|
value: 7
|
||||||
enum/Size:
|
enum/Size:
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
variants:
|
variants:
|
||||||
|
@ -5,6 +5,7 @@ block/TIM_1CH:
|
|||||||
- name: CR1
|
- name: CR1
|
||||||
description: control register 1
|
description: control register 1
|
||||||
byte_offset: 0
|
byte_offset: 0
|
||||||
|
bit_size: 16
|
||||||
fieldset: CR1_1CH
|
fieldset: CR1_1CH
|
||||||
- name: DIER
|
- name: DIER
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
@ -18,6 +19,7 @@ block/TIM_1CH:
|
|||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
|
bit_size: 16
|
||||||
fieldset: EGR_1CH
|
fieldset: EGR_1CH
|
||||||
- name: CCMR_Input
|
- name: CCMR_Input
|
||||||
description: capture/compare mode register 1 (input mode)
|
description: capture/compare mode register 1 (input mode)
|
||||||
@ -73,6 +75,7 @@ block/TIM_2CH:
|
|||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
|
bit_size: 16
|
||||||
fieldset: EGR_2CH
|
fieldset: EGR_2CH
|
||||||
- name: CCMR_Input
|
- name: CCMR_Input
|
||||||
description: capture/compare mode register 1 (input mode)
|
description: capture/compare mode register 1 (input mode)
|
||||||
@ -121,6 +124,7 @@ block/TIM_CORE:
|
|||||||
- name: CR1
|
- name: CR1
|
||||||
description: control register 1
|
description: control register 1
|
||||||
byte_offset: 0
|
byte_offset: 0
|
||||||
|
bit_size: 16
|
||||||
fieldset: CR1_CORE
|
fieldset: CR1_CORE
|
||||||
- name: DIER
|
- name: DIER
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
@ -134,6 +138,7 @@ block/TIM_CORE:
|
|||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
|
bit_size: 16
|
||||||
fieldset: EGR_CORE
|
fieldset: EGR_CORE
|
||||||
- name: CNT
|
- name: CNT
|
||||||
description: counter
|
description: counter
|
||||||
@ -142,7 +147,7 @@ block/TIM_CORE:
|
|||||||
- name: PSC
|
- name: PSC
|
||||||
description: prescaler
|
description: prescaler
|
||||||
byte_offset: 40
|
byte_offset: 40
|
||||||
fieldset: PSC_CORE
|
bit_size: 16
|
||||||
- name: ARR
|
- name: ARR
|
||||||
description: auto-reload register
|
description: auto-reload register
|
||||||
byte_offset: 44
|
byte_offset: 44
|
||||||
@ -154,6 +159,7 @@ block/TIM_GP16:
|
|||||||
- name: CR1
|
- name: CR1
|
||||||
description: control register 1
|
description: control register 1
|
||||||
byte_offset: 0
|
byte_offset: 0
|
||||||
|
bit_size: 16
|
||||||
fieldset: CR1_GP16
|
fieldset: CR1_GP16
|
||||||
- name: CR2
|
- name: CR2
|
||||||
description: control register 2
|
description: control register 2
|
||||||
@ -175,6 +181,7 @@ block/TIM_GP16:
|
|||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
|
bit_size: 16
|
||||||
fieldset: EGR_GP16
|
fieldset: EGR_GP16
|
||||||
- name: CCMR_Input
|
- name: CCMR_Input
|
||||||
description: capture/compare mode register 1-2 (input mode)
|
description: capture/compare mode register 1-2 (input mode)
|
||||||
@ -667,13 +674,6 @@ fieldset/EGR_GP16:
|
|||||||
description: Trigger generation
|
description: Trigger generation
|
||||||
bit_offset: 6
|
bit_offset: 6
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/PSC_CORE:
|
|
||||||
description: prescaler
|
|
||||||
fields:
|
|
||||||
- name: PSC
|
|
||||||
description: Prescaler value
|
|
||||||
bit_offset: 0
|
|
||||||
bit_size: 16
|
|
||||||
fieldset/SMCR_2CH:
|
fieldset/SMCR_2CH:
|
||||||
description: slave mode control register
|
description: slave mode control register
|
||||||
fields:
|
fields:
|
||||||
|
@ -5,6 +5,7 @@ block/TIM_1CH:
|
|||||||
- name: CR1
|
- name: CR1
|
||||||
description: control register 1
|
description: control register 1
|
||||||
byte_offset: 0
|
byte_offset: 0
|
||||||
|
bit_size: 16
|
||||||
fieldset: CR1_1CH
|
fieldset: CR1_1CH
|
||||||
- name: DIER
|
- name: DIER
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
@ -18,6 +19,7 @@ block/TIM_1CH:
|
|||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
|
bit_size: 16
|
||||||
fieldset: EGR_1CH
|
fieldset: EGR_1CH
|
||||||
- name: CCMR_Input
|
- name: CCMR_Input
|
||||||
description: capture/compare mode register 1 (input mode)
|
description: capture/compare mode register 1 (input mode)
|
||||||
@ -73,6 +75,7 @@ block/TIM_1CH_CMP:
|
|||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
|
bit_size: 16
|
||||||
fieldset: EGR_1CH_CMP
|
fieldset: EGR_1CH_CMP
|
||||||
- name: CCER
|
- name: CCER
|
||||||
description: capture/compare enable register
|
description: capture/compare enable register
|
||||||
@ -81,6 +84,7 @@ block/TIM_1CH_CMP:
|
|||||||
- name: RCR
|
- name: RCR
|
||||||
description: repetition counter register
|
description: repetition counter register
|
||||||
byte_offset: 48
|
byte_offset: 48
|
||||||
|
bit_size: 16
|
||||||
fieldset: RCR_1CH_CMP
|
fieldset: RCR_1CH_CMP
|
||||||
- name: BDTR
|
- name: BDTR
|
||||||
description: break and dead-time register
|
description: break and dead-time register
|
||||||
@ -122,6 +126,7 @@ block/TIM_2CH:
|
|||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
|
bit_size: 16
|
||||||
fieldset: EGR_2CH
|
fieldset: EGR_2CH
|
||||||
- name: CCMR_Input
|
- name: CCMR_Input
|
||||||
description: capture/compare mode register 1 (input mode)
|
description: capture/compare mode register 1 (input mode)
|
||||||
@ -176,6 +181,7 @@ block/TIM_2CH_CMP:
|
|||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
|
bit_size: 16
|
||||||
fieldset: EGR_2CH_CMP
|
fieldset: EGR_2CH_CMP
|
||||||
- name: CCMR_Input
|
- name: CCMR_Input
|
||||||
description: capture/compare mode register 1 (input mode)
|
description: capture/compare mode register 1 (input mode)
|
||||||
@ -225,6 +231,7 @@ block/TIM_ADV:
|
|||||||
- name: CR1
|
- name: CR1
|
||||||
description: control register 1
|
description: control register 1
|
||||||
byte_offset: 0
|
byte_offset: 0
|
||||||
|
bit_size: 16
|
||||||
fieldset: CR1_GP16
|
fieldset: CR1_GP16
|
||||||
- name: CR2
|
- name: CR2
|
||||||
description: control register 2
|
description: control register 2
|
||||||
@ -246,6 +253,7 @@ block/TIM_ADV:
|
|||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
|
bit_size: 16
|
||||||
fieldset: EGR_ADV
|
fieldset: EGR_ADV
|
||||||
- name: CCMR_Input
|
- name: CCMR_Input
|
||||||
description: capture/compare mode register 1-2 (input mode)
|
description: capture/compare mode register 1-2 (input mode)
|
||||||
@ -268,6 +276,7 @@ block/TIM_ADV:
|
|||||||
- name: RCR
|
- name: RCR
|
||||||
description: repetition counter register
|
description: repetition counter register
|
||||||
byte_offset: 48
|
byte_offset: 48
|
||||||
|
bit_size: 16
|
||||||
fieldset: RCR_ADV
|
fieldset: RCR_ADV
|
||||||
- name: CCR
|
- name: CCR
|
||||||
description: capture/compare register x (x=1-4)
|
description: capture/compare register x (x=1-4)
|
||||||
@ -329,6 +338,7 @@ block/TIM_CORE:
|
|||||||
- name: CR1
|
- name: CR1
|
||||||
description: control register 1
|
description: control register 1
|
||||||
byte_offset: 0
|
byte_offset: 0
|
||||||
|
bit_size: 16
|
||||||
fieldset: CR1_CORE
|
fieldset: CR1_CORE
|
||||||
- name: DIER
|
- name: DIER
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
@ -342,6 +352,7 @@ block/TIM_CORE:
|
|||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
|
bit_size: 16
|
||||||
fieldset: EGR_CORE
|
fieldset: EGR_CORE
|
||||||
- name: CNT
|
- name: CNT
|
||||||
description: counter
|
description: counter
|
||||||
@ -350,7 +361,7 @@ block/TIM_CORE:
|
|||||||
- name: PSC
|
- name: PSC
|
||||||
description: prescaler
|
description: prescaler
|
||||||
byte_offset: 40
|
byte_offset: 40
|
||||||
fieldset: PSC_CORE
|
bit_size: 16
|
||||||
- name: ARR
|
- name: ARR
|
||||||
description: auto-reload register
|
description: auto-reload register
|
||||||
byte_offset: 44
|
byte_offset: 44
|
||||||
@ -362,6 +373,7 @@ block/TIM_GP16:
|
|||||||
- name: CR1
|
- name: CR1
|
||||||
description: control register 1
|
description: control register 1
|
||||||
byte_offset: 0
|
byte_offset: 0
|
||||||
|
bit_size: 16
|
||||||
fieldset: CR1_GP16
|
fieldset: CR1_GP16
|
||||||
- name: CR2
|
- name: CR2
|
||||||
description: control register 2
|
description: control register 2
|
||||||
@ -383,6 +395,7 @@ block/TIM_GP16:
|
|||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
|
bit_size: 16
|
||||||
fieldset: EGR_GP16
|
fieldset: EGR_GP16
|
||||||
- name: CCMR_Input
|
- name: CCMR_Input
|
||||||
description: capture/compare mode register 1-2 (input mode)
|
description: capture/compare mode register 1-2 (input mode)
|
||||||
@ -1341,13 +1354,6 @@ fieldset/EGR_GP16:
|
|||||||
description: Trigger generation
|
description: Trigger generation
|
||||||
bit_offset: 6
|
bit_offset: 6
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/PSC_CORE:
|
|
||||||
description: prescaler
|
|
||||||
fields:
|
|
||||||
- name: PSC
|
|
||||||
description: Prescaler value
|
|
||||||
bit_offset: 0
|
|
||||||
bit_size: 16
|
|
||||||
fieldset/RCR_1CH_CMP:
|
fieldset/RCR_1CH_CMP:
|
||||||
description: repetition counter register
|
description: repetition counter register
|
||||||
fields:
|
fields:
|
||||||
|
@ -5,6 +5,7 @@ block/TIM_1CH:
|
|||||||
- name: CR1
|
- name: CR1
|
||||||
description: control register 1
|
description: control register 1
|
||||||
byte_offset: 0
|
byte_offset: 0
|
||||||
|
bit_size: 16
|
||||||
fieldset: CR1_1CH
|
fieldset: CR1_1CH
|
||||||
- name: DIER
|
- name: DIER
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
@ -18,6 +19,7 @@ block/TIM_1CH:
|
|||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
|
bit_size: 16
|
||||||
fieldset: EGR_1CH
|
fieldset: EGR_1CH
|
||||||
- name: CCMR_Input
|
- name: CCMR_Input
|
||||||
description: capture/compare mode register 1 (input mode)
|
description: capture/compare mode register 1 (input mode)
|
||||||
@ -80,6 +82,7 @@ block/TIM_1CH_CMP:
|
|||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
|
bit_size: 16
|
||||||
fieldset: EGR_1CH_CMP
|
fieldset: EGR_1CH_CMP
|
||||||
- name: CCER
|
- name: CCER
|
||||||
description: capture/compare enable register
|
description: capture/compare enable register
|
||||||
@ -88,6 +91,7 @@ block/TIM_1CH_CMP:
|
|||||||
- name: RCR
|
- name: RCR
|
||||||
description: repetition counter register
|
description: repetition counter register
|
||||||
byte_offset: 48
|
byte_offset: 48
|
||||||
|
bit_size: 16
|
||||||
fieldset: RCR_1CH_CMP
|
fieldset: RCR_1CH_CMP
|
||||||
- name: BDTR
|
- name: BDTR
|
||||||
description: break and dead-time register
|
description: break and dead-time register
|
||||||
@ -136,6 +140,7 @@ block/TIM_2CH:
|
|||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
|
bit_size: 16
|
||||||
fieldset: EGR_2CH
|
fieldset: EGR_2CH
|
||||||
- name: CCMR_Input
|
- name: CCMR_Input
|
||||||
description: capture/compare mode register 1 (input mode)
|
description: capture/compare mode register 1 (input mode)
|
||||||
@ -197,6 +202,7 @@ block/TIM_2CH_CMP:
|
|||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
|
bit_size: 16
|
||||||
fieldset: EGR_2CH_CMP
|
fieldset: EGR_2CH_CMP
|
||||||
- name: CCMR_Input
|
- name: CCMR_Input
|
||||||
description: capture/compare mode register 1 (input mode)
|
description: capture/compare mode register 1 (input mode)
|
||||||
@ -238,6 +244,7 @@ block/TIM_ADV:
|
|||||||
- name: CR1
|
- name: CR1
|
||||||
description: control register 1
|
description: control register 1
|
||||||
byte_offset: 0
|
byte_offset: 0
|
||||||
|
bit_size: 16
|
||||||
fieldset: CR1_GP16
|
fieldset: CR1_GP16
|
||||||
- name: CR2
|
- name: CR2
|
||||||
description: control register 2
|
description: control register 2
|
||||||
@ -259,6 +266,7 @@ block/TIM_ADV:
|
|||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
|
bit_size: 16
|
||||||
fieldset: EGR_ADV
|
fieldset: EGR_ADV
|
||||||
- name: CCMR_Input
|
- name: CCMR_Input
|
||||||
description: capture/compare mode register 1-2 (input mode)
|
description: capture/compare mode register 1-2 (input mode)
|
||||||
@ -281,6 +289,7 @@ block/TIM_ADV:
|
|||||||
- name: RCR
|
- name: RCR
|
||||||
description: repetition counter register
|
description: repetition counter register
|
||||||
byte_offset: 48
|
byte_offset: 48
|
||||||
|
bit_size: 16
|
||||||
fieldset: RCR_ADV
|
fieldset: RCR_ADV
|
||||||
- name: CCR
|
- name: CCR
|
||||||
description: capture/compare register x (x=1-4)
|
description: capture/compare register x (x=1-4)
|
||||||
@ -347,6 +356,7 @@ block/TIM_CORE:
|
|||||||
- name: CR1
|
- name: CR1
|
||||||
description: control register 1
|
description: control register 1
|
||||||
byte_offset: 0
|
byte_offset: 0
|
||||||
|
bit_size: 16
|
||||||
fieldset: CR1_CORE
|
fieldset: CR1_CORE
|
||||||
- name: DIER
|
- name: DIER
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
@ -360,6 +370,7 @@ block/TIM_CORE:
|
|||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
|
bit_size: 16
|
||||||
fieldset: EGR_CORE
|
fieldset: EGR_CORE
|
||||||
- name: CNT
|
- name: CNT
|
||||||
description: counter
|
description: counter
|
||||||
@ -368,7 +379,7 @@ block/TIM_CORE:
|
|||||||
- name: PSC
|
- name: PSC
|
||||||
description: prescaler
|
description: prescaler
|
||||||
byte_offset: 40
|
byte_offset: 40
|
||||||
fieldset: PSC_CORE
|
bit_size: 16
|
||||||
- name: ARR
|
- name: ARR
|
||||||
description: auto-reload register (Dither mode disabled)
|
description: auto-reload register (Dither mode disabled)
|
||||||
byte_offset: 44
|
byte_offset: 44
|
||||||
@ -384,6 +395,7 @@ block/TIM_GP16:
|
|||||||
- name: CR1
|
- name: CR1
|
||||||
description: control register 1
|
description: control register 1
|
||||||
byte_offset: 0
|
byte_offset: 0
|
||||||
|
bit_size: 16
|
||||||
fieldset: CR1_GP16
|
fieldset: CR1_GP16
|
||||||
- name: CR2
|
- name: CR2
|
||||||
description: control register 2
|
description: control register 2
|
||||||
@ -405,6 +417,7 @@ block/TIM_GP16:
|
|||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
|
bit_size: 16
|
||||||
fieldset: EGR_GP16
|
fieldset: EGR_GP16
|
||||||
- name: CCMR_Input
|
- name: CCMR_Input
|
||||||
description: capture/compare mode register 1-2 (input mode)
|
description: capture/compare mode register 1-2 (input mode)
|
||||||
@ -1586,13 +1599,6 @@ fieldset/EGR_GP16:
|
|||||||
description: Trigger generation
|
description: Trigger generation
|
||||||
bit_offset: 6
|
bit_offset: 6
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/PSC_CORE:
|
|
||||||
description: prescaler
|
|
||||||
fields:
|
|
||||||
- name: PSC
|
|
||||||
description: Prescaler value
|
|
||||||
bit_offset: 0
|
|
||||||
bit_size: 16
|
|
||||||
fieldset/RCR_1CH_CMP:
|
fieldset/RCR_1CH_CMP:
|
||||||
description: repetition counter register
|
description: repetition counter register
|
||||||
fields:
|
fields:
|
||||||
|
Loading…
x
Reference in New Issue
Block a user