guangzong/stm32-data
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

add enum for NAND block

Browse Source
This commit is contained in:
eZio Pan 2024-02-24 19:18:09 +08:00
parent 72aa630cf0
commit e857c9cb94
1 changed files with 10 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
data/registers/fmc_v4.yaml
View File

@ -257,10 +257,12 @@ fieldset/PCR:
description: Memory type Defines the type of device attached to the corresponding memory bank:. description: Memory type Defines the type of device attached to the corresponding memory bank:.
bit_offset: 3 bit_offset: 3
bit_size: 1 bit_size: 1
enum: PTYP
- name: PWID - name: PWID
description: Data bus width Defines the external memory device width. description: Data bus width Defines the external memory device width.
bit_offset: 4 bit_offset: 4
bit_size: 2 bit_size: 2
enum: PWID
- name: ECCEN - name: ECCEN
description: ECC computation logic enable bit. description: ECC computation logic enable bit.
bit_offset: 6 bit_offset: 6
@ -272,15 +274,12 @@ fieldset/PCR:
- name: TAR - name: TAR
description: 'ALE to RE delay Sets time from ALE low to RE low in number of AHB clock cycles (HCLK). Time is: t_ar = (TAR + SET + 2) <20> THCLK where THCLK is the HCLK clock period Note: SET is MEMSET or ATTSET according to the addressed space.' description: 'ALE to RE delay Sets time from ALE low to RE low in number of AHB clock cycles (HCLK). Time is: t_ar = (TAR + SET + 2) <20> THCLK where THCLK is the HCLK clock period Note: SET is MEMSET or ATTSET according to the addressed space.'
bit_offset: 13 bit_offset: 13
bit_size: 3 bit_size: 4
- name: TAR3
description: 'ALE to RE delay Sets time from ALE low to RE low in number of AHB clock cycles (HCLK). Time is: t_ar = (TAR + SET + 2) <20> THCLK where THCLK is the HCLK clock period Note: SET is MEMSET or ATTSET according to the addressed space.'
bit_offset: 16
bit_size: 1
- name: ECCPS - name: ECCPS
description: ECC page size Defines the page size for the extended ECC:. description: ECC page size Defines the page size for the extended ECC:.
bit_offset: 17 bit_offset: 17
bit_size: 3 bit_size: 3
enum: ECCPS
fieldset/PCSCNTR: fieldset/PCSCNTR:
description: PSRAM chip select counter register. description: PSRAM chip select counter register.
fields: fields:
@ -644,6 +643,12 @@ enum/NR:
- name: Bits13 - name: Bits13
description: 13 bits description: 13 bits
value: 2 value: 2
enum/PTYP:
bit_size: 1
variants:
- name: NAND
description: NAND flash
value: 1
enum/PWID: enum/PWID:
bit_size: 2 bit_size: 2
variants: variants: