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rcc: add MCOPRE enum for h5, h7.

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This commit is contained in:
Dario Nieuwenhuis 2023-10-07 00:10:08 +02:00
parent 11256dc370
commit e701705d79
5 changed files with 250 additions and 0 deletions
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50
data/registers/rcc_h5.yaml
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@ -1667,6 +1667,7 @@ fieldset/CFGR:
description: "MCO1 prescaler\r Set and cleared by software to configure the prescaler of the MCO1. Modification of this prescaler may generate glitches on MCO1. It is highly recommended to change this prescaler only after reset, before enabling the external oscillators and the PLLs.\r ..."
bit_offset: 18
bit_size: 4
enum: MCOPRE
- name: MCO1
description: "Microcontroller clock output 1\r Set and cleared by software. Clock source selection may generate glitches on MCO1.\r It is highly recommended to configure these bits only after reset, before enabling the external oscillators and the PLLs.\r others: reserved"
bit_offset: 22
@ -1676,6 +1677,7 @@ fieldset/CFGR:
description: "MCO2 prescaler\r Set and cleared by software to configure the prescaler of the MCO2. Modification of this prescaler may generate glitches on MCO2. It is highly recommended to change this prescaler only after reset, before enabling the external oscillators and the PLLs.\r ..."
bit_offset: 25
bit_size: 4
enum: MCOPRE
- name: MCO2
description: "microcontroller clock output 2\r Set and cleared by software. Clock source selection may generate glitches on MCO2.\r It is highly recommended to configure these bits only after reset, before enabling the external oscillators and the PLLs.\r others: reserved"
bit_offset: 29
@ -2364,6 +2366,54 @@ enum/MCO2:
- name: LSI
description: LSI selected for micro-controller clock output
value: 5
enum/MCOPRE:
bit_size: 4
variants:
- name: Div1
description: Divide by 1
value: 1
- name: Div2
description: Divide by 2
value: 2
- name: Div3
description: Divide by 3
value: 3
- name: Div4
description: Divide by 4
value: 4
- name: Div5
description: Divide by 5
value: 5
- name: Div6
description: Divide by 6
value: 6
- name: Div7
description: Divide by 7
value: 7
- name: Div8
description: Divide by 8
value: 8
- name: Div9
description: Divide by 9
value: 9
- name: Div10
description: Divide by 10
value: 10
- name: Div11
description: Divide by 11
value: 11
- name: Div12
description: Divide by 12
value: 12
- name: Div13
description: Divide by 13
value: 13
- name: Div14
description: Divide by 14
value: 14
- name: Div15
description: Divide by 15
value: 15
enum/NSPRIV:
bit_size: 1
variants:

50
data/registers/rcc_h50.yaml
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@ -951,6 +951,7 @@ fieldset/CFGR:
description: "MCO1 prescaler\r Set and cleared by software to configure the prescaler of the MCO1. Modification of this prescaler may generate glitches on MCO1. It is highly recommended to change this prescaler only after reset, before enabling the external oscillators and the PLLs.\r ..."
bit_offset: 18
bit_size: 4
enum: MCOPRE
- name: MCO1
description: "Microcontroller clock output 1\r Set and cleared by software. Clock source selection may generate glitches on MCO1.\r It is highly recommended to configure these bits only after reset, before enabling the external oscillators and the PLLs.\r others: reserved"
bit_offset: 22
@ -960,6 +961,7 @@ fieldset/CFGR:
description: "MCO2 prescaler\r Set and cleared by software to configure the prescaler of the MCO2. Modification of this prescaler may generate glitches on MCO2. It is highly recommended to change this prescaler only after reset, before enabling the external oscillators and the PLLs.\r ..."
bit_offset: 25
bit_size: 4
enum: MCOPRE
- name: MCO2
description: "microcontroller clock output 2\r Set and cleared by software. Clock source selection may generate glitches on MCO2.\r It is highly recommended to configure these bits only after reset, before enabling the external oscillators and the PLLs.\r others: reserved"
bit_offset: 29
@ -1556,6 +1558,54 @@ enum/MCO2:
- name: LSI
description: LSI selected for micro-controller clock output
value: 5
enum/MCOPRE:
bit_size: 4
variants:
- name: Div1
description: Divide by 1
value: 1
- name: Div2
description: Divide by 2
value: 2
- name: Div3
description: Divide by 3
value: 3
- name: Div4
description: Divide by 4
value: 4
- name: Div5
description: Divide by 5
value: 5
- name: Div6
description: Divide by 6
value: 6
- name: Div7
description: Divide by 7
value: 7
- name: Div8
description: Divide by 8
value: 8
- name: Div9
description: Divide by 9
value: 9
- name: Div10
description: Divide by 10
value: 10
- name: Div11
description: Divide by 11
value: 11
- name: Div12
description: Divide by 12
value: 12
- name: Div13
description: Divide by 13
value: 13
- name: Div14
description: Divide by 14
value: 14
- name: Div15
description: Divide by 15
value: 15
enum/PLLRGE:
bit_size: 2
variants:

50
data/registers/rcc_h7.yaml
View File

@ -2789,6 +2789,7 @@ fieldset/CFGR:
description: MCO1 prescaler
bit_offset: 18
bit_size: 4
enum: MCOPRE
- name: MCO1
description: Micro-controller clock output 1
bit_offset: 22
@ -2798,6 +2799,7 @@ fieldset/CFGR:
description: MCO2 prescaler
bit_offset: 25
bit_size: 4
enum: MCOPRE
- name: MCO2
description: Micro-controller clock output 2
bit_offset: 29
@ -3762,6 +3764,54 @@ enum/MCO2:
- name: LSI
description: LSI selected for micro-controller clock output
value: 5
enum/MCOPRE:
bit_size: 4
variants:
- name: Div1
description: Divide by 1
value: 1
- name: Div2
description: Divide by 2
value: 2
- name: Div3
description: Divide by 3
value: 3
- name: Div4
description: Divide by 4
value: 4
- name: Div5
description: Divide by 5
value: 5
- name: Div6
description: Divide by 6
value: 6
- name: Div7
description: Divide by 7
value: 7
- name: Div8
description: Divide by 8
value: 8
- name: Div9
description: Divide by 9
value: 9
- name: Div10
description: Divide by 10
value: 10
- name: Div11
description: Divide by 11
value: 11
- name: Div12
description: Divide by 12
value: 12
- name: Div13
description: Divide by 13
value: 13
- name: Div14
description: Divide by 14
value: 14
- name: Div15
description: Divide by 15
value: 15
enum/PLLRGE:
bit_size: 2
variants:

50
data/registers/rcc_h7ab.yaml
View File

@ -1756,6 +1756,7 @@ fieldset/CFGR:
description: MCO1 prescaler
bit_offset: 18
bit_size: 4
enum: MCOPRE
- name: MCO1
description: Micro-controller clock output 1
bit_offset: 22
@ -1765,6 +1766,7 @@ fieldset/CFGR:
description: MCO2 prescaler
bit_offset: 25
bit_size: 4
enum: MCOPRE
- name: MCO2
description: Micro-controller clock output 2
bit_offset: 29
@ -2697,6 +2699,54 @@ enum/MCO2:
- name: LSI
description: LSI selected for micro-controller clock output
value: 5
enum/MCOPRE:
bit_size: 4
variants:
- name: Div1
description: Divide by 1
value: 1
- name: Div2
description: Divide by 2
value: 2
- name: Div3
description: Divide by 3
value: 3
- name: Div4
description: Divide by 4
value: 4
- name: Div5
description: Divide by 5
value: 5
- name: Div6
description: Divide by 6
value: 6
- name: Div7
description: Divide by 7
value: 7
- name: Div8
description: Divide by 8
value: 8
- name: Div9
description: Divide by 9
value: 9
- name: Div10
description: Divide by 10
value: 10
- name: Div11
description: Divide by 11
value: 11
- name: Div12
description: Divide by 12
value: 12
- name: Div13
description: Divide by 13
value: 13
- name: Div14
description: Divide by 14
value: 14
- name: Div15
description: Divide by 15
value: 15
enum/PLLRGE:
bit_size: 2
variants:

50
data/registers/rcc_h7rm0433.yaml
View File

@ -2789,6 +2789,7 @@ fieldset/CFGR:
description: MCO1 prescaler
bit_offset: 18
bit_size: 4
enum: MCOPRE
- name: MCO1
description: Micro-controller clock output 1
bit_offset: 22
@ -2798,6 +2799,7 @@ fieldset/CFGR:
description: MCO2 prescaler
bit_offset: 25
bit_size: 4
enum: MCOPRE
- name: MCO2
description: Micro-controller clock output 2
bit_offset: 29
@ -3762,6 +3764,54 @@ enum/MCO2:
- name: LSI
description: LSI selected for micro-controller clock output
value: 5
enum/MCOPRE:
bit_size: 4
variants:
- name: Div1
description: Divide by 1
value: 1
- name: Div2
description: Divide by 2
value: 2
- name: Div3
description: Divide by 3
value: 3
- name: Div4
description: Divide by 4
value: 4
- name: Div5
description: Divide by 5
value: 5
- name: Div6
description: Divide by 6
value: 6
- name: Div7
description: Divide by 7
value: 7
- name: Div8
description: Divide by 8
value: 8
- name: Div9
description: Divide by 9
value: 9
- name: Div10
description: Divide by 10
value: 10
- name: Div11
description: Divide by 11
value: 11
- name: Div12
description: Divide by 12
value: 12
- name: Div13
description: Divide by 13
value: 13
- name: Div14
description: Divide by 14
value: 14
- name: Div15
description: Divide by 15
value: 15
enum/PLLRGE:
bit_size: 2
variants: