guangzong/stm32-data
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Merge pull request #87 from mryndzionek/stm32f1_support

Browse Source 
Updated register mapping for STM32 F1 AFIO
This commit is contained in:
Dario Nieuwenhuis 2021-09-23 18:57:52 +02:00 committed by GitHub
commit e317d781d8
1 changed files with 198 additions and 134 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

332
data/registers/afio_f1.yaml
View File

@ -1,141 +1,205 @@
---
block/AFIO: block/AFIO:
description: Alternate function I/O and debug configuration description: Alternate function I/O
items: items:
- name: EVCR - byte_offset: 0
description: event control register description: Event Control Register (AFIO_EVCR)
byte_offset: 0 fieldset: EVCR
reset_value: 0 name: EVCR
fieldset: EVCR - byte_offset: 4
- name: MAPR description: AF remap and debug I/O configuration register (AFIO_MAPR)
description: AF remap and debug I/O configuration register fieldset: MAPR
byte_offset: 4 name: MAPR
reset_value: 0 - array:
fieldset: MAPR len: 4
- name: EXTICR stride: 4
description: external interrupt configuration register byte_offset: 8
array: description: External interrupt configuration register 1 (AFIO_EXTICR1)
len: 4 fieldset: EXTICR
stride: 4 name: EXTICR
byte_offset: 8 - byte_offset: 28
reset_value: 0 description: AF remap and debug I/O configuration register
fieldset: EXTICR fieldset: MAPR2
- name: MAPR2 name: MAPR2
description: AF remap and debug I/O configuration register2
byte_offset: 28
reset_value: 0
fieldset: MAPR2
fieldset/EVCR: fieldset/EVCR:
description: event control register description: Event Control Register (AFIO_EVCR)
fields: fields:
- name: EVOE - bit_offset: 0
description: Event output enable bit_size: 4
bit_offset: 7 description: Pin selection
bit_size: 1 name: PIN
- name: PORT - bit_offset: 4
description: Port selection bit_size: 3
bit_offset: 4 description: Port selection
bit_size: 3 name: PORT
- name: PIN - bit_offset: 7
description: Pin selection (x = A .. E) bit_size: 1
bit_offset: 0 description: Event Output Enable
bit_size: 4 name: EVOE
fieldset/EXTICR:
description: External interrupt configuration register 3 (AFIO_EXTICR3)
fields:
- array:
len: 4
stride: 4
bit_offset: 0
bit_size: 4
description: EXTI12 configuration
name: EXTI
fieldset/MAPR: fieldset/MAPR:
description: AF remap and debug I/O configuration register (AFIO_MAPR)
fields:
- bit_offset: 0
bit_size: 1
description: SPI1 remapping
name: SPI1_REMAP
- bit_offset: 1
bit_size: 1
description: I2C1 remapping
name: I2C1_REMAP
- bit_offset: 2
bit_size: 1
description: USART1 remapping
name: USART1_REMAP
- bit_offset: 3
bit_size: 1
description: USART2 remapping
name: USART2_REMAP
- bit_offset: 4
bit_size: 2
description: USART3 remapping
name: USART3_REMAP
- bit_offset: 6
bit_size: 2
description: TIM1 remapping
name: TIM1_REMAP
- bit_offset: 8
bit_size: 2
description: TIM2 remapping
name: TIM2_REMAP
- bit_offset: 10
bit_size: 2
description: TIM3 remapping
name: TIM3_REMAP
- bit_offset: 12
bit_size: 1
description: TIM4 remapping
name: TIM4_REMAP
- bit_offset: 13
bit_size: 2
description: CAN1 remapping
name: CAN_REMAP
- bit_offset: 13
bit_size: 2
description: CAN1 remapping
name: CAN1_REMAP
- bit_offset: 15
bit_size: 1
description: Port D0/Port D1 mapping on OSCIN/OSCOUT
name: PD01_REMAP
- bit_offset: 16
bit_size: 1
description: Set and cleared by software
name: TIM5CH4_IREMAP
- bit_offset: 17
bit_size: 1
description: ADC 1 External trigger injected conversion remapping
name: ADC1_ETRGINJ_REMAP
- bit_offset: 18
bit_size: 1
description: ADC 1 external trigger regular conversion remapping
name: ADC1_ETRGREG_REMAP
- bit_offset: 19
bit_size: 1
description: ADC 2 external trigger injected conversion remapping
name: ADC2_ETRGINJ_REMAP
- bit_offset: 20
bit_size: 1
description: ADC 2 external trigger regular conversion remapping
name: ADC2_ETRGREG_REMAP
- bit_offset: 21
bit_size: 1
description: Ethernet MAC I/O remapping
name: ETH_REMAP
- bit_offset: 22
bit_size: 1
description: CAN2 I/O remapping
name: CAN2_REMAP
- bit_offset: 23
bit_size: 1
description: MII or RMII selection
name: MII_RMII_SEL
- bit_offset: 24
bit_size: 3
description: Serial wire JTAG configuration
name: SWJ_CFG
- bit_offset: 28
bit_size: 1
description: SPI3/I2S3 remapping
name: SPI3_REMAP
- bit_offset: 29
bit_size: 1
description: TIM2 internal trigger 1 remapping
name: TIM2ITR1_IREMAP
- bit_offset: 30
bit_size: 1
description: Ethernet PTP PPS remapping
name: PTP_PPS_REMAP
fieldset/MAPR2:
description: AF remap and debug I/O configuration register description: AF remap and debug I/O configuration register
fields: fields:
- name: SWJ_CFG - bit_offset: 0
description: Serial wire JTAG configuration bit_size: 1
bit_offset: 24 description: TIM15 remapping
bit_size: 3 name: TIM15_REMAP
- name: ADC2_ETRGREG_REMAP - bit_offset: 1
description: ADC2 external trigger regular conversion remapping bit_size: 1
bit_offset: 20 description: TIM16 remapping
bit_size: 1 name: TIM16_REMAP
- name: ADC2_ETRGINJ_REMAP - bit_offset: 2
description: ADC2 external trigger injected conversion remapping bit_size: 1
bit_offset: 19 description: TIM17 remapping
bit_size: 1 name: TIM17_REMAP
- name: ADC1_ETRGREG_REMAP - bit_offset: 3
description: ADC1 external trigger regular conversion remapping bit_size: 1
bit_offset: 18 description: CEC remapping
bit_size: 1 name: CEC_REMAP
- name: ADC1_ETRGINJ_REMAP - bit_offset: 4
description: ADC1 external trigger injected conversion remapping bit_size: 1
bit_offset: 17 description: TIM1 DMA remapping
bit_size: 1 name: TIM1_DMA_REMAP
- name: TIM5CH4_IREMAP - bit_offset: 5
description: TIM5 channel4 internal remap bit_size: 1
bit_offset: 16 description: TIM9 remapping
bit_size: 1 name: TIM9_REMAP
- name: PD01_REMAP - bit_offset: 6
description: Port D0/Port D1 mapping on OSC_IN/OSC_OUT bit_size: 1
bit_offset: 15 description: TIM10 remapping
bit_size: 1 name: TIM10_REMAP
- name: CAN_REMAP - bit_offset: 7
description: CAN alternate function remapping bit_size: 1
bit_offset: 13 description: TIM11 remapping
bit_size: 2 name: TIM11_REMAP
- name: TIM4_REMAP - bit_offset: 8
description: TIM4 remapping bit_size: 1
bit_offset: 12 description: TIM13 remapping
bit_size: 1 name: TIM13_REMAP
- name: TIMx_REMAP - bit_offset: 9
description: TIMx remapping bit_size: 1
bit_offset: 6 description: TIM14 remapping
bit_size: 2 name: TIM14_REMAP
array: - bit_offset: 10
len: 3 bit_size: 1
stride: 2 description: NADV connect/disconnect
- name: USART3_REMAP name: FSMC_NADV
description: USART3 remapping - bit_offset: 11
bit_offset: 4 bit_size: 1
bit_size: 2 description: TIM67_DAC DMA remapping
- name: USART2_REMAP name: TIM67_DAC_DMA_REMAP
description: USART2 remapping - bit_offset: 12
bit_offset: 3 bit_size: 1
bit_size: 1 description: TIM12 remapping
- name: USART1_REMAP name: TIM12_REMAP
description: USART1 remapping - bit_offset: 13
bit_offset: 2 bit_size: 1
bit_size: 1 description: Miscellaneous features remapping
- name: SPI1_REMAP name: MISC_REMAP
description: SPI1 remapping
bit_offset: 0
bit_size: 1
fieldset/EXTICR:
description: external interrupt configuration register
fields:
- name: EXTI
description: EXTI x configuration
bit_offset: 0
bit_size: 4
array:
len: 4
stride: 4
fieldset/MAPR2:
description: AF remap and debug I/O configuration register2
fields:
- name: FSMC_NADV
description: Serial wire JTAG configuration
bit_offset: 10
bit_size: 1
- name: TIM14_REMAP
description: TIM14 remapping
bit_offset: 9
bit_size: 1
- name: TIM13_REMAP
description: TIM13 remapping
bit_offset: 8
bit_size: 1
- name: TIM11_REMAP
description: TIM11 remapping
bit_offset: 7
bit_size: 1
- name: TIM10_REMAP
description: TIM10 remapping
bit_offset: 6
bit_size: 1
- name: TIM9_REMAP
description: TIM9 remapping
bit_offset: 5
bit_size: 1