From 8dde100c151039765ab5151cf6648610132f93bc Mon Sep 17 00:00:00 2001 From: Mariusz Ryndzionek Date: Thu, 23 Sep 2021 18:54:22 +0200 Subject: [PATCH] Updated register mapping for STM32 F1 AFIO --- data/registers/afio_f1.yaml | 332 +++++++++++++++++++++--------------- 1 file changed, 198 insertions(+), 134 deletions(-) diff --git a/data/registers/afio_f1.yaml b/data/registers/afio_f1.yaml index d1ebaf1..6facdf7 100644 --- a/data/registers/afio_f1.yaml +++ b/data/registers/afio_f1.yaml @@ -1,141 +1,205 @@ ---- block/AFIO: - description: Alternate function I/O and debug configuration + description: Alternate function I/O items: - - name: EVCR - description: event control register - byte_offset: 0 - reset_value: 0 - fieldset: EVCR - - name: MAPR - description: AF remap and debug I/O configuration register - byte_offset: 4 - reset_value: 0 - fieldset: MAPR - - name: EXTICR - description: external interrupt configuration register - array: - len: 4 - stride: 4 - byte_offset: 8 - reset_value: 0 - fieldset: EXTICR - - name: MAPR2 - description: AF remap and debug I/O configuration register2 - byte_offset: 28 - reset_value: 0 - fieldset: MAPR2 + - byte_offset: 0 + description: Event Control Register (AFIO_EVCR) + fieldset: EVCR + name: EVCR + - byte_offset: 4 + description: AF remap and debug I/O configuration register (AFIO_MAPR) + fieldset: MAPR + name: MAPR + - array: + len: 4 + stride: 4 + byte_offset: 8 + description: External interrupt configuration register 1 (AFIO_EXTICR1) + fieldset: EXTICR + name: EXTICR + - byte_offset: 28 + description: AF remap and debug I/O configuration register + fieldset: MAPR2 + name: MAPR2 fieldset/EVCR: - description: event control register + description: Event Control Register (AFIO_EVCR) fields: - - name: EVOE - description: Event output enable - bit_offset: 7 - bit_size: 1 - - name: PORT - description: Port selection - bit_offset: 4 - bit_size: 3 - - name: PIN - description: Pin selection (x = A .. E) - bit_offset: 0 - bit_size: 4 + - bit_offset: 0 + bit_size: 4 + description: Pin selection + name: PIN + - bit_offset: 4 + bit_size: 3 + description: Port selection + name: PORT + - bit_offset: 7 + bit_size: 1 + description: Event Output Enable + name: EVOE +fieldset/EXTICR: + description: External interrupt configuration register 3 (AFIO_EXTICR3) + fields: + - array: + len: 4 + stride: 4 + bit_offset: 0 + bit_size: 4 + description: EXTI12 configuration + name: EXTI fieldset/MAPR: + description: AF remap and debug I/O configuration register (AFIO_MAPR) + fields: + - bit_offset: 0 + bit_size: 1 + description: SPI1 remapping + name: SPI1_REMAP + - bit_offset: 1 + bit_size: 1 + description: I2C1 remapping + name: I2C1_REMAP + - bit_offset: 2 + bit_size: 1 + description: USART1 remapping + name: USART1_REMAP + - bit_offset: 3 + bit_size: 1 + description: USART2 remapping + name: USART2_REMAP + - bit_offset: 4 + bit_size: 2 + description: USART3 remapping + name: USART3_REMAP + - bit_offset: 6 + bit_size: 2 + description: TIM1 remapping + name: TIM1_REMAP + - bit_offset: 8 + bit_size: 2 + description: TIM2 remapping + name: TIM2_REMAP + - bit_offset: 10 + bit_size: 2 + description: TIM3 remapping + name: TIM3_REMAP + - bit_offset: 12 + bit_size: 1 + description: TIM4 remapping + name: TIM4_REMAP + - bit_offset: 13 + bit_size: 2 + description: CAN1 remapping + name: CAN_REMAP + - bit_offset: 13 + bit_size: 2 + description: CAN1 remapping + name: CAN1_REMAP + - bit_offset: 15 + bit_size: 1 + description: Port D0/Port D1 mapping on OSCIN/OSCOUT + name: PD01_REMAP + - bit_offset: 16 + bit_size: 1 + description: Set and cleared by software + name: TIM5CH4_IREMAP + - bit_offset: 17 + bit_size: 1 + description: ADC 1 External trigger injected conversion remapping + name: ADC1_ETRGINJ_REMAP + - bit_offset: 18 + bit_size: 1 + description: ADC 1 external trigger regular conversion remapping + name: ADC1_ETRGREG_REMAP + - bit_offset: 19 + bit_size: 1 + description: ADC 2 external trigger injected conversion remapping + name: ADC2_ETRGINJ_REMAP + - bit_offset: 20 + bit_size: 1 + description: ADC 2 external trigger regular conversion remapping + name: ADC2_ETRGREG_REMAP + - bit_offset: 21 + bit_size: 1 + description: Ethernet MAC I/O remapping + name: ETH_REMAP + - bit_offset: 22 + bit_size: 1 + description: CAN2 I/O remapping + name: CAN2_REMAP + - bit_offset: 23 + bit_size: 1 + description: MII or RMII selection + name: MII_RMII_SEL + - bit_offset: 24 + bit_size: 3 + description: Serial wire JTAG configuration + name: SWJ_CFG + - bit_offset: 28 + bit_size: 1 + description: SPI3/I2S3 remapping + name: SPI3_REMAP + - bit_offset: 29 + bit_size: 1 + description: TIM2 internal trigger 1 remapping + name: TIM2ITR1_IREMAP + - bit_offset: 30 + bit_size: 1 + description: Ethernet PTP PPS remapping + name: PTP_PPS_REMAP +fieldset/MAPR2: description: AF remap and debug I/O configuration register fields: - - name: SWJ_CFG - description: Serial wire JTAG configuration - bit_offset: 24 - bit_size: 3 - - name: ADC2_ETRGREG_REMAP - description: ADC2 external trigger regular conversion remapping - bit_offset: 20 - bit_size: 1 - - name: ADC2_ETRGINJ_REMAP - description: ADC2 external trigger injected conversion remapping - bit_offset: 19 - bit_size: 1 - - name: ADC1_ETRGREG_REMAP - description: ADC1 external trigger regular conversion remapping - bit_offset: 18 - bit_size: 1 - - name: ADC1_ETRGINJ_REMAP - description: ADC1 external trigger injected conversion remapping - bit_offset: 17 - bit_size: 1 - - name: TIM5CH4_IREMAP - description: TIM5 channel4 internal remap - bit_offset: 16 - bit_size: 1 - - name: PD01_REMAP - description: Port D0/Port D1 mapping on OSC_IN/OSC_OUT - bit_offset: 15 - bit_size: 1 - - name: CAN_REMAP - description: CAN alternate function remapping - bit_offset: 13 - bit_size: 2 - - name: TIM4_REMAP - description: TIM4 remapping - bit_offset: 12 - bit_size: 1 - - name: TIMx_REMAP - description: TIMx remapping - bit_offset: 6 - bit_size: 2 - array: - len: 3 - stride: 2 - - name: USART3_REMAP - description: USART3 remapping - bit_offset: 4 - bit_size: 2 - - name: USART2_REMAP - description: USART2 remapping - bit_offset: 3 - bit_size: 1 - - name: USART1_REMAP - description: USART1 remapping - bit_offset: 2 - bit_size: 1 - - name: SPI1_REMAP - description: SPI1 remapping - bit_offset: 0 - bit_size: 1 -fieldset/EXTICR: - description: external interrupt configuration register - fields: - - name: EXTI - description: EXTI x configuration - bit_offset: 0 - bit_size: 4 - array: - len: 4 - stride: 4 -fieldset/MAPR2: - description: AF remap and debug I/O configuration register2 - fields: - - name: FSMC_NADV - description: Serial wire JTAG configuration - bit_offset: 10 - bit_size: 1 - - name: TIM14_REMAP - description: TIM14 remapping - bit_offset: 9 - bit_size: 1 - - name: TIM13_REMAP - description: TIM13 remapping - bit_offset: 8 - bit_size: 1 - - name: TIM11_REMAP - description: TIM11 remapping - bit_offset: 7 - bit_size: 1 - - name: TIM10_REMAP - description: TIM10 remapping - bit_offset: 6 - bit_size: 1 - - name: TIM9_REMAP - description: TIM9 remapping - bit_offset: 5 - bit_size: 1 + - bit_offset: 0 + bit_size: 1 + description: TIM15 remapping + name: TIM15_REMAP + - bit_offset: 1 + bit_size: 1 + description: TIM16 remapping + name: TIM16_REMAP + - bit_offset: 2 + bit_size: 1 + description: TIM17 remapping + name: TIM17_REMAP + - bit_offset: 3 + bit_size: 1 + description: CEC remapping + name: CEC_REMAP + - bit_offset: 4 + bit_size: 1 + description: TIM1 DMA remapping + name: TIM1_DMA_REMAP + - bit_offset: 5 + bit_size: 1 + description: TIM9 remapping + name: TIM9_REMAP + - bit_offset: 6 + bit_size: 1 + description: TIM10 remapping + name: TIM10_REMAP + - bit_offset: 7 + bit_size: 1 + description: TIM11 remapping + name: TIM11_REMAP + - bit_offset: 8 + bit_size: 1 + description: TIM13 remapping + name: TIM13_REMAP + - bit_offset: 9 + bit_size: 1 + description: TIM14 remapping + name: TIM14_REMAP + - bit_offset: 10 + bit_size: 1 + description: NADV connect/disconnect + name: FSMC_NADV + - bit_offset: 11 + bit_size: 1 + description: TIM67_DAC DMA remapping + name: TIM67_DAC_DMA_REMAP + - bit_offset: 12 + bit_size: 1 + description: TIM12 remapping + name: TIM12_REMAP + - bit_offset: 13 + bit_size: 1 + description: Miscellaneous features remapping + name: MISC_REMAP