naming block, as start point of merging
This commit is contained in:
parent
6356128ba2
commit
cb85778273
@ -1,83 +1,83 @@
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|||||||
block/TIM:
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block/TIM_1CH:
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description: Advanced-timers
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description: 1-channel timers
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items:
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items:
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- name: CR1
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- name: CR1
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description: control register 1
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description: control register 1
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byte_offset: 0
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byte_offset: 0
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fieldset: CR1
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fieldset: CR1_1CH
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- name: DIER
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- name: DIER
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description: DMA/Interrupt enable register
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description: DMA/Interrupt enable register
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byte_offset: 12
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byte_offset: 12
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fieldset: DIER
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fieldset: DIER_1CH
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- name: SR
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- name: SR
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description: status register
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description: status register
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byte_offset: 16
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byte_offset: 16
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fieldset: SR
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fieldset: SR_1CH
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- name: EGR
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- name: EGR
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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fieldset: EGR
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fieldset: EGR_1CH
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- name: CCMR_Input
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- name: CCMR_Input
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description: capture/compare mode register 1 (input mode)
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description: capture/compare mode register 1 (input mode)
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array:
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array:
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len: 1
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len: 1
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stride: 4
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stride: 4
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byte_offset: 24
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byte_offset: 24
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fieldset: CCMR_Input
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fieldset: CCMR_Input_1CH
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- name: CCMR_Output
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- name: CCMR_Output
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description: capture/compare mode register 1 (output mode)
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description: capture/compare mode register 1 (output mode)
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array:
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array:
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len: 1
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len: 1
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stride: 4
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stride: 4
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byte_offset: 24
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byte_offset: 24
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fieldset: CCMR_Output
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fieldset: CCMR_Output_1CH
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- name: CCER
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- name: CCER
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description: capture/compare enable register
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description: capture/compare enable register
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byte_offset: 32
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byte_offset: 32
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fieldset: CCER
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fieldset: CCER_1CH
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- name: CNT
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- name: CNT
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description: counter
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description: counter
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byte_offset: 36
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byte_offset: 36
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fieldset: CNT
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fieldset: CNT_1CH
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- name: PSC
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- name: PSC
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description: prescaler
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description: prescaler
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byte_offset: 40
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byte_offset: 40
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fieldset: PSC
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fieldset: PSC_1CH
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- name: ARR
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- name: ARR
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description: auto-reload register (Dither mode disabled)
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description: auto-reload register (Dither mode disabled)
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byte_offset: 44
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byte_offset: 44
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fieldset: ARR
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fieldset: ARR_1CH
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- name: ARR_DITHER
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- name: ARR_DITHER
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description: auto-reload register (Dither mode enabled)
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description: auto-reload register (Dither mode enabled)
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byte_offset: 44
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byte_offset: 44
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fieldset: ARR_DITHER
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fieldset: ARR_DITHER_1CH
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- name: CCR
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- name: CCR
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description: capture/compare register x (x=1) (Dither mode disabled)
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description: capture/compare register x (x=1) (Dither mode disabled)
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array:
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array:
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len: 1
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len: 1
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stride: 4
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stride: 4
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byte_offset: 52
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byte_offset: 52
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fieldset: CCR
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fieldset: CCR_1CH
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- name: CCR_DITHER
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- name: CCR_DITHER
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description: capture/compare register x (x=1) (Dither mode enabled)
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description: capture/compare register x (x=1) (Dither mode enabled)
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array:
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array:
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len: 1
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len: 1
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stride: 4
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stride: 4
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byte_offset: 52
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byte_offset: 52
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fieldset: CCR_DITHER
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fieldset: CCR_DITHER_1CH
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- name: TISEL
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- name: TISEL
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description: input selection register
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description: input selection register
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byte_offset: 92
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byte_offset: 92
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fieldset: TISEL
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fieldset: TISEL_1CH
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fieldset/ARR:
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fieldset/ARR_1CH:
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description: auto-reload register (Dither mode disabled)
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description: auto-reload register (Dither mode disabled)
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fields:
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fields:
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- name: ARR
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- name: ARR
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description: Auto-reload value
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description: Auto-reload value
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bit_offset: 0
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bit_offset: 0
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bit_size: 16
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bit_size: 16
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fieldset/ARR_DITHER:
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fieldset/ARR_DITHER_1CH:
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description: auto-reload register (Dither mode enabled)
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description: auto-reload register (Dither mode enabled)
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fields:
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fields:
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- name: DITHER
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- name: DITHER
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@ -88,7 +88,7 @@ fieldset/ARR_DITHER:
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description: Auto-reload value
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description: Auto-reload value
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bit_offset: 4
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bit_offset: 4
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bit_size: 16
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bit_size: 16
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fieldset/CCER:
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fieldset/CCER_1CH:
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description: capture/compare enable register
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description: capture/compare enable register
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fields:
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fields:
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- name: CCE
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- name: CCE
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@ -112,7 +112,7 @@ fieldset/CCER:
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array:
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array:
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len: 1
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len: 1
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stride: 4
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stride: 4
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fieldset/CCMR_Input:
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fieldset/CCMR_Input_1CH:
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description: capture/compare mode register x (x=1) (input mode)
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description: capture/compare mode register x (x=1) (input mode)
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fields:
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fields:
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- name: CCS
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- name: CCS
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@ -138,7 +138,7 @@ fieldset/CCMR_Input:
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len: 1
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len: 1
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stride: 8
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stride: 8
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enum: FilterValue
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enum: FilterValue
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fieldset/CCMR_Output:
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fieldset/CCMR_Output_1CH:
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description: capture/compare mode register x (x=1) (output mode)
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description: capture/compare mode register x (x=1) (output mode)
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fields:
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fields:
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- name: CCS
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- name: CCS
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@ -171,14 +171,14 @@ fieldset/CCMR_Output:
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len: 1
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len: 1
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stride: 8
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stride: 8
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enum: OCM
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enum: OCM
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fieldset/CCR:
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fieldset/CCR_1CH:
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description: capture/compare register x (x=1) (Dither mode disabled)
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description: capture/compare register x (x=1) (Dither mode disabled)
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fields:
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fields:
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- name: CCR
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- name: CCR
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description: capture/compare x (x=1) value
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description: capture/compare x (x=1) value
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bit_offset: 0
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bit_offset: 0
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bit_size: 16
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bit_size: 16
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fieldset/CCR_DITHER:
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fieldset/CCR_DITHER_1CH:
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description: capture/compare register x (x=1) (Dither mode enabled)
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description: capture/compare register x (x=1) (Dither mode enabled)
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fields:
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fields:
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- name: DITHER
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- name: DITHER
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@ -189,7 +189,7 @@ fieldset/CCR_DITHER:
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description: capture/compare x (x=1) value
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description: capture/compare x (x=1) value
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bit_offset: 4
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bit_offset: 4
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bit_size: 16
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bit_size: 16
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fieldset/CNT:
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fieldset/CNT_1CH:
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description: counter
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description: counter
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fields:
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fields:
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- name: CNT
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- name: CNT
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@ -200,7 +200,7 @@ fieldset/CNT:
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description: UIF copy
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description: UIF copy
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bit_offset: 31
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bit_offset: 31
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bit_size: 1
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bit_size: 1
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fieldset/CR1:
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fieldset/CR1_1CH:
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description: control register 1
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description: control register 1
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fields:
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fields:
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- name: CEN
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- name: CEN
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@ -237,7 +237,7 @@ fieldset/CR1:
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description: Dithering enable
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description: Dithering enable
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bit_offset: 12
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bit_offset: 12
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bit_size: 1
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bit_size: 1
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fieldset/DIER:
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fieldset/DIER_1CH:
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description: DMA/Interrupt enable register
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description: DMA/Interrupt enable register
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fields:
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fields:
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- name: UIE
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- name: UIE
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@ -251,7 +251,7 @@ fieldset/DIER:
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array:
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array:
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len: 1
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len: 1
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stride: 1
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stride: 1
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fieldset/EGR:
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fieldset/EGR_1CH:
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description: event generation register
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description: event generation register
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fields:
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fields:
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- name: UG
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- name: UG
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@ -265,14 +265,14 @@ fieldset/EGR:
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array:
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array:
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len: 1
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len: 1
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stride: 1
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stride: 1
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fieldset/PSC:
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fieldset/PSC_1CH:
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description: prescaler
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description: prescaler
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fields:
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fields:
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- name: PSC
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- name: PSC
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description: Prescaler value
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description: Prescaler value
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bit_offset: 0
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bit_offset: 0
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bit_size: 16
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bit_size: 16
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fieldset/SR:
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fieldset/SR_1CH:
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description: status register
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description: status register
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fields:
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fields:
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- name: UIF
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- name: UIF
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@ -293,7 +293,7 @@ fieldset/SR:
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array:
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array:
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len: 1
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len: 1
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stride: 1
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stride: 1
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fieldset/TISEL:
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fieldset/TISEL_1CH:
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description: input selection register
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description: input selection register
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fields:
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fields:
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- name: TISEL
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- name: TISEL
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@ -1,108 +1,108 @@
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block/TIM:
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block/TIM_1CH_CMP:
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description: Advanced-timers
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description: 1-channel with one complementary output timers
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items:
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items:
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- name: CR1
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- name: CR1
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description: control register 1
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description: control register 1
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byte_offset: 0
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byte_offset: 0
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fieldset: CR1
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fieldset: CR1_1CH_CMP
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- name: CR2
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- name: CR2
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description: control register 2
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description: control register 2
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byte_offset: 4
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byte_offset: 4
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fieldset: CR2
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fieldset: CR2_1CH_CMP
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- name: DIER
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- name: DIER
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description: DMA/Interrupt enable register
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description: DMA/Interrupt enable register
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byte_offset: 12
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byte_offset: 12
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fieldset: DIER
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fieldset: DIER_1CH_CMP
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- name: SR
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- name: SR
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description: status register
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description: status register
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byte_offset: 16
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byte_offset: 16
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fieldset: SR
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fieldset: SR_1CH_CMP
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- name: EGR
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- name: EGR
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description: event generation register
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description: event generation register
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byte_offset: 20
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byte_offset: 20
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access: Write
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access: Write
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fieldset: EGR
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fieldset: EGR_1CH_CMP
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- name: CCMR_Input
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- name: CCMR_Input
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description: capture/compare mode register 1 (input mode)
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description: capture/compare mode register 1 (input mode)
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array:
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array:
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len: 1
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len: 1
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stride: 4
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stride: 4
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byte_offset: 24
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byte_offset: 24
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fieldset: CCMR_Input
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fieldset: CCMR_Input_1CH_CMP
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- name: CCMR_Output
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- name: CCMR_Output
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description: capture/compare mode register 1 (output mode)
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description: capture/compare mode register 1 (output mode)
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array:
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array:
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len: 1
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len: 1
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stride: 4
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stride: 4
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byte_offset: 24
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byte_offset: 24
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fieldset: CCMR_Output
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fieldset: CCMR_Output_1CH_CMP
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- name: CCER
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- name: CCER
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description: capture/compare enable register
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description: capture/compare enable register
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byte_offset: 32
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byte_offset: 32
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fieldset: CCER
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fieldset: CCER_1CH_CMP
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- name: CNT
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- name: CNT
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description: counter
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description: counter
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byte_offset: 36
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byte_offset: 36
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fieldset: CNT
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fieldset: CNT_1CH_CMP
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- name: PSC
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- name: PSC
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description: prescaler
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description: prescaler
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byte_offset: 40
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byte_offset: 40
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fieldset: PSC
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fieldset: PSC_1CH_CMP
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- name: ARR
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- name: ARR
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description: auto-reload register (Dither mode disabled)
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description: auto-reload register (Dither mode disabled)
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byte_offset: 44
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byte_offset: 44
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fieldset: ARR
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fieldset: ARR_1CH_CMP
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- name: ARR_DITHER
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- name: ARR_DITHER
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description: auto-reload register (Dither mode enabled)
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description: auto-reload register (Dither mode enabled)
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byte_offset: 44
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byte_offset: 44
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fieldset: ARR_DITHER
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fieldset: ARR_DITHER_1CH_CMP
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- name: RCR
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- name: RCR
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description: repetition counter register
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description: repetition counter register
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byte_offset: 48
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byte_offset: 48
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fieldset: RCR
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fieldset: RCR_1CH_CMP
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- name: CCR
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- name: CCR
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description: capture/compare register x (x=1) (Dither mode disabled)
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description: capture/compare register x (x=1) (Dither mode disabled)
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array:
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array:
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len: 1
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len: 1
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stride: 4
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stride: 4
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byte_offset: 52
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byte_offset: 52
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fieldset: CCR
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fieldset: CCR_1CH_CMP
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- name: CCR_DITHER
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- name: CCR_DITHER
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description: capture/compare register x (x=1) (Dither mode enabled)
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description: capture/compare register x (x=1) (Dither mode enabled)
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array:
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array:
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len: 1
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len: 1
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stride: 4
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stride: 4
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byte_offset: 52
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byte_offset: 52
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fieldset: CCR_DITHER
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fieldset: CCR_DITHER_1CH_CMP
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- name: BDTR
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- name: BDTR
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description: break and dead-time register
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description: break and dead-time register
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byte_offset: 68
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byte_offset: 68
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fieldset: BDTR
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fieldset: BDTR_1CH_CMP
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- name: DTR2
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- name: DTR2
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description: break and dead-time register
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description: break and dead-time register
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byte_offset: 84
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byte_offset: 84
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fieldset: DTR2
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fieldset: DTR2_1CH_CMP
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- name: TISEL
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- name: TISEL
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description: input selection register
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description: input selection register
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byte_offset: 92
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byte_offset: 92
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fieldset: TISEL
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fieldset: TISEL_1CH_CMP
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- name: AF1
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- name: AF1
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description: alternate function register 1
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description: alternate function register 1
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byte_offset: 96
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byte_offset: 96
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fieldset: AF1
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fieldset: AF1_1CH_CMP
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- name: AF2
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- name: AF2
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description: alternate function register 2
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description: alternate function register 2
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byte_offset: 100
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byte_offset: 100
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fieldset: AF2
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fieldset: AF2_1CH_CMP
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- name: DCR
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- name: DCR
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description: DMA control register
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description: DMA control register
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byte_offset: 988
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byte_offset: 988
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fieldset: DCR
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fieldset: DCR_1CH_CMP
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- name: DMAR
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- name: DMAR
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description: DMA address for full transfer
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description: DMA address for full transfer
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byte_offset: 992
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byte_offset: 992
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fieldset: DMAR
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fieldset: DMAR_1CH_CMP
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fieldset/AF1:
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fieldset/AF1_1CH_CMP:
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description: alternate function register 1
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description: alternate function register 1
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fields:
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fields:
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- name: BKINE
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- name: BKINE
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@ -129,21 +129,21 @@ fieldset/AF1:
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len: 4
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len: 4
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stride: 1
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stride: 1
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enum: BKINP
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enum: BKINP
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fieldset/AF2:
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fieldset/AF2_1CH_CMP:
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description: alternate function register 2
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description: alternate function register 2
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fields:
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fields:
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- name: OCRSEL
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- name: OCRSEL
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description: ocref_clr source selection
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description: ocref_clr source selection
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bit_offset: 16
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bit_offset: 16
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bit_size: 3
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bit_size: 3
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fieldset/ARR:
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fieldset/ARR_1CH_CMP:
|
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description: auto-reload register (Dither mode disabled)
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description: auto-reload register (Dither mode disabled)
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||||||
fields:
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fields:
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- name: ARR
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- name: ARR
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||||||
description: Auto-reload value
|
description: Auto-reload value
|
||||||
bit_offset: 0
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bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/ARR_DITHER:
|
fieldset/ARR_DITHER_1CH_CMP:
|
||||||
description: auto-reload register (Dither mode enabled)
|
description: auto-reload register (Dither mode enabled)
|
||||||
fields:
|
fields:
|
||||||
- name: DITHER
|
- name: DITHER
|
||||||
@ -154,7 +154,7 @@ fieldset/ARR_DITHER:
|
|||||||
description: Auto-reload value
|
description: Auto-reload value
|
||||||
bit_offset: 4
|
bit_offset: 4
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/BDTR:
|
fieldset/BDTR_1CH_CMP:
|
||||||
description: break and dead-time register
|
description: break and dead-time register
|
||||||
fields:
|
fields:
|
||||||
- name: DTG
|
- name: DTG
|
||||||
@ -223,7 +223,7 @@ fieldset/BDTR:
|
|||||||
len: 1
|
len: 1
|
||||||
stride: 1
|
stride: 1
|
||||||
enum: BKBID
|
enum: BKBID
|
||||||
fieldset/CCER:
|
fieldset/CCER_1CH_CMP:
|
||||||
description: capture/compare enable register
|
description: capture/compare enable register
|
||||||
fields:
|
fields:
|
||||||
- name: CCE
|
- name: CCE
|
||||||
@ -254,7 +254,7 @@ fieldset/CCER:
|
|||||||
array:
|
array:
|
||||||
len: 1
|
len: 1
|
||||||
stride: 4
|
stride: 4
|
||||||
fieldset/CCMR_Input:
|
fieldset/CCMR_Input_1CH_CMP:
|
||||||
description: capture/compare mode register x (x=1) (input mode)
|
description: capture/compare mode register x (x=1) (input mode)
|
||||||
fields:
|
fields:
|
||||||
- name: CCS
|
- name: CCS
|
||||||
@ -280,7 +280,7 @@ fieldset/CCMR_Input:
|
|||||||
len: 1
|
len: 1
|
||||||
stride: 8
|
stride: 8
|
||||||
enum: FilterValue
|
enum: FilterValue
|
||||||
fieldset/CCMR_Output:
|
fieldset/CCMR_Output_1CH_CMP:
|
||||||
description: capture/compare mode register x (x=1) (output mode)
|
description: capture/compare mode register x (x=1) (output mode)
|
||||||
fields:
|
fields:
|
||||||
- name: CCS
|
- name: CCS
|
||||||
@ -320,14 +320,14 @@ fieldset/CCMR_Output:
|
|||||||
array:
|
array:
|
||||||
len: 1
|
len: 1
|
||||||
stride: 8
|
stride: 8
|
||||||
fieldset/CCR:
|
fieldset/CCR_1CH_CMP:
|
||||||
description: capture/compare register x (x=1) (Dither mode disabled)
|
description: capture/compare register x (x=1) (Dither mode disabled)
|
||||||
fields:
|
fields:
|
||||||
- name: CCR
|
- name: CCR
|
||||||
description: capture/compare x (x=1) value
|
description: capture/compare x (x=1) value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/CCR_DITHER:
|
fieldset/CCR_DITHER_1CH_CMP:
|
||||||
description: capture/compare register x (x=1) (Dither mode enabled)
|
description: capture/compare register x (x=1) (Dither mode enabled)
|
||||||
fields:
|
fields:
|
||||||
- name: DITHER
|
- name: DITHER
|
||||||
@ -338,7 +338,7 @@ fieldset/CCR_DITHER:
|
|||||||
description: capture/compare x (x=1) value
|
description: capture/compare x (x=1) value
|
||||||
bit_offset: 4
|
bit_offset: 4
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/CNT:
|
fieldset/CNT_1CH_CMP:
|
||||||
description: counter
|
description: counter
|
||||||
fields:
|
fields:
|
||||||
- name: CNT
|
- name: CNT
|
||||||
@ -349,7 +349,7 @@ fieldset/CNT:
|
|||||||
description: UIF copy
|
description: UIF copy
|
||||||
bit_offset: 31
|
bit_offset: 31
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/CR1:
|
fieldset/CR1_1CH_CMP:
|
||||||
description: control register 1
|
description: control register 1
|
||||||
fields:
|
fields:
|
||||||
- name: CEN
|
- name: CEN
|
||||||
@ -386,7 +386,7 @@ fieldset/CR1:
|
|||||||
description: Dithering enable
|
description: Dithering enable
|
||||||
bit_offset: 12
|
bit_offset: 12
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/CR2:
|
fieldset/CR2_1CH_CMP:
|
||||||
description: control register 2
|
description: control register 2
|
||||||
fields:
|
fields:
|
||||||
- name: CCPC
|
- name: CCPC
|
||||||
@ -416,7 +416,7 @@ fieldset/CR2:
|
|||||||
array:
|
array:
|
||||||
len: 1
|
len: 1
|
||||||
stride: 2
|
stride: 2
|
||||||
fieldset/DCR:
|
fieldset/DCR_1CH_CMP:
|
||||||
description: DMA control register
|
description: DMA control register
|
||||||
fields:
|
fields:
|
||||||
- name: DBA
|
- name: DBA
|
||||||
@ -432,7 +432,7 @@ fieldset/DCR:
|
|||||||
bit_offset: 16
|
bit_offset: 16
|
||||||
bit_size: 4
|
bit_size: 4
|
||||||
enum: DBSS
|
enum: DBSS
|
||||||
fieldset/DIER:
|
fieldset/DIER_1CH_CMP:
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
fields:
|
fields:
|
||||||
- name: UIE
|
- name: UIE
|
||||||
@ -465,14 +465,14 @@ fieldset/DIER:
|
|||||||
array:
|
array:
|
||||||
len: 1
|
len: 1
|
||||||
stride: 1
|
stride: 1
|
||||||
fieldset/DMAR:
|
fieldset/DMAR_1CH_CMP:
|
||||||
description: DMA address for full transfer
|
description: DMA address for full transfer
|
||||||
fields:
|
fields:
|
||||||
- name: DMAB
|
- name: DMAB
|
||||||
description: DMA register for burst accesses
|
description: DMA register for burst accesses
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 32
|
bit_size: 32
|
||||||
fieldset/DTR2:
|
fieldset/DTR2_1CH_CMP:
|
||||||
description: deadtime register 2
|
description: deadtime register 2
|
||||||
fields:
|
fields:
|
||||||
- name: DTGF
|
- name: DTGF
|
||||||
@ -488,7 +488,7 @@ fieldset/DTR2:
|
|||||||
description: Deadtime preload enable
|
description: Deadtime preload enable
|
||||||
bit_offset: 17
|
bit_offset: 17
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/EGR:
|
fieldset/EGR_1CH_CMP:
|
||||||
description: event generation register
|
description: event generation register
|
||||||
fields:
|
fields:
|
||||||
- name: UG
|
- name: UG
|
||||||
@ -513,21 +513,21 @@ fieldset/EGR:
|
|||||||
array:
|
array:
|
||||||
len: 1
|
len: 1
|
||||||
stride: 1
|
stride: 1
|
||||||
fieldset/PSC:
|
fieldset/PSC_1CH_CMP:
|
||||||
description: prescaler
|
description: prescaler
|
||||||
fields:
|
fields:
|
||||||
- name: PSC
|
- name: PSC
|
||||||
description: Prescaler value
|
description: Prescaler value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/RCR:
|
fieldset/RCR_1CH_CMP:
|
||||||
description: repetition counter register
|
description: repetition counter register
|
||||||
fields:
|
fields:
|
||||||
- name: REP
|
- name: REP
|
||||||
description: Repetition counter value
|
description: Repetition counter value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 8
|
bit_size: 8
|
||||||
fieldset/SR:
|
fieldset/SR_1CH_CMP:
|
||||||
description: status register
|
description: status register
|
||||||
fields:
|
fields:
|
||||||
- name: UIF
|
- name: UIF
|
||||||
@ -559,7 +559,7 @@ fieldset/SR:
|
|||||||
array:
|
array:
|
||||||
len: 1
|
len: 1
|
||||||
stride: 1
|
stride: 1
|
||||||
fieldset/TISEL:
|
fieldset/TISEL_1CH_CMP:
|
||||||
description: input selection register
|
description: input selection register
|
||||||
fields:
|
fields:
|
||||||
- name: TISEL
|
- name: TISEL
|
||||||
|
@ -1,91 +1,91 @@
|
|||||||
block/TIM:
|
block/TIM_2CH:
|
||||||
description: Advanced-timers
|
description: 2-channel timers
|
||||||
items:
|
items:
|
||||||
- name: CR1
|
- name: CR1
|
||||||
description: control register 1
|
description: control register 1
|
||||||
byte_offset: 0
|
byte_offset: 0
|
||||||
fieldset: CR1
|
fieldset: CR1_2CH
|
||||||
- name: CR2
|
- name: CR2
|
||||||
description: control register 2
|
description: control register 2
|
||||||
byte_offset: 4
|
byte_offset: 4
|
||||||
fieldset: CR2
|
fieldset: CR2_2CH
|
||||||
- name: SMCR
|
- name: SMCR
|
||||||
description: slave mode control register
|
description: slave mode control register
|
||||||
byte_offset: 8
|
byte_offset: 8
|
||||||
fieldset: SMCR
|
fieldset: SMCR_2CH
|
||||||
- name: DIER
|
- name: DIER
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
byte_offset: 12
|
byte_offset: 12
|
||||||
fieldset: DIER
|
fieldset: DIER_2CH
|
||||||
- name: SR
|
- name: SR
|
||||||
description: status register
|
description: status register
|
||||||
byte_offset: 16
|
byte_offset: 16
|
||||||
fieldset: SR
|
fieldset: SR_2CH
|
||||||
- name: EGR
|
- name: EGR
|
||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
fieldset: EGR
|
fieldset: EGR_2CH
|
||||||
- name: CCMR_Input
|
- name: CCMR_Input
|
||||||
description: capture/compare mode register 1 (input mode)
|
description: capture/compare mode register 1 (input mode)
|
||||||
array:
|
array:
|
||||||
len: 1
|
len: 1
|
||||||
stride: 4
|
stride: 4
|
||||||
byte_offset: 24
|
byte_offset: 24
|
||||||
fieldset: CCMR_Input
|
fieldset: CCMR_Input_2CH
|
||||||
- name: CCMR_Output
|
- name: CCMR_Output
|
||||||
description: capture/compare mode register 1 (output mode)
|
description: capture/compare mode register 1 (output mode)
|
||||||
array:
|
array:
|
||||||
len: 1
|
len: 1
|
||||||
stride: 4
|
stride: 4
|
||||||
byte_offset: 24
|
byte_offset: 24
|
||||||
fieldset: CCMR_Output
|
fieldset: CCMR_Output_2CH
|
||||||
- name: CCER
|
- name: CCER
|
||||||
description: capture/compare enable register
|
description: capture/compare enable register
|
||||||
byte_offset: 32
|
byte_offset: 32
|
||||||
fieldset: CCER
|
fieldset: CCER_2CH
|
||||||
- name: CNT
|
- name: CNT
|
||||||
description: counter
|
description: counter
|
||||||
byte_offset: 36
|
byte_offset: 36
|
||||||
fieldset: CNT
|
fieldset: CNT_2CH
|
||||||
- name: PSC
|
- name: PSC
|
||||||
description: prescaler
|
description: prescaler
|
||||||
byte_offset: 40
|
byte_offset: 40
|
||||||
fieldset: PSC
|
fieldset: PSC_2CH
|
||||||
- name: ARR
|
- name: ARR
|
||||||
description: auto-reload register (Dither mode disabled)
|
description: auto-reload register (Dither mode disabled)
|
||||||
byte_offset: 44
|
byte_offset: 44
|
||||||
fieldset: ARR
|
fieldset: ARR_2CH
|
||||||
- name: ARR_DITHER
|
- name: ARR_DITHER
|
||||||
description: auto-reload register (Dither mode enabled)
|
description: auto-reload register (Dither mode enabled)
|
||||||
byte_offset: 44
|
byte_offset: 44
|
||||||
fieldset: ARR_DITHER
|
fieldset: ARR_DITHER_2CH
|
||||||
- name: CCR
|
- name: CCR
|
||||||
description: capture/compare register x (x=1-2) (Dither mode disabled)
|
description: capture/compare register x (x=1-2) (Dither mode disabled)
|
||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 4
|
stride: 4
|
||||||
byte_offset: 52
|
byte_offset: 52
|
||||||
fieldset: CCR
|
fieldset: CCR_2CH
|
||||||
- name: CCR_DITHER
|
- name: CCR_DITHER
|
||||||
description: capture/compare register x (x=1-2) (Dither mode enabled)
|
description: capture/compare register x (x=1-2) (Dither mode enabled)
|
||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 4
|
stride: 4
|
||||||
byte_offset: 52
|
byte_offset: 52
|
||||||
fieldset: CCR_DITHER
|
fieldset: CCR_DITHER_2CH
|
||||||
- name: TISEL
|
- name: TISEL
|
||||||
description: input selection register
|
description: input selection register
|
||||||
byte_offset: 92
|
byte_offset: 92
|
||||||
fieldset: TISEL
|
fieldset: TISEL_2CH
|
||||||
fieldset/ARR:
|
fieldset/ARR_2CH:
|
||||||
description: auto-reload register (Dither mode disabled)
|
description: auto-reload register (Dither mode disabled)
|
||||||
fields:
|
fields:
|
||||||
- name: ARR
|
- name: ARR
|
||||||
description: Auto-reload value
|
description: Auto-reload value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/ARR_DITHER:
|
fieldset/ARR_DITHER_2CH:
|
||||||
description: auto-reload register (Dither mode enabled)
|
description: auto-reload register (Dither mode enabled)
|
||||||
fields:
|
fields:
|
||||||
- name: DITHER
|
- name: DITHER
|
||||||
@ -96,7 +96,7 @@ fieldset/ARR_DITHER:
|
|||||||
description: Auto-reload value
|
description: Auto-reload value
|
||||||
bit_offset: 4
|
bit_offset: 4
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/CCER:
|
fieldset/CCER_2CH:
|
||||||
description: capture/compare enable register
|
description: capture/compare enable register
|
||||||
fields:
|
fields:
|
||||||
- name: CCE
|
- name: CCE
|
||||||
@ -120,7 +120,7 @@ fieldset/CCER:
|
|||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 4
|
stride: 4
|
||||||
fieldset/CCMR_Input:
|
fieldset/CCMR_Input_2CH:
|
||||||
description: capture/compare mode register x (x=1) (input mode)
|
description: capture/compare mode register x (x=1) (input mode)
|
||||||
fields:
|
fields:
|
||||||
- name: CCS
|
- name: CCS
|
||||||
@ -146,7 +146,7 @@ fieldset/CCMR_Input:
|
|||||||
len: 2
|
len: 2
|
||||||
stride: 8
|
stride: 8
|
||||||
enum: FilterValue
|
enum: FilterValue
|
||||||
fieldset/CCMR_Output:
|
fieldset/CCMR_Output_2CH:
|
||||||
description: capture/compare mode register x (x=1) (output mode)
|
description: capture/compare mode register x (x=1) (output mode)
|
||||||
fields:
|
fields:
|
||||||
- name: CCS
|
- name: CCS
|
||||||
@ -179,14 +179,14 @@ fieldset/CCMR_Output:
|
|||||||
len: 2
|
len: 2
|
||||||
stride: 8
|
stride: 8
|
||||||
enum: OCM
|
enum: OCM
|
||||||
fieldset/CCR:
|
fieldset/CCR_2CH:
|
||||||
description: capture/compare register x (x=1,2) (Dither mode disabled)
|
description: capture/compare register x (x=1,2) (Dither mode disabled)
|
||||||
fields:
|
fields:
|
||||||
- name: CCR
|
- name: CCR
|
||||||
description: capture/compare x (x=1,2) value
|
description: capture/compare x (x=1,2) value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/CCR_DITHER:
|
fieldset/CCR_DITHER_2CH:
|
||||||
description: capture/compare register x (x=1,2) (Dither mode enabled)
|
description: capture/compare register x (x=1,2) (Dither mode enabled)
|
||||||
fields:
|
fields:
|
||||||
- name: DITHER
|
- name: DITHER
|
||||||
@ -197,7 +197,7 @@ fieldset/CCR_DITHER:
|
|||||||
description: capture/compare x (x=1-2) value
|
description: capture/compare x (x=1-2) value
|
||||||
bit_offset: 4
|
bit_offset: 4
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/CNT:
|
fieldset/CNT_2CH:
|
||||||
description: counter
|
description: counter
|
||||||
fields:
|
fields:
|
||||||
- name: CNT
|
- name: CNT
|
||||||
@ -208,7 +208,7 @@ fieldset/CNT:
|
|||||||
description: UIF copy
|
description: UIF copy
|
||||||
bit_offset: 31
|
bit_offset: 31
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/CR1:
|
fieldset/CR1_2CH:
|
||||||
description: control register 1
|
description: control register 1
|
||||||
fields:
|
fields:
|
||||||
- name: CEN
|
- name: CEN
|
||||||
@ -245,7 +245,7 @@ fieldset/CR1:
|
|||||||
description: Dithering enable
|
description: Dithering enable
|
||||||
bit_offset: 12
|
bit_offset: 12
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/CR2:
|
fieldset/CR2_2CH:
|
||||||
description: control register 2
|
description: control register 2
|
||||||
fields:
|
fields:
|
||||||
- name: MMS
|
- name: MMS
|
||||||
@ -258,7 +258,7 @@ fieldset/CR2:
|
|||||||
bit_offset: 7
|
bit_offset: 7
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
enum: TI1S
|
enum: TI1S
|
||||||
fieldset/DIER:
|
fieldset/DIER_2CH:
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
fields:
|
fields:
|
||||||
- name: UIE
|
- name: UIE
|
||||||
@ -276,7 +276,7 @@ fieldset/DIER:
|
|||||||
description: Trigger interrupt enable
|
description: Trigger interrupt enable
|
||||||
bit_offset: 6
|
bit_offset: 6
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/EGR:
|
fieldset/EGR_2CH:
|
||||||
description: event generation register
|
description: event generation register
|
||||||
fields:
|
fields:
|
||||||
- name: UG
|
- name: UG
|
||||||
@ -294,14 +294,14 @@ fieldset/EGR:
|
|||||||
description: Trigger generation
|
description: Trigger generation
|
||||||
bit_offset: 6
|
bit_offset: 6
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/PSC:
|
fieldset/PSC_2CH:
|
||||||
description: prescaler
|
description: prescaler
|
||||||
fields:
|
fields:
|
||||||
- name: PSC
|
- name: PSC
|
||||||
description: Prescaler value
|
description: Prescaler value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/SMCR:
|
fieldset/SMCR_2CH:
|
||||||
description: slave mode control register
|
description: slave mode control register
|
||||||
fields:
|
fields:
|
||||||
- name: SMS
|
- name: SMS
|
||||||
@ -319,7 +319,7 @@ fieldset/SMCR:
|
|||||||
bit_offset: 7
|
bit_offset: 7
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
enum: MSM
|
enum: MSM
|
||||||
fieldset/SR:
|
fieldset/SR_2CH:
|
||||||
description: status register
|
description: status register
|
||||||
fields:
|
fields:
|
||||||
- name: UIF
|
- name: UIF
|
||||||
@ -344,7 +344,7 @@ fieldset/SR:
|
|||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 1
|
stride: 1
|
||||||
fieldset/TISEL:
|
fieldset/TISEL_2CH:
|
||||||
description: input selection register
|
description: input selection register
|
||||||
fields:
|
fields:
|
||||||
- name: TISEL
|
- name: TISEL
|
||||||
|
@ -1,112 +1,112 @@
|
|||||||
block/TIM:
|
block/TIM_2CH_CMP:
|
||||||
description: Advanced-timers
|
description: 2-channel with one complementary output timers
|
||||||
items:
|
items:
|
||||||
- name: CR1
|
- name: CR1
|
||||||
description: control register 1
|
description: control register 1
|
||||||
byte_offset: 0
|
byte_offset: 0
|
||||||
fieldset: CR1
|
fieldset: CR1_1CH_CMP
|
||||||
- name: CR2
|
- name: CR2
|
||||||
description: control register 2
|
description: control register 2
|
||||||
byte_offset: 4
|
byte_offset: 4
|
||||||
fieldset: CR2
|
fieldset: CR2_1CH_CMP
|
||||||
- name: SMCR
|
- name: SMCR
|
||||||
description: slave mode control register
|
description: slave mode control register
|
||||||
byte_offset: 8
|
byte_offset: 8
|
||||||
fieldset: SMCR
|
fieldset: SMCR_1CH_CMP
|
||||||
- name: DIER
|
- name: DIER
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
byte_offset: 12
|
byte_offset: 12
|
||||||
fieldset: DIER
|
fieldset: DIER_1CH_CMP
|
||||||
- name: SR
|
- name: SR
|
||||||
description: status register
|
description: status register
|
||||||
byte_offset: 16
|
byte_offset: 16
|
||||||
fieldset: SR
|
fieldset: SR_1CH_CMP
|
||||||
- name: EGR
|
- name: EGR
|
||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
fieldset: EGR
|
fieldset: EGR_1CH_CMP
|
||||||
- name: CCMR_Input
|
- name: CCMR_Input
|
||||||
description: capture/compare mode register 1 (input mode)
|
description: capture/compare mode register 1 (input mode)
|
||||||
array:
|
array:
|
||||||
len: 1
|
len: 1
|
||||||
stride: 4
|
stride: 4
|
||||||
byte_offset: 24
|
byte_offset: 24
|
||||||
fieldset: CCMR_Input
|
fieldset: CCMR_Input_1CH_CMP
|
||||||
- name: CCMR_Output
|
- name: CCMR_Output
|
||||||
description: capture/compare mode register 1 (output mode)
|
description: capture/compare mode register 1 (output mode)
|
||||||
array:
|
array:
|
||||||
len: 1
|
len: 1
|
||||||
stride: 4
|
stride: 4
|
||||||
byte_offset: 24
|
byte_offset: 24
|
||||||
fieldset: CCMR_Output
|
fieldset: CCMR_Output_1CH_CMP
|
||||||
- name: CCER
|
- name: CCER
|
||||||
description: capture/compare enable register
|
description: capture/compare enable register
|
||||||
byte_offset: 32
|
byte_offset: 32
|
||||||
fieldset: CCER
|
fieldset: CCER_1CH_CMP
|
||||||
- name: CNT
|
- name: CNT
|
||||||
description: counter
|
description: counter
|
||||||
byte_offset: 36
|
byte_offset: 36
|
||||||
fieldset: CNT
|
fieldset: CNT_1CH_CMP
|
||||||
- name: PSC
|
- name: PSC
|
||||||
description: prescaler
|
description: prescaler
|
||||||
byte_offset: 40
|
byte_offset: 40
|
||||||
fieldset: PSC
|
fieldset: PSC_1CH_CMP
|
||||||
- name: ARR
|
- name: ARR
|
||||||
description: auto-reload register (Dither mode disabled)
|
description: auto-reload register (Dither mode disabled)
|
||||||
byte_offset: 44
|
byte_offset: 44
|
||||||
fieldset: ARR
|
fieldset: ARR_1CH_CMP
|
||||||
- name: ARR_DITHER
|
- name: ARR_DITHER
|
||||||
description: auto-reload register (Dither mode enabled)
|
description: auto-reload register (Dither mode enabled)
|
||||||
byte_offset: 44
|
byte_offset: 44
|
||||||
fieldset: ARR_DITHER
|
fieldset: ARR_DITHER_1CH_CMP
|
||||||
- name: RCR
|
- name: RCR
|
||||||
description: repetition counter register
|
description: repetition counter register
|
||||||
byte_offset: 48
|
byte_offset: 48
|
||||||
fieldset: RCR
|
fieldset: RCR_1CH_CMP
|
||||||
- name: CCR
|
- name: CCR
|
||||||
description: capture/compare register x (x=1-2) (Dither mode disabled)
|
description: capture/compare register x (x=1-2) (Dither mode disabled)
|
||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 4
|
stride: 4
|
||||||
byte_offset: 52
|
byte_offset: 52
|
||||||
fieldset: CCR
|
fieldset: CCR_1CH_CMP
|
||||||
- name: CCR_DITHER
|
- name: CCR_DITHER
|
||||||
description: capture/compare register x (x=1-2) (Dither mode enabled)
|
description: capture/compare register x (x=1-2) (Dither mode enabled)
|
||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 4
|
stride: 4
|
||||||
byte_offset: 52
|
byte_offset: 52
|
||||||
fieldset: CCR_DITHER
|
fieldset: CCR_DITHER_1CH_CMP
|
||||||
- name: BDTR
|
- name: BDTR
|
||||||
description: break and dead-time register
|
description: break and dead-time register
|
||||||
byte_offset: 68
|
byte_offset: 68
|
||||||
fieldset: BDTR
|
fieldset: BDTR_1CH_CMP
|
||||||
- name: DTR2
|
- name: DTR2
|
||||||
description: break and dead-time register
|
description: break and dead-time register
|
||||||
byte_offset: 84
|
byte_offset: 84
|
||||||
fieldset: DTR2
|
fieldset: DTR2_1CH_CMP
|
||||||
- name: TISEL
|
- name: TISEL
|
||||||
description: input selection register
|
description: input selection register
|
||||||
byte_offset: 92
|
byte_offset: 92
|
||||||
fieldset: TISEL
|
fieldset: TISEL_1CH_CMP
|
||||||
- name: AF1
|
- name: AF1
|
||||||
description: alternate function register 1
|
description: alternate function register 1
|
||||||
byte_offset: 96
|
byte_offset: 96
|
||||||
fieldset: AF1
|
fieldset: AF1_1CH_CMP
|
||||||
- name: AF2
|
- name: AF2
|
||||||
description: alternate function register 2
|
description: alternate function register 2
|
||||||
byte_offset: 100
|
byte_offset: 100
|
||||||
fieldset: AF2
|
fieldset: AF2_1CH_CMP
|
||||||
- name: DCR
|
- name: DCR
|
||||||
description: DMA control register
|
description: DMA control register
|
||||||
byte_offset: 988
|
byte_offset: 988
|
||||||
fieldset: DCR
|
fieldset: DCR_1CH_CMP
|
||||||
- name: DMAR
|
- name: DMAR
|
||||||
description: DMA address for full transfer
|
description: DMA address for full transfer
|
||||||
byte_offset: 992
|
byte_offset: 992
|
||||||
fieldset: DMAR
|
fieldset: DMAR_1CH_CMP
|
||||||
fieldset/AF1:
|
fieldset/AF1_1CH_CMP:
|
||||||
description: alternate function register 1
|
description: alternate function register 1
|
||||||
fields:
|
fields:
|
||||||
- name: BKINE
|
- name: BKINE
|
||||||
@ -133,21 +133,21 @@ fieldset/AF1:
|
|||||||
len: 4
|
len: 4
|
||||||
stride: 1
|
stride: 1
|
||||||
enum: BKINP
|
enum: BKINP
|
||||||
fieldset/AF2:
|
fieldset/AF2_1CH_CMP:
|
||||||
description: alternate function register 2
|
description: alternate function register 2
|
||||||
fields:
|
fields:
|
||||||
- name: OCRSEL
|
- name: OCRSEL
|
||||||
description: ocref_clr source selection
|
description: ocref_clr source selection
|
||||||
bit_offset: 16
|
bit_offset: 16
|
||||||
bit_size: 3
|
bit_size: 3
|
||||||
fieldset/ARR:
|
fieldset/ARR_1CH_CMP:
|
||||||
description: auto-reload register (Dither mode disabled)
|
description: auto-reload register (Dither mode disabled)
|
||||||
fields:
|
fields:
|
||||||
- name: ARR
|
- name: ARR
|
||||||
description: Auto-reload value
|
description: Auto-reload value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/ARR_DITHER:
|
fieldset/ARR_DITHER_1CH_CMP:
|
||||||
description: auto-reload register (Dither mode enabled)
|
description: auto-reload register (Dither mode enabled)
|
||||||
fields:
|
fields:
|
||||||
- name: DITHER
|
- name: DITHER
|
||||||
@ -158,7 +158,7 @@ fieldset/ARR_DITHER:
|
|||||||
description: Auto-reload value
|
description: Auto-reload value
|
||||||
bit_offset: 4
|
bit_offset: 4
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/BDTR:
|
fieldset/BDTR_1CH_CMP:
|
||||||
description: break and dead-time register
|
description: break and dead-time register
|
||||||
fields:
|
fields:
|
||||||
- name: DTG
|
- name: DTG
|
||||||
@ -227,7 +227,7 @@ fieldset/BDTR:
|
|||||||
len: 1
|
len: 1
|
||||||
stride: 1
|
stride: 1
|
||||||
enum: BKBID
|
enum: BKBID
|
||||||
fieldset/CCER:
|
fieldset/CCER_1CH_CMP:
|
||||||
description: capture/compare enable register
|
description: capture/compare enable register
|
||||||
fields:
|
fields:
|
||||||
- name: CCE
|
- name: CCE
|
||||||
@ -258,7 +258,7 @@ fieldset/CCER:
|
|||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 4
|
stride: 4
|
||||||
fieldset/CCMR_Input:
|
fieldset/CCMR_Input_1CH_CMP:
|
||||||
description: capture/compare mode register x (x=1) (input mode)
|
description: capture/compare mode register x (x=1) (input mode)
|
||||||
fields:
|
fields:
|
||||||
- name: CCS
|
- name: CCS
|
||||||
@ -284,7 +284,7 @@ fieldset/CCMR_Input:
|
|||||||
len: 2
|
len: 2
|
||||||
stride: 8
|
stride: 8
|
||||||
enum: FilterValue
|
enum: FilterValue
|
||||||
fieldset/CCMR_Output:
|
fieldset/CCMR_Output_1CH_CMP:
|
||||||
description: capture/compare mode register x (x=1) (output mode)
|
description: capture/compare mode register x (x=1) (output mode)
|
||||||
fields:
|
fields:
|
||||||
- name: CCS
|
- name: CCS
|
||||||
@ -324,14 +324,14 @@ fieldset/CCMR_Output:
|
|||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 8
|
stride: 8
|
||||||
fieldset/CCR:
|
fieldset/CCR_1CH_CMP:
|
||||||
description: capture/compare register x (x=1,2) (Dither mode disabled)
|
description: capture/compare register x (x=1,2) (Dither mode disabled)
|
||||||
fields:
|
fields:
|
||||||
- name: CCR
|
- name: CCR
|
||||||
description: capture/compare x (x=1,2) value
|
description: capture/compare x (x=1,2) value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/CCR_DITHER:
|
fieldset/CCR_DITHER_1CH_CMP:
|
||||||
description: capture/compare register x (x=1,2) (Dither mode enabled)
|
description: capture/compare register x (x=1,2) (Dither mode enabled)
|
||||||
fields:
|
fields:
|
||||||
- name: DITHER
|
- name: DITHER
|
||||||
@ -342,7 +342,7 @@ fieldset/CCR_DITHER:
|
|||||||
description: capture/compare x (x=1-2) value
|
description: capture/compare x (x=1-2) value
|
||||||
bit_offset: 4
|
bit_offset: 4
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/CNT:
|
fieldset/CNT_1CH_CMP:
|
||||||
description: counter
|
description: counter
|
||||||
fields:
|
fields:
|
||||||
- name: CNT
|
- name: CNT
|
||||||
@ -353,7 +353,7 @@ fieldset/CNT:
|
|||||||
description: UIF copy
|
description: UIF copy
|
||||||
bit_offset: 31
|
bit_offset: 31
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/CR1:
|
fieldset/CR1_1CH_CMP:
|
||||||
description: control register 1
|
description: control register 1
|
||||||
fields:
|
fields:
|
||||||
- name: CEN
|
- name: CEN
|
||||||
@ -390,7 +390,7 @@ fieldset/CR1:
|
|||||||
description: Dithering enable
|
description: Dithering enable
|
||||||
bit_offset: 12
|
bit_offset: 12
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/CR2:
|
fieldset/CR2_1CH_CMP:
|
||||||
description: control register 2
|
description: control register 2
|
||||||
fields:
|
fields:
|
||||||
- name: CCPC
|
- name: CCPC
|
||||||
@ -430,7 +430,7 @@ fieldset/CR2:
|
|||||||
array:
|
array:
|
||||||
len: 1
|
len: 1
|
||||||
stride: 2
|
stride: 2
|
||||||
fieldset/DCR:
|
fieldset/DCR_1CH_CMP:
|
||||||
description: DMA control register
|
description: DMA control register
|
||||||
fields:
|
fields:
|
||||||
- name: DBA
|
- name: DBA
|
||||||
@ -446,7 +446,7 @@ fieldset/DCR:
|
|||||||
bit_offset: 16
|
bit_offset: 16
|
||||||
bit_size: 4
|
bit_size: 4
|
||||||
enum: DBSS
|
enum: DBSS
|
||||||
fieldset/DIER:
|
fieldset/DIER_1CH_CMP:
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
fields:
|
fields:
|
||||||
- name: UIE
|
- name: UIE
|
||||||
@ -491,14 +491,14 @@ fieldset/DIER:
|
|||||||
description: Trigger DMA request enable
|
description: Trigger DMA request enable
|
||||||
bit_offset: 14
|
bit_offset: 14
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/DMAR:
|
fieldset/DMAR_1CH_CMP:
|
||||||
description: DMA address for full transfer
|
description: DMA address for full transfer
|
||||||
fields:
|
fields:
|
||||||
- name: DMAB
|
- name: DMAB
|
||||||
description: DMA register for burst accesses
|
description: DMA register for burst accesses
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 32
|
bit_size: 32
|
||||||
fieldset/DTR2:
|
fieldset/DTR2_1CH_CMP:
|
||||||
description: deadtime register 2
|
description: deadtime register 2
|
||||||
fields:
|
fields:
|
||||||
- name: DTGF
|
- name: DTGF
|
||||||
@ -514,7 +514,7 @@ fieldset/DTR2:
|
|||||||
description: Deadtime preload enable
|
description: Deadtime preload enable
|
||||||
bit_offset: 17
|
bit_offset: 17
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/EGR:
|
fieldset/EGR_1CH_CMP:
|
||||||
description: event generation register
|
description: event generation register
|
||||||
fields:
|
fields:
|
||||||
- name: UG
|
- name: UG
|
||||||
@ -543,21 +543,21 @@ fieldset/EGR:
|
|||||||
array:
|
array:
|
||||||
len: 1
|
len: 1
|
||||||
stride: 1
|
stride: 1
|
||||||
fieldset/PSC:
|
fieldset/PSC_1CH_CMP:
|
||||||
description: prescaler
|
description: prescaler
|
||||||
fields:
|
fields:
|
||||||
- name: PSC
|
- name: PSC
|
||||||
description: Prescaler value
|
description: Prescaler value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/RCR:
|
fieldset/RCR_1CH_CMP:
|
||||||
description: repetition counter register
|
description: repetition counter register
|
||||||
fields:
|
fields:
|
||||||
- name: REP
|
- name: REP
|
||||||
description: Repetition counter value
|
description: Repetition counter value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 8
|
bit_size: 8
|
||||||
fieldset/SMCR:
|
fieldset/SMCR_1CH_CMP:
|
||||||
description: slave mode control register
|
description: slave mode control register
|
||||||
fields:
|
fields:
|
||||||
- name: SMS
|
- name: SMS
|
||||||
@ -579,7 +579,7 @@ fieldset/SMCR:
|
|||||||
description: SMS preload enable
|
description: SMS preload enable
|
||||||
bit_offset: 24
|
bit_offset: 24
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/SR:
|
fieldset/SR_1CH_CMP:
|
||||||
description: status register
|
description: status register
|
||||||
fields:
|
fields:
|
||||||
- name: UIF
|
- name: UIF
|
||||||
@ -615,7 +615,7 @@ fieldset/SR:
|
|||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 1
|
stride: 1
|
||||||
fieldset/TISEL:
|
fieldset/TISEL_1CH_CMP:
|
||||||
description: input selection register
|
description: input selection register
|
||||||
fields:
|
fields:
|
||||||
- name: TISEL
|
- name: TISEL
|
||||||
|
@ -1,136 +1,136 @@
|
|||||||
block/TIM:
|
block/TIM_ADV:
|
||||||
description: Advanced-timers
|
description: Advanced Control timers
|
||||||
items:
|
items:
|
||||||
- name: CR1
|
- name: CR1
|
||||||
description: control register 1
|
description: control register 1
|
||||||
byte_offset: 0
|
byte_offset: 0
|
||||||
fieldset: CR1
|
fieldset: CR1_ADV
|
||||||
- name: CR2
|
- name: CR2
|
||||||
description: control register 2
|
description: control register 2
|
||||||
byte_offset: 4
|
byte_offset: 4
|
||||||
fieldset: CR2
|
fieldset: CR2_ADV
|
||||||
- name: SMCR
|
- name: SMCR
|
||||||
description: slave mode control register
|
description: slave mode control register
|
||||||
byte_offset: 8
|
byte_offset: 8
|
||||||
fieldset: SMCR
|
fieldset: SMCR_ADV
|
||||||
- name: DIER
|
- name: DIER
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
byte_offset: 12
|
byte_offset: 12
|
||||||
fieldset: DIER
|
fieldset: DIER_ADV
|
||||||
- name: SR
|
- name: SR
|
||||||
description: status register
|
description: status register
|
||||||
byte_offset: 16
|
byte_offset: 16
|
||||||
fieldset: SR
|
fieldset: SR_ADV
|
||||||
- name: EGR
|
- name: EGR
|
||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
fieldset: EGR
|
fieldset: EGR_ADV
|
||||||
- name: CCMR_Input
|
- name: CCMR_Input
|
||||||
description: capture/compare mode register 1-2 (input mode)
|
description: capture/compare mode register 1-2 (input mode)
|
||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 4
|
stride: 4
|
||||||
byte_offset: 24
|
byte_offset: 24
|
||||||
fieldset: CCMR_Input
|
fieldset: CCMR_Input_ADV
|
||||||
- name: CCMR_Output
|
- name: CCMR_Output
|
||||||
description: capture/compare mode register 1-2 (output mode)
|
description: capture/compare mode register 1-2 (output mode)
|
||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 4
|
stride: 4
|
||||||
byte_offset: 24
|
byte_offset: 24
|
||||||
fieldset: CCMR_Output
|
fieldset: CCMR_Output_ADV
|
||||||
- name: CCER
|
- name: CCER
|
||||||
description: capture/compare enable register
|
description: capture/compare enable register
|
||||||
byte_offset: 32
|
byte_offset: 32
|
||||||
fieldset: CCER
|
fieldset: CCER_ADV
|
||||||
- name: CNT
|
- name: CNT
|
||||||
description: counter
|
description: counter
|
||||||
byte_offset: 36
|
byte_offset: 36
|
||||||
fieldset: CNT
|
fieldset: CNT_ADV
|
||||||
- name: PSC
|
- name: PSC
|
||||||
description: prescaler
|
description: prescaler
|
||||||
byte_offset: 40
|
byte_offset: 40
|
||||||
fieldset: PSC
|
fieldset: PSC_ADV
|
||||||
- name: ARR
|
- name: ARR
|
||||||
description: auto-reload register (Dither mode disabled)
|
description: auto-reload register (Dither mode disabled)
|
||||||
byte_offset: 44
|
byte_offset: 44
|
||||||
fieldset: ARR
|
fieldset: ARR_ADV
|
||||||
- name: ARR_DITHER
|
- name: ARR_DITHER
|
||||||
description: auto-reload register (Dither mode enabled)
|
description: auto-reload register (Dither mode enabled)
|
||||||
byte_offset: 44
|
byte_offset: 44
|
||||||
fieldset: ARR_DITHER
|
fieldset: ARR_DITHER_ADV
|
||||||
- name: RCR
|
- name: RCR
|
||||||
description: repetition counter register
|
description: repetition counter register
|
||||||
byte_offset: 48
|
byte_offset: 48
|
||||||
fieldset: RCR
|
fieldset: RCR_ADV
|
||||||
- name: CCR
|
- name: CCR
|
||||||
description: capture/compare register x (x=1-4) (Dither mode disabled)
|
description: capture/compare register x (x=1-4) (Dither mode disabled)
|
||||||
array:
|
array:
|
||||||
len: 4
|
len: 4
|
||||||
stride: 4
|
stride: 4
|
||||||
byte_offset: 52
|
byte_offset: 52
|
||||||
fieldset: CCR
|
fieldset: CCR_ADV
|
||||||
- name: CCR_DITHER
|
- name: CCR_DITHER
|
||||||
description: capture/compare register x (x=1-4) (Dither mode enabled)
|
description: capture/compare register x (x=1-4) (Dither mode enabled)
|
||||||
array:
|
array:
|
||||||
len: 4
|
len: 4
|
||||||
stride: 4
|
stride: 4
|
||||||
byte_offset: 52
|
byte_offset: 52
|
||||||
fieldset: CCR_DITHER
|
fieldset: CCR_DITHER_ADV
|
||||||
- name: BDTR
|
- name: BDTR
|
||||||
description: break and dead-time register
|
description: break and dead-time register
|
||||||
byte_offset: 68
|
byte_offset: 68
|
||||||
fieldset: BDTR
|
fieldset: BDTR_ADV
|
||||||
- name: CCR5
|
- name: CCR5
|
||||||
description: capture/compare register 5 (Dither mode disabled)
|
description: capture/compare register 5 (Dither mode disabled)
|
||||||
byte_offset: 72
|
byte_offset: 72
|
||||||
fieldset: CCR5
|
fieldset: CCR5_ADV
|
||||||
- name: CCR5_DITHER
|
- name: CCR5_DITHER
|
||||||
description: capture/compare register 5 (Dither mode enabled)
|
description: capture/compare register 5 (Dither mode enabled)
|
||||||
byte_offset: 72
|
byte_offset: 72
|
||||||
fieldset: CCR5_DITHER
|
fieldset: CCR5_DITHER_ADV
|
||||||
- name: CCR6
|
- name: CCR6
|
||||||
description: capture/compare register 6 (Dither mode disabled)
|
description: capture/compare register 6 (Dither mode disabled)
|
||||||
byte_offset: 76
|
byte_offset: 76
|
||||||
fieldset: CCR
|
fieldset: CCR_ADV
|
||||||
- name: CCR6_DITHER
|
- name: CCR6_DITHER
|
||||||
description: capture/compare register 6 (Dither mode enabled)
|
description: capture/compare register 6 (Dither mode enabled)
|
||||||
byte_offset: 76
|
byte_offset: 76
|
||||||
fieldset: CCR_DITHER
|
fieldset: CCR_DITHER_ADV
|
||||||
- name: CCMR3
|
- name: CCMR3
|
||||||
description: capture/compare mode register 3
|
description: capture/compare mode register 3
|
||||||
byte_offset: 80
|
byte_offset: 80
|
||||||
fieldset: CCMR3
|
fieldset: CCMR3_ADV
|
||||||
- name: DTR2
|
- name: DTR2
|
||||||
description: break and dead-time register
|
description: break and dead-time register
|
||||||
byte_offset: 84
|
byte_offset: 84
|
||||||
fieldset: DTR2
|
fieldset: DTR2_ADV
|
||||||
- name: ECR
|
- name: ECR
|
||||||
description: encoder control register
|
description: encoder control register
|
||||||
byte_offset: 88
|
byte_offset: 88
|
||||||
fieldset: ECR
|
fieldset: ECR_ADV
|
||||||
- name: TISEL
|
- name: TISEL
|
||||||
description: input selection register
|
description: input selection register
|
||||||
byte_offset: 92
|
byte_offset: 92
|
||||||
fieldset: TISEL
|
fieldset: TISEL_ADV
|
||||||
- name: AF1
|
- name: AF1
|
||||||
description: alternate function register 1
|
description: alternate function register 1
|
||||||
byte_offset: 96
|
byte_offset: 96
|
||||||
fieldset: AF1
|
fieldset: AF1_ADV
|
||||||
- name: AF2
|
- name: AF2
|
||||||
description: alternate function register 2
|
description: alternate function register 2
|
||||||
byte_offset: 100
|
byte_offset: 100
|
||||||
fieldset: AF2
|
fieldset: AF2_ADV
|
||||||
- name: DCR
|
- name: DCR
|
||||||
description: DMA control register
|
description: DMA control register
|
||||||
byte_offset: 988
|
byte_offset: 988
|
||||||
fieldset: DCR
|
fieldset: DCR_ADV
|
||||||
- name: DMAR
|
- name: DMAR
|
||||||
description: DMA address for full transfer
|
description: DMA address for full transfer
|
||||||
byte_offset: 992
|
byte_offset: 992
|
||||||
fieldset: DMAR
|
fieldset: DMAR_ADV
|
||||||
fieldset/AF1:
|
fieldset/AF1_ADV:
|
||||||
description: alternate function register 1
|
description: alternate function register 1
|
||||||
fields:
|
fields:
|
||||||
- name: BKINE
|
- name: BKINE
|
||||||
@ -161,7 +161,7 @@ fieldset/AF1:
|
|||||||
description: etr_in source selection
|
description: etr_in source selection
|
||||||
bit_offset: 14
|
bit_offset: 14
|
||||||
bit_size: 4
|
bit_size: 4
|
||||||
fieldset/AF2:
|
fieldset/AF2_ADV:
|
||||||
description: alternate function register 2
|
description: alternate function register 2
|
||||||
fields:
|
fields:
|
||||||
- name: BK2INE
|
- name: BK2INE
|
||||||
@ -192,14 +192,14 @@ fieldset/AF2:
|
|||||||
description: ocref_clr source selection
|
description: ocref_clr source selection
|
||||||
bit_offset: 16
|
bit_offset: 16
|
||||||
bit_size: 3
|
bit_size: 3
|
||||||
fieldset/ARR:
|
fieldset/ARR_ADV:
|
||||||
description: auto-reload register (Dither mode disabled)
|
description: auto-reload register (Dither mode disabled)
|
||||||
fields:
|
fields:
|
||||||
- name: ARR
|
- name: ARR
|
||||||
description: Auto-reload value
|
description: Auto-reload value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/ARR_DITHER:
|
fieldset/ARR_DITHER_ADV:
|
||||||
description: auto-reload register (Dither mode enabled)
|
description: auto-reload register (Dither mode enabled)
|
||||||
fields:
|
fields:
|
||||||
- name: DITHER
|
- name: DITHER
|
||||||
@ -210,7 +210,7 @@ fieldset/ARR_DITHER:
|
|||||||
description: Auto-reload value
|
description: Auto-reload value
|
||||||
bit_offset: 4
|
bit_offset: 4
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/BDTR:
|
fieldset/BDTR_ADV:
|
||||||
description: break and dead-time register
|
description: break and dead-time register
|
||||||
fields:
|
fields:
|
||||||
- name: DTG
|
- name: DTG
|
||||||
@ -279,7 +279,7 @@ fieldset/BDTR:
|
|||||||
len: 2
|
len: 2
|
||||||
stride: 1
|
stride: 1
|
||||||
enum: BKBID
|
enum: BKBID
|
||||||
fieldset/CCER:
|
fieldset/CCER_ADV:
|
||||||
description: capture/compare enable register
|
description: capture/compare enable register
|
||||||
fields:
|
fields:
|
||||||
- name: CCE
|
- name: CCE
|
||||||
@ -310,7 +310,7 @@ fieldset/CCER:
|
|||||||
array:
|
array:
|
||||||
len: 4
|
len: 4
|
||||||
stride: 4
|
stride: 4
|
||||||
fieldset/CCMR3:
|
fieldset/CCMR3_ADV:
|
||||||
description: capture/compare mode register 3
|
description: capture/compare mode register 3
|
||||||
fields:
|
fields:
|
||||||
- name: OCFE
|
- name: OCFE
|
||||||
@ -342,7 +342,7 @@ fieldset/CCMR3:
|
|||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 8
|
stride: 8
|
||||||
fieldset/CCMR_Input:
|
fieldset/CCMR_Input_ADV:
|
||||||
description: capture/compare mode register x (x=1-2) (input mode)
|
description: capture/compare mode register x (x=1-2) (input mode)
|
||||||
fields:
|
fields:
|
||||||
- name: CCS
|
- name: CCS
|
||||||
@ -368,7 +368,7 @@ fieldset/CCMR_Input:
|
|||||||
len: 2
|
len: 2
|
||||||
stride: 8
|
stride: 8
|
||||||
enum: FilterValue
|
enum: FilterValue
|
||||||
fieldset/CCMR_Output:
|
fieldset/CCMR_Output_ADV:
|
||||||
description: capture/compare mode register x (x=1-3) (output mode)
|
description: capture/compare mode register x (x=1-3) (output mode)
|
||||||
fields:
|
fields:
|
||||||
- name: CCS
|
- name: CCS
|
||||||
@ -408,14 +408,14 @@ fieldset/CCMR_Output:
|
|||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 8
|
stride: 8
|
||||||
fieldset/CCR:
|
fieldset/CCR_ADV:
|
||||||
description: capture/compare register x (x=1-4,6) (Dither mode disabled)
|
description: capture/compare register x (x=1-4,6) (Dither mode disabled)
|
||||||
fields:
|
fields:
|
||||||
- name: CCR
|
- name: CCR
|
||||||
description: capture/compare x (x=1-4,6) value
|
description: capture/compare x (x=1-4,6) value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/CCR5:
|
fieldset/CCR5_ADV:
|
||||||
extends: CCR
|
extends: CCR
|
||||||
description: capture/compare register 5 (Dither mode disabled)
|
description: capture/compare register 5 (Dither mode disabled)
|
||||||
fields:
|
fields:
|
||||||
@ -427,7 +427,7 @@ fieldset/CCR5:
|
|||||||
len: 3
|
len: 3
|
||||||
stride: 1
|
stride: 1
|
||||||
enum: GC5C
|
enum: GC5C
|
||||||
fieldset/CCR5_DITHER:
|
fieldset/CCR5_DITHER_ADV:
|
||||||
extends: CCR_DITHER
|
extends: CCR_DITHER
|
||||||
description: capture/compare register 5 (Dither mode enabled)
|
description: capture/compare register 5 (Dither mode enabled)
|
||||||
fields:
|
fields:
|
||||||
@ -439,7 +439,7 @@ fieldset/CCR5_DITHER:
|
|||||||
len: 3
|
len: 3
|
||||||
stride: 1
|
stride: 1
|
||||||
enum: GC5C
|
enum: GC5C
|
||||||
fieldset/CCR_DITHER:
|
fieldset/CCR_DITHER_ADV:
|
||||||
description: capture/compare register x (x=1-4,6) (Dither mode enabled)
|
description: capture/compare register x (x=1-4,6) (Dither mode enabled)
|
||||||
fields:
|
fields:
|
||||||
- name: DITHER
|
- name: DITHER
|
||||||
@ -450,7 +450,7 @@ fieldset/CCR_DITHER:
|
|||||||
description: capture/compare x (x=1-4,6) value
|
description: capture/compare x (x=1-4,6) value
|
||||||
bit_offset: 4
|
bit_offset: 4
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/CNT:
|
fieldset/CNT_ADV:
|
||||||
description: counter
|
description: counter
|
||||||
fields:
|
fields:
|
||||||
- name: CNT
|
- name: CNT
|
||||||
@ -461,7 +461,7 @@ fieldset/CNT:
|
|||||||
description: UIF copy
|
description: UIF copy
|
||||||
bit_offset: 31
|
bit_offset: 31
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/CR1:
|
fieldset/CR1_ADV:
|
||||||
description: control register 1
|
description: control register 1
|
||||||
fields:
|
fields:
|
||||||
- name: CEN
|
- name: CEN
|
||||||
@ -508,7 +508,7 @@ fieldset/CR1:
|
|||||||
description: Dithering enable
|
description: Dithering enable
|
||||||
bit_offset: 12
|
bit_offset: 12
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/CR2:
|
fieldset/CR2_ADV:
|
||||||
description: control register 2
|
description: control register 2
|
||||||
fields:
|
fields:
|
||||||
- name: CCPC
|
- name: CCPC
|
||||||
@ -553,7 +553,7 @@ fieldset/CR2:
|
|||||||
bit_offset: 20
|
bit_offset: 20
|
||||||
bit_size: 4
|
bit_size: 4
|
||||||
enum: MMS2
|
enum: MMS2
|
||||||
fieldset/DCR:
|
fieldset/DCR_ADV:
|
||||||
description: DMA control register
|
description: DMA control register
|
||||||
fields:
|
fields:
|
||||||
- name: DBA
|
- name: DBA
|
||||||
@ -569,7 +569,7 @@ fieldset/DCR:
|
|||||||
bit_offset: 16
|
bit_offset: 16
|
||||||
bit_size: 4
|
bit_size: 4
|
||||||
enum: DBSS
|
enum: DBSS
|
||||||
fieldset/DIER:
|
fieldset/DIER_ADV:
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
fields:
|
fields:
|
||||||
- name: UIE
|
- name: UIE
|
||||||
@ -630,14 +630,14 @@ fieldset/DIER:
|
|||||||
description: Transition error interrupt enable
|
description: Transition error interrupt enable
|
||||||
bit_offset: 23
|
bit_offset: 23
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/DMAR:
|
fieldset/DMAR_ADV:
|
||||||
description: DMA address for full transfer
|
description: DMA address for full transfer
|
||||||
fields:
|
fields:
|
||||||
- name: DMAB
|
- name: DMAB
|
||||||
description: DMA register for burst accesses
|
description: DMA register for burst accesses
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 32
|
bit_size: 32
|
||||||
fieldset/DTR2:
|
fieldset/DTR2_ADV:
|
||||||
description: deadtime register 2
|
description: deadtime register 2
|
||||||
fields:
|
fields:
|
||||||
- name: DTGF
|
- name: DTGF
|
||||||
@ -653,7 +653,7 @@ fieldset/DTR2:
|
|||||||
description: Deadtime preload enable
|
description: Deadtime preload enable
|
||||||
bit_offset: 17
|
bit_offset: 17
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/ECR:
|
fieldset/ECR_ADV:
|
||||||
description: encoder control register
|
description: encoder control register
|
||||||
fields:
|
fields:
|
||||||
- name: IE
|
- name: IE
|
||||||
@ -687,7 +687,7 @@ fieldset/ECR:
|
|||||||
description: Pulse width prescaler
|
description: Pulse width prescaler
|
||||||
bit_offset: 24
|
bit_offset: 24
|
||||||
bit_size: 2
|
bit_size: 2
|
||||||
fieldset/EGR:
|
fieldset/EGR_ADV:
|
||||||
description: event generation register
|
description: event generation register
|
||||||
fields:
|
fields:
|
||||||
- name: UG
|
- name: UG
|
||||||
@ -716,21 +716,21 @@ fieldset/EGR:
|
|||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 1
|
stride: 1
|
||||||
fieldset/PSC:
|
fieldset/PSC_ADV:
|
||||||
description: prescaler
|
description: prescaler
|
||||||
fields:
|
fields:
|
||||||
- name: PSC
|
- name: PSC
|
||||||
description: Prescaler value
|
description: Prescaler value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/RCR:
|
fieldset/RCR_ADV:
|
||||||
description: repetition counter register
|
description: repetition counter register
|
||||||
fields:
|
fields:
|
||||||
- name: REP
|
- name: REP
|
||||||
description: Repetition counter value
|
description: Repetition counter value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/SMCR:
|
fieldset/SMCR_ADV:
|
||||||
description: slave mode control register
|
description: slave mode control register
|
||||||
fields:
|
fields:
|
||||||
- name: SMS
|
- name: SMS
|
||||||
@ -781,7 +781,7 @@ fieldset/SMCR:
|
|||||||
bit_offset: 25
|
bit_offset: 25
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
enum: SMSPS
|
enum: SMSPS
|
||||||
fieldset/SR:
|
fieldset/SR_ADV:
|
||||||
description: status register
|
description: status register
|
||||||
fields:
|
fields:
|
||||||
- name: UIF
|
- name: UIF
|
||||||
@ -841,7 +841,7 @@ fieldset/SR:
|
|||||||
description: Transition error interrupt flag
|
description: Transition error interrupt flag
|
||||||
bit_offset: 23
|
bit_offset: 23
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/TISEL:
|
fieldset/TISEL_ADV:
|
||||||
description: input selection register
|
description: input selection register
|
||||||
fields:
|
fields:
|
||||||
- name: TISEL
|
- name: TISEL
|
||||||
|
@ -1,51 +1,51 @@
|
|||||||
block/TIM:
|
block/TIM_BASIC:
|
||||||
description: Advanced-timers
|
description: Basic timers
|
||||||
items:
|
items:
|
||||||
- name: CR1
|
- name: CR1
|
||||||
description: control register 1
|
description: control register 1
|
||||||
byte_offset: 0
|
byte_offset: 0
|
||||||
fieldset: CR1
|
fieldset: CR1_BASIC
|
||||||
- name: CR2
|
- name: CR2
|
||||||
description: control register 2
|
description: control register 2
|
||||||
byte_offset: 4
|
byte_offset: 4
|
||||||
fieldset: CR2
|
fieldset: CR2_BASIC
|
||||||
- name: DIER
|
- name: DIER
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
byte_offset: 12
|
byte_offset: 12
|
||||||
fieldset: DIER
|
fieldset: DIER_BASIC
|
||||||
- name: SR
|
- name: SR
|
||||||
description: status register
|
description: status register
|
||||||
byte_offset: 16
|
byte_offset: 16
|
||||||
fieldset: SR
|
fieldset: SR_BASIC
|
||||||
- name: EGR
|
- name: EGR
|
||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
fieldset: EGR
|
fieldset: EGR_BASIC
|
||||||
- name: CNT
|
- name: CNT
|
||||||
description: counter
|
description: counter
|
||||||
byte_offset: 36
|
byte_offset: 36
|
||||||
fieldset: CNT
|
fieldset: CNT_BASIC
|
||||||
- name: PSC
|
- name: PSC
|
||||||
description: prescaler
|
description: prescaler
|
||||||
byte_offset: 40
|
byte_offset: 40
|
||||||
fieldset: PSC
|
fieldset: PSC_BASIC
|
||||||
- name: ARR
|
- name: ARR
|
||||||
description: auto-reload register (Dither mode disabled)
|
description: auto-reload register (Dither mode disabled)
|
||||||
byte_offset: 44
|
byte_offset: 44
|
||||||
fieldset: ARR
|
fieldset: ARR_BASIC
|
||||||
- name: ARR_DITHER
|
- name: ARR_DITHER
|
||||||
description: auto-reload register (Dither mode enabled)
|
description: auto-reload register (Dither mode enabled)
|
||||||
byte_offset: 44
|
byte_offset: 44
|
||||||
fieldset: ARR_DITHER
|
fieldset: ARR_DITHER_BASIC
|
||||||
fieldset/ARR:
|
fieldset/ARR_BASIC:
|
||||||
description: auto-reload register (Dither mode disabled)
|
description: auto-reload register (Dither mode disabled)
|
||||||
fields:
|
fields:
|
||||||
- name: ARR
|
- name: ARR
|
||||||
description: Auto-reload value
|
description: Auto-reload value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/ARR_DITHER:
|
fieldset/ARR_DITHER_BASIC:
|
||||||
description: auto-reload register (Dither mode enabled)
|
description: auto-reload register (Dither mode enabled)
|
||||||
fields:
|
fields:
|
||||||
- name: DITHER
|
- name: DITHER
|
||||||
@ -56,7 +56,7 @@ fieldset/ARR_DITHER:
|
|||||||
description: Auto-reload value
|
description: Auto-reload value
|
||||||
bit_offset: 4
|
bit_offset: 4
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/CNT:
|
fieldset/CNT_BASIC:
|
||||||
description: counter
|
description: counter
|
||||||
fields:
|
fields:
|
||||||
- name: CNT
|
- name: CNT
|
||||||
@ -67,7 +67,7 @@ fieldset/CNT:
|
|||||||
description: UIF copy
|
description: UIF copy
|
||||||
bit_offset: 31
|
bit_offset: 31
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/CR1:
|
fieldset/CR1_BASIC:
|
||||||
description: control register 1
|
description: control register 1
|
||||||
fields:
|
fields:
|
||||||
- name: CEN
|
- name: CEN
|
||||||
@ -99,7 +99,7 @@ fieldset/CR1:
|
|||||||
description: Dithering enable
|
description: Dithering enable
|
||||||
bit_offset: 12
|
bit_offset: 12
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/CR2:
|
fieldset/CR2_BASIC:
|
||||||
description: control register 2
|
description: control register 2
|
||||||
fields:
|
fields:
|
||||||
- name: MMS
|
- name: MMS
|
||||||
@ -107,7 +107,7 @@ fieldset/CR2:
|
|||||||
bit_offset: 4
|
bit_offset: 4
|
||||||
bit_size: 3
|
bit_size: 3
|
||||||
enum: MMS
|
enum: MMS
|
||||||
fieldset/DIER:
|
fieldset/DIER_BASIC:
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
fields:
|
fields:
|
||||||
- name: UIE
|
- name: UIE
|
||||||
@ -118,21 +118,21 @@ fieldset/DIER:
|
|||||||
description: Update DMA request enable
|
description: Update DMA request enable
|
||||||
bit_offset: 8
|
bit_offset: 8
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/EGR:
|
fieldset/EGR_BASIC:
|
||||||
description: event generation register
|
description: event generation register
|
||||||
fields:
|
fields:
|
||||||
- name: UG
|
- name: UG
|
||||||
description: Update generation
|
description: Update generation
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/PSC:
|
fieldset/PSC_BASIC:
|
||||||
description: prescaler
|
description: prescaler
|
||||||
fields:
|
fields:
|
||||||
- name: PSC
|
- name: PSC
|
||||||
description: Prescaler value
|
description: Prescaler value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/SR:
|
fieldset/SR_BASIC:
|
||||||
description: status register
|
description: status register
|
||||||
fields:
|
fields:
|
||||||
- name: UIF
|
- name: UIF
|
||||||
|
@ -1,129 +1,129 @@
|
|||||||
block/TIM:
|
block/TIM_GP16:
|
||||||
description: Advanced-timers
|
description: General purpose 16-bit timers
|
||||||
items:
|
items:
|
||||||
- name: CR1
|
- name: CR1
|
||||||
description: control register 1
|
description: control register 1
|
||||||
byte_offset: 0
|
byte_offset: 0
|
||||||
fieldset: CR1
|
fieldset: CR1_GP16
|
||||||
- name: CR2
|
- name: CR2
|
||||||
description: control register 2
|
description: control register 2
|
||||||
byte_offset: 4
|
byte_offset: 4
|
||||||
fieldset: CR2
|
fieldset: CR2_GP16
|
||||||
- name: SMCR
|
- name: SMCR
|
||||||
description: slave mode control register
|
description: slave mode control register
|
||||||
byte_offset: 8
|
byte_offset: 8
|
||||||
fieldset: SMCR
|
fieldset: SMCR_GP16
|
||||||
- name: DIER
|
- name: DIER
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
byte_offset: 12
|
byte_offset: 12
|
||||||
fieldset: DIER
|
fieldset: DIER_GP16
|
||||||
- name: SR
|
- name: SR
|
||||||
description: status register
|
description: status register
|
||||||
byte_offset: 16
|
byte_offset: 16
|
||||||
fieldset: SR
|
fieldset: SR_GP16
|
||||||
- name: EGR
|
- name: EGR
|
||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
fieldset: EGR
|
fieldset: EGR_GP16
|
||||||
- name: CCMR_Input
|
- name: CCMR_Input
|
||||||
description: capture/compare mode register 1-2 (input mode)
|
description: capture/compare mode register 1-2 (input mode)
|
||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 4
|
stride: 4
|
||||||
byte_offset: 24
|
byte_offset: 24
|
||||||
fieldset: CCMR_Input
|
fieldset: CCMR_Input_GP16
|
||||||
- name: CCMR_Output
|
- name: CCMR_Output
|
||||||
description: capture/compare mode register 1-2 (output mode)
|
description: capture/compare mode register 1-2 (output mode)
|
||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 4
|
stride: 4
|
||||||
byte_offset: 24
|
byte_offset: 24
|
||||||
fieldset: CCMR_Output
|
fieldset: CCMR_Output_GP16
|
||||||
- name: CCER
|
- name: CCER
|
||||||
description: capture/compare enable register
|
description: capture/compare enable register
|
||||||
byte_offset: 32
|
byte_offset: 32
|
||||||
fieldset: CCER
|
fieldset: CCER_GP16
|
||||||
- name: CNT
|
- name: CNT
|
||||||
description: counter
|
description: counter
|
||||||
byte_offset: 36
|
byte_offset: 36
|
||||||
fieldset: CNT
|
fieldset: CNT_GP16
|
||||||
- name: PSC
|
- name: PSC
|
||||||
description: prescaler
|
description: prescaler
|
||||||
byte_offset: 40
|
byte_offset: 40
|
||||||
fieldset: PSC
|
fieldset: PSC_GP16
|
||||||
- name: ARR
|
- name: ARR
|
||||||
description: auto-reload register (Dither mode disabled)
|
description: auto-reload register (Dither mode disabled)
|
||||||
byte_offset: 44
|
byte_offset: 44
|
||||||
fieldset: ARR
|
fieldset: ARR_GP16
|
||||||
- name: ARR_DITHER
|
- name: ARR_DITHER
|
||||||
description: auto-reload register (Dither mode enabled)
|
description: auto-reload register (Dither mode enabled)
|
||||||
byte_offset: 44
|
byte_offset: 44
|
||||||
fieldset: ARR_DITHER
|
fieldset: ARR_DITHER_GP16
|
||||||
- name: RCR
|
- name: RCR
|
||||||
description: repetition counter register
|
description: repetition counter register
|
||||||
byte_offset: 48
|
byte_offset: 48
|
||||||
fieldset: RCR
|
fieldset: RCR_GP16
|
||||||
- name: CCR
|
- name: CCR
|
||||||
description: capture/compare register x (x=1-4) (Dither mode disabled)
|
description: capture/compare register x (x=1-4) (Dither mode disabled)
|
||||||
array:
|
array:
|
||||||
len: 4
|
len: 4
|
||||||
stride: 4
|
stride: 4
|
||||||
byte_offset: 52
|
byte_offset: 52
|
||||||
fieldset: CCR
|
fieldset: CCR_GP16
|
||||||
- name: CCR_DITHER
|
- name: CCR_DITHER
|
||||||
description: capture/compare register x (x=1-4) (Dither mode enabled)
|
description: capture/compare register x (x=1-4) (Dither mode enabled)
|
||||||
array:
|
array:
|
||||||
len: 4
|
len: 4
|
||||||
stride: 4
|
stride: 4
|
||||||
byte_offset: 52
|
byte_offset: 52
|
||||||
fieldset: CCR_DITHER
|
fieldset: CCR_DITHER_GP16
|
||||||
- name: ECR
|
- name: ECR
|
||||||
description: encoder control register
|
description: encoder control register
|
||||||
byte_offset: 88
|
byte_offset: 88
|
||||||
fieldset: ECR
|
fieldset: ECR_GP16
|
||||||
- name: TISEL
|
- name: TISEL
|
||||||
description: input selection register
|
description: input selection register
|
||||||
byte_offset: 92
|
byte_offset: 92
|
||||||
fieldset: TISEL
|
fieldset: TISEL_GP16
|
||||||
- name: AF1
|
- name: AF1
|
||||||
description: alternate function register 1
|
description: alternate function register 1
|
||||||
byte_offset: 96
|
byte_offset: 96
|
||||||
fieldset: AF1
|
fieldset: AF1_GP16
|
||||||
- name: AF2
|
- name: AF2
|
||||||
description: alternate function register 2
|
description: alternate function register 2
|
||||||
byte_offset: 100
|
byte_offset: 100
|
||||||
fieldset: AF2
|
fieldset: AF2_GP16
|
||||||
- name: DCR
|
- name: DCR
|
||||||
description: DMA control register
|
description: DMA control register
|
||||||
byte_offset: 988
|
byte_offset: 988
|
||||||
fieldset: DCR
|
fieldset: DCR_GP16
|
||||||
- name: DMAR
|
- name: DMAR
|
||||||
description: DMA address for full transfer
|
description: DMA address for full transfer
|
||||||
byte_offset: 992
|
byte_offset: 992
|
||||||
fieldset: DMAR
|
fieldset: DMAR_GP16
|
||||||
fieldset/AF1:
|
fieldset/AF1_GP16:
|
||||||
description: alternate function register 1
|
description: alternate function register 1
|
||||||
fields:
|
fields:
|
||||||
- name: ETRSEL
|
- name: ETRSEL
|
||||||
description: etr_in source selection
|
description: etr_in source selection
|
||||||
bit_offset: 14
|
bit_offset: 14
|
||||||
bit_size: 4
|
bit_size: 4
|
||||||
fieldset/AF2:
|
fieldset/AF2_GP16:
|
||||||
description: alternate function register 2
|
description: alternate function register 2
|
||||||
fields:
|
fields:
|
||||||
- name: OCRSEL
|
- name: OCRSEL
|
||||||
description: ocref_clr source selection
|
description: ocref_clr source selection
|
||||||
bit_offset: 16
|
bit_offset: 16
|
||||||
bit_size: 3
|
bit_size: 3
|
||||||
fieldset/ARR:
|
fieldset/ARR_GP16:
|
||||||
description: auto-reload register (Dither mode disabled)
|
description: auto-reload register (Dither mode disabled)
|
||||||
fields:
|
fields:
|
||||||
- name: ARR
|
- name: ARR
|
||||||
description: Auto-reload value
|
description: Auto-reload value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/ARR_DITHER:
|
fieldset/ARR_DITHER_GP16:
|
||||||
description: auto-reload register (Dither mode enabled)
|
description: auto-reload register (Dither mode enabled)
|
||||||
fields:
|
fields:
|
||||||
- name: DITHER
|
- name: DITHER
|
||||||
@ -134,7 +134,7 @@ fieldset/ARR_DITHER:
|
|||||||
description: Auto-reload value
|
description: Auto-reload value
|
||||||
bit_offset: 4
|
bit_offset: 4
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/CCER:
|
fieldset/CCER_GP16:
|
||||||
description: capture/compare enable register
|
description: capture/compare enable register
|
||||||
fields:
|
fields:
|
||||||
- name: CCE
|
- name: CCE
|
||||||
@ -158,7 +158,7 @@ fieldset/CCER:
|
|||||||
array:
|
array:
|
||||||
len: 4
|
len: 4
|
||||||
stride: 4
|
stride: 4
|
||||||
fieldset/CCMR_Input:
|
fieldset/CCMR_Input_GP16:
|
||||||
description: capture/compare mode register x (x=1-2) (input mode)
|
description: capture/compare mode register x (x=1-2) (input mode)
|
||||||
fields:
|
fields:
|
||||||
- name: CCS
|
- name: CCS
|
||||||
@ -184,7 +184,7 @@ fieldset/CCMR_Input:
|
|||||||
len: 2
|
len: 2
|
||||||
stride: 8
|
stride: 8
|
||||||
enum: FilterValue
|
enum: FilterValue
|
||||||
fieldset/CCMR_Output:
|
fieldset/CCMR_Output_GP16:
|
||||||
description: capture/compare mode register x (x=1-3) (output mode)
|
description: capture/compare mode register x (x=1-3) (output mode)
|
||||||
fields:
|
fields:
|
||||||
- name: CCS
|
- name: CCS
|
||||||
@ -224,14 +224,14 @@ fieldset/CCMR_Output:
|
|||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 8
|
stride: 8
|
||||||
fieldset/CCR:
|
fieldset/CCR_GP16:
|
||||||
description: capture/compare register x (x=1-4,6) (Dither mode disabled)
|
description: capture/compare register x (x=1-4,6) (Dither mode disabled)
|
||||||
fields:
|
fields:
|
||||||
- name: CCR
|
- name: CCR
|
||||||
description: capture/compare x (x=1-4,6) value
|
description: capture/compare x (x=1-4,6) value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/CCR_DITHER:
|
fieldset/CCR_DITHER_GP16:
|
||||||
description: capture/compare register x (x=1-4,6) (Dither mode enabled)
|
description: capture/compare register x (x=1-4,6) (Dither mode enabled)
|
||||||
fields:
|
fields:
|
||||||
- name: DITHER
|
- name: DITHER
|
||||||
@ -242,7 +242,7 @@ fieldset/CCR_DITHER:
|
|||||||
description: capture/compare x (x=1-4,6) value
|
description: capture/compare x (x=1-4,6) value
|
||||||
bit_offset: 4
|
bit_offset: 4
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/CNT:
|
fieldset/CNT_GP16:
|
||||||
description: counter
|
description: counter
|
||||||
fields:
|
fields:
|
||||||
- name: CNT
|
- name: CNT
|
||||||
@ -253,7 +253,7 @@ fieldset/CNT:
|
|||||||
description: UIF copy
|
description: UIF copy
|
||||||
bit_offset: 31
|
bit_offset: 31
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/CR1:
|
fieldset/CR1_GP16:
|
||||||
description: control register 1
|
description: control register 1
|
||||||
fields:
|
fields:
|
||||||
- name: CEN
|
- name: CEN
|
||||||
@ -300,7 +300,7 @@ fieldset/CR1:
|
|||||||
description: Dithering enable
|
description: Dithering enable
|
||||||
bit_offset: 12
|
bit_offset: 12
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/CR2:
|
fieldset/CR2_GP16:
|
||||||
description: control register 2
|
description: control register 2
|
||||||
fields:
|
fields:
|
||||||
- name: CCDS
|
- name: CCDS
|
||||||
@ -318,7 +318,7 @@ fieldset/CR2:
|
|||||||
bit_offset: 7
|
bit_offset: 7
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
enum: TI1S
|
enum: TI1S
|
||||||
fieldset/DCR:
|
fieldset/DCR_GP16:
|
||||||
description: DMA control register
|
description: DMA control register
|
||||||
fields:
|
fields:
|
||||||
- name: DBA
|
- name: DBA
|
||||||
@ -334,7 +334,7 @@ fieldset/DCR:
|
|||||||
bit_offset: 16
|
bit_offset: 16
|
||||||
bit_size: 4
|
bit_size: 4
|
||||||
enum: DBSS
|
enum: DBSS
|
||||||
fieldset/DIER:
|
fieldset/DIER_GP16:
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
fields:
|
fields:
|
||||||
- name: UIE
|
- name: UIE
|
||||||
@ -387,14 +387,14 @@ fieldset/DIER:
|
|||||||
description: Transition error interrupt enable
|
description: Transition error interrupt enable
|
||||||
bit_offset: 23
|
bit_offset: 23
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/DMAR:
|
fieldset/DMAR_GP16:
|
||||||
description: DMA address for full transfer
|
description: DMA address for full transfer
|
||||||
fields:
|
fields:
|
||||||
- name: DMAB
|
- name: DMAB
|
||||||
description: DMA register for burst accesses
|
description: DMA register for burst accesses
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 32
|
bit_size: 32
|
||||||
fieldset/ECR:
|
fieldset/ECR_GP16:
|
||||||
description: encoder control register
|
description: encoder control register
|
||||||
fields:
|
fields:
|
||||||
- name: IE
|
- name: IE
|
||||||
@ -428,7 +428,7 @@ fieldset/ECR:
|
|||||||
description: Pulse width prescaler
|
description: Pulse width prescaler
|
||||||
bit_offset: 24
|
bit_offset: 24
|
||||||
bit_size: 2
|
bit_size: 2
|
||||||
fieldset/EGR:
|
fieldset/EGR_GP16:
|
||||||
description: event generation register
|
description: event generation register
|
||||||
fields:
|
fields:
|
||||||
- name: UG
|
- name: UG
|
||||||
@ -446,21 +446,21 @@ fieldset/EGR:
|
|||||||
description: Trigger generation
|
description: Trigger generation
|
||||||
bit_offset: 6
|
bit_offset: 6
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/PSC:
|
fieldset/PSC_GP16:
|
||||||
description: prescaler
|
description: prescaler
|
||||||
fields:
|
fields:
|
||||||
- name: PSC
|
- name: PSC
|
||||||
description: Prescaler value
|
description: Prescaler value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/RCR:
|
fieldset/RCR_GP16:
|
||||||
description: repetition counter register
|
description: repetition counter register
|
||||||
fields:
|
fields:
|
||||||
- name: REP
|
- name: REP
|
||||||
description: Repetition counter value
|
description: Repetition counter value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/SMCR:
|
fieldset/SMCR_GP16:
|
||||||
description: slave mode control register
|
description: slave mode control register
|
||||||
fields:
|
fields:
|
||||||
- name: SMS
|
- name: SMS
|
||||||
@ -506,7 +506,7 @@ fieldset/SMCR:
|
|||||||
bit_offset: 25
|
bit_offset: 25
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
enum: SMSPS
|
enum: SMSPS
|
||||||
fieldset/SR:
|
fieldset/SR_GP16:
|
||||||
description: status register
|
description: status register
|
||||||
fields:
|
fields:
|
||||||
- name: UIF
|
- name: UIF
|
||||||
@ -547,7 +547,7 @@ fieldset/SR:
|
|||||||
description: Transition error interrupt flag
|
description: Transition error interrupt flag
|
||||||
bit_offset: 23
|
bit_offset: 23
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/TISEL:
|
fieldset/TISEL_GP16:
|
||||||
description: input selection register
|
description: input selection register
|
||||||
fields:
|
fields:
|
||||||
- name: TISEL
|
- name: TISEL
|
||||||
|
@ -1,133 +1,133 @@
|
|||||||
block/TIM:
|
block/TIM_GP32:
|
||||||
description: Advanced-timers
|
description: General purpose 32-bit timers
|
||||||
items:
|
items:
|
||||||
- name: CR1
|
- name: CR1
|
||||||
description: control register 1
|
description: control register 1
|
||||||
byte_offset: 0
|
byte_offset: 0
|
||||||
fieldset: CR1
|
fieldset: CR1_GP32
|
||||||
- name: CR2
|
- name: CR2
|
||||||
description: control register 2
|
description: control register 2
|
||||||
byte_offset: 4
|
byte_offset: 4
|
||||||
fieldset: CR2
|
fieldset: CR2_GP32
|
||||||
- name: SMCR
|
- name: SMCR
|
||||||
description: slave mode control register
|
description: slave mode control register
|
||||||
byte_offset: 8
|
byte_offset: 8
|
||||||
fieldset: SMCR
|
fieldset: SMCR_GP32
|
||||||
- name: DIER
|
- name: DIER
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
byte_offset: 12
|
byte_offset: 12
|
||||||
fieldset: DIER
|
fieldset: DIER_GP32
|
||||||
- name: SR
|
- name: SR
|
||||||
description: status register
|
description: status register
|
||||||
byte_offset: 16
|
byte_offset: 16
|
||||||
fieldset: SR
|
fieldset: SR_GP32
|
||||||
- name: EGR
|
- name: EGR
|
||||||
description: event generation register
|
description: event generation register
|
||||||
byte_offset: 20
|
byte_offset: 20
|
||||||
access: Write
|
access: Write
|
||||||
fieldset: EGR
|
fieldset: EGR_GP32
|
||||||
- name: CCMR_Input
|
- name: CCMR_Input
|
||||||
description: capture/compare mode register 1-2 (input mode)
|
description: capture/compare mode register 1-2 (input mode)
|
||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 4
|
stride: 4
|
||||||
byte_offset: 24
|
byte_offset: 24
|
||||||
fieldset: CCMR_Input
|
fieldset: CCMR_Input_GP32
|
||||||
- name: CCMR_Output
|
- name: CCMR_Output
|
||||||
description: capture/compare mode register 1-2 (output mode)
|
description: capture/compare mode register 1-2 (output mode)
|
||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 4
|
stride: 4
|
||||||
byte_offset: 24
|
byte_offset: 24
|
||||||
fieldset: CCMR_Output
|
fieldset: CCMR_Output_GP32
|
||||||
- name: CCER
|
- name: CCER
|
||||||
description: capture/compare enable register
|
description: capture/compare enable register
|
||||||
byte_offset: 32
|
byte_offset: 32
|
||||||
fieldset: CCER
|
fieldset: CCER_GP32
|
||||||
- name: CNT
|
- name: CNT
|
||||||
description: counter (Dither mode disabled)
|
description: counter (Dither mode disabled)
|
||||||
byte_offset: 36
|
byte_offset: 36
|
||||||
fieldset: CNT
|
fieldset: CNT_GP32
|
||||||
- name: CNT_DITHER
|
- name: CNT_DITHER
|
||||||
description: counter (Dither mode enbled)
|
description: counter (Dither mode enbled)
|
||||||
byte_offset: 36
|
byte_offset: 36
|
||||||
fieldset: CNT_DITHER
|
fieldset: CNT_DITHER_GP32
|
||||||
- name: PSC
|
- name: PSC
|
||||||
description: prescaler
|
description: prescaler
|
||||||
byte_offset: 40
|
byte_offset: 40
|
||||||
fieldset: PSC
|
fieldset: PSC_GP32
|
||||||
- name: ARR
|
- name: ARR
|
||||||
description: auto-reload register (Dither mode disabled)
|
description: auto-reload register (Dither mode disabled)
|
||||||
byte_offset: 44
|
byte_offset: 44
|
||||||
fieldset: ARR
|
fieldset: ARR_GP32
|
||||||
- name: ARR_DITHER
|
- name: ARR_DITHER
|
||||||
description: auto-reload register (Dither mode enabled)
|
description: auto-reload register (Dither mode enabled)
|
||||||
byte_offset: 44
|
byte_offset: 44
|
||||||
fieldset: ARR_DITHER
|
fieldset: ARR_DITHER_GP32
|
||||||
- name: RCR
|
- name: RCR
|
||||||
description: repetition counter register
|
description: repetition counter register
|
||||||
byte_offset: 48
|
byte_offset: 48
|
||||||
fieldset: RCR
|
fieldset: RCR_GP32
|
||||||
- name: CCR
|
- name: CCR
|
||||||
description: capture/compare register x (x=1-4) (Dither mode disabled)
|
description: capture/compare register x (x=1-4) (Dither mode disabled)
|
||||||
array:
|
array:
|
||||||
len: 4
|
len: 4
|
||||||
stride: 4
|
stride: 4
|
||||||
byte_offset: 52
|
byte_offset: 52
|
||||||
fieldset: CCR
|
fieldset: CCR_GP32
|
||||||
- name: CCR_DITHER
|
- name: CCR_DITHER
|
||||||
description: capture/compare register x (x=1-4) (Dither mode enabled)
|
description: capture/compare register x (x=1-4) (Dither mode enabled)
|
||||||
array:
|
array:
|
||||||
len: 4
|
len: 4
|
||||||
stride: 4
|
stride: 4
|
||||||
byte_offset: 52
|
byte_offset: 52
|
||||||
fieldset: CCR_DITHER
|
fieldset: CCR_DITHER_GP32
|
||||||
- name: ECR
|
- name: ECR
|
||||||
description: encoder control register
|
description: encoder control register
|
||||||
byte_offset: 88
|
byte_offset: 88
|
||||||
fieldset: ECR
|
fieldset: ECR_GP32
|
||||||
- name: TISEL
|
- name: TISEL
|
||||||
description: input selection register
|
description: input selection register
|
||||||
byte_offset: 92
|
byte_offset: 92
|
||||||
fieldset: TISEL
|
fieldset: TISEL_GP32
|
||||||
- name: AF1
|
- name: AF1
|
||||||
description: alternate function register 1
|
description: alternate function register 1
|
||||||
byte_offset: 96
|
byte_offset: 96
|
||||||
fieldset: AF1
|
fieldset: AF1_GP32
|
||||||
- name: AF2
|
- name: AF2
|
||||||
description: alternate function register 2
|
description: alternate function register 2
|
||||||
byte_offset: 100
|
byte_offset: 100
|
||||||
fieldset: AF2
|
fieldset: AF2_GP32
|
||||||
- name: DCR
|
- name: DCR
|
||||||
description: DMA control register
|
description: DMA control register
|
||||||
byte_offset: 988
|
byte_offset: 988
|
||||||
fieldset: DCR
|
fieldset: DCR_GP32
|
||||||
- name: DMAR
|
- name: DMAR
|
||||||
description: DMA address for full transfer
|
description: DMA address for full transfer
|
||||||
byte_offset: 992
|
byte_offset: 992
|
||||||
fieldset: DMAR
|
fieldset: DMAR_GP32
|
||||||
fieldset/AF1:
|
fieldset/AF1_GP32:
|
||||||
description: alternate function register 1
|
description: alternate function register 1
|
||||||
fields:
|
fields:
|
||||||
- name: ETRSEL
|
- name: ETRSEL
|
||||||
description: etr_in source selection
|
description: etr_in source selection
|
||||||
bit_offset: 14
|
bit_offset: 14
|
||||||
bit_size: 4
|
bit_size: 4
|
||||||
fieldset/AF2:
|
fieldset/AF2_GP32:
|
||||||
description: alternate function register 2
|
description: alternate function register 2
|
||||||
fields:
|
fields:
|
||||||
- name: OCRSEL
|
- name: OCRSEL
|
||||||
description: ocref_clr source selection
|
description: ocref_clr source selection
|
||||||
bit_offset: 16
|
bit_offset: 16
|
||||||
bit_size: 3
|
bit_size: 3
|
||||||
fieldset/ARR:
|
fieldset/ARR_GP32:
|
||||||
description: auto-reload register (Dither mode disabled)
|
description: auto-reload register (Dither mode disabled)
|
||||||
fields:
|
fields:
|
||||||
- name: ARR
|
- name: ARR
|
||||||
description: Auto-reload value
|
description: Auto-reload value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 32
|
bit_size: 32
|
||||||
fieldset/ARR_DITHER:
|
fieldset/ARR_DITHER_GP32:
|
||||||
description: auto-reload register (Dither mode enabled)
|
description: auto-reload register (Dither mode enabled)
|
||||||
fields:
|
fields:
|
||||||
- name: DITHER
|
- name: DITHER
|
||||||
@ -138,7 +138,7 @@ fieldset/ARR_DITHER:
|
|||||||
description: Auto-reload value
|
description: Auto-reload value
|
||||||
bit_offset: 4
|
bit_offset: 4
|
||||||
bit_size: 28
|
bit_size: 28
|
||||||
fieldset/CCER:
|
fieldset/CCER_GP32:
|
||||||
description: capture/compare enable register
|
description: capture/compare enable register
|
||||||
fields:
|
fields:
|
||||||
- name: CCE
|
- name: CCE
|
||||||
@ -162,7 +162,7 @@ fieldset/CCER:
|
|||||||
array:
|
array:
|
||||||
len: 4
|
len: 4
|
||||||
stride: 4
|
stride: 4
|
||||||
fieldset/CCMR_Input:
|
fieldset/CCMR_Input_GP32:
|
||||||
description: capture/compare mode register x (x=1-2) (input mode)
|
description: capture/compare mode register x (x=1-2) (input mode)
|
||||||
fields:
|
fields:
|
||||||
- name: CCS
|
- name: CCS
|
||||||
@ -188,7 +188,7 @@ fieldset/CCMR_Input:
|
|||||||
len: 2
|
len: 2
|
||||||
stride: 8
|
stride: 8
|
||||||
enum: FilterValue
|
enum: FilterValue
|
||||||
fieldset/CCMR_Output:
|
fieldset/CCMR_Output_GP32:
|
||||||
description: capture/compare mode register x (x=1-3) (output mode)
|
description: capture/compare mode register x (x=1-3) (output mode)
|
||||||
fields:
|
fields:
|
||||||
- name: CCS
|
- name: CCS
|
||||||
@ -228,14 +228,14 @@ fieldset/CCMR_Output:
|
|||||||
array:
|
array:
|
||||||
len: 2
|
len: 2
|
||||||
stride: 8
|
stride: 8
|
||||||
fieldset/CCR:
|
fieldset/CCR_GP32:
|
||||||
description: capture/compare register x (x=1-4,6) (Dither mode disabled)
|
description: capture/compare register x (x=1-4,6) (Dither mode disabled)
|
||||||
fields:
|
fields:
|
||||||
- name: CCR
|
- name: CCR
|
||||||
description: capture/compare x (x=1-4,6) value
|
description: capture/compare x (x=1-4,6) value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 32
|
bit_size: 32
|
||||||
fieldset/CCR_DITHER:
|
fieldset/CCR_DITHER_GP32:
|
||||||
description: capture/compare register x (x=1-4,6) (Dither mode enabled)
|
description: capture/compare register x (x=1-4,6) (Dither mode enabled)
|
||||||
fields:
|
fields:
|
||||||
- name: DITHER
|
- name: DITHER
|
||||||
@ -246,14 +246,14 @@ fieldset/CCR_DITHER:
|
|||||||
description: capture/compare x (x=1-4,6) value
|
description: capture/compare x (x=1-4,6) value
|
||||||
bit_offset: 4
|
bit_offset: 4
|
||||||
bit_size: 28
|
bit_size: 28
|
||||||
fieldset/CNT:
|
fieldset/CNT_GP32:
|
||||||
description: counter (Dither mode disabled)
|
description: counter (Dither mode disabled)
|
||||||
fields:
|
fields:
|
||||||
- name: CNT
|
- name: CNT
|
||||||
description: counter value
|
description: counter value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 32
|
bit_size: 32
|
||||||
fieldset/CNT_DITHER:
|
fieldset/CNT_DITHER_GP32:
|
||||||
description: counter (Dither mode enabled)
|
description: counter (Dither mode enabled)
|
||||||
fields:
|
fields:
|
||||||
- name: CNT
|
- name: CNT
|
||||||
@ -264,7 +264,7 @@ fieldset/CNT_DITHER:
|
|||||||
description: UIF copy
|
description: UIF copy
|
||||||
bit_offset: 31
|
bit_offset: 31
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/CR1:
|
fieldset/CR1_GP32:
|
||||||
description: control register 1
|
description: control register 1
|
||||||
fields:
|
fields:
|
||||||
- name: CEN
|
- name: CEN
|
||||||
@ -311,7 +311,7 @@ fieldset/CR1:
|
|||||||
description: Dithering enable
|
description: Dithering enable
|
||||||
bit_offset: 12
|
bit_offset: 12
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/CR2:
|
fieldset/CR2_GP32:
|
||||||
description: control register 2
|
description: control register 2
|
||||||
fields:
|
fields:
|
||||||
- name: CCDS
|
- name: CCDS
|
||||||
@ -329,7 +329,7 @@ fieldset/CR2:
|
|||||||
bit_offset: 7
|
bit_offset: 7
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
enum: TI1S
|
enum: TI1S
|
||||||
fieldset/DCR:
|
fieldset/DCR_GP32:
|
||||||
description: DMA control register
|
description: DMA control register
|
||||||
fields:
|
fields:
|
||||||
- name: DBA
|
- name: DBA
|
||||||
@ -345,7 +345,7 @@ fieldset/DCR:
|
|||||||
bit_offset: 16
|
bit_offset: 16
|
||||||
bit_size: 4
|
bit_size: 4
|
||||||
enum: DBSS
|
enum: DBSS
|
||||||
fieldset/DIER:
|
fieldset/DIER_GP32:
|
||||||
description: DMA/Interrupt enable register
|
description: DMA/Interrupt enable register
|
||||||
fields:
|
fields:
|
||||||
- name: UIE
|
- name: UIE
|
||||||
@ -398,14 +398,14 @@ fieldset/DIER:
|
|||||||
description: Transition error interrupt enable
|
description: Transition error interrupt enable
|
||||||
bit_offset: 23
|
bit_offset: 23
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/DMAR:
|
fieldset/DMAR_GP32:
|
||||||
description: DMA address for full transfer
|
description: DMA address for full transfer
|
||||||
fields:
|
fields:
|
||||||
- name: DMAB
|
- name: DMAB
|
||||||
description: DMA register for burst accesses
|
description: DMA register for burst accesses
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 32
|
bit_size: 32
|
||||||
fieldset/ECR:
|
fieldset/ECR_GP32:
|
||||||
description: encoder control register
|
description: encoder control register
|
||||||
fields:
|
fields:
|
||||||
- name: IE
|
- name: IE
|
||||||
@ -439,7 +439,7 @@ fieldset/ECR:
|
|||||||
description: Pulse width prescaler
|
description: Pulse width prescaler
|
||||||
bit_offset: 24
|
bit_offset: 24
|
||||||
bit_size: 2
|
bit_size: 2
|
||||||
fieldset/EGR:
|
fieldset/EGR_GP32:
|
||||||
description: event generation register
|
description: event generation register
|
||||||
fields:
|
fields:
|
||||||
- name: UG
|
- name: UG
|
||||||
@ -457,21 +457,21 @@ fieldset/EGR:
|
|||||||
description: Trigger generation
|
description: Trigger generation
|
||||||
bit_offset: 6
|
bit_offset: 6
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/PSC:
|
fieldset/PSC_GP32:
|
||||||
description: prescaler
|
description: prescaler
|
||||||
fields:
|
fields:
|
||||||
- name: PSC
|
- name: PSC
|
||||||
description: Prescaler value
|
description: Prescaler value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/RCR:
|
fieldset/RCR_GP32:
|
||||||
description: repetition counter register
|
description: repetition counter register
|
||||||
fields:
|
fields:
|
||||||
- name: REP
|
- name: REP
|
||||||
description: Repetition counter value
|
description: Repetition counter value
|
||||||
bit_offset: 0
|
bit_offset: 0
|
||||||
bit_size: 16
|
bit_size: 16
|
||||||
fieldset/SMCR:
|
fieldset/SMCR_GP32:
|
||||||
description: slave mode control register
|
description: slave mode control register
|
||||||
fields:
|
fields:
|
||||||
- name: SMS
|
- name: SMS
|
||||||
@ -517,7 +517,7 @@ fieldset/SMCR:
|
|||||||
bit_offset: 25
|
bit_offset: 25
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
enum: SMSPS
|
enum: SMSPS
|
||||||
fieldset/SR:
|
fieldset/SR_GP32:
|
||||||
description: status register
|
description: status register
|
||||||
fields:
|
fields:
|
||||||
- name: UIF
|
- name: UIF
|
||||||
@ -558,7 +558,7 @@ fieldset/SR:
|
|||||||
description: Transition error interrupt flag
|
description: Transition error interrupt flag
|
||||||
bit_offset: 23
|
bit_offset: 23
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
fieldset/TISEL:
|
fieldset/TISEL_GP32:
|
||||||
description: input selection register
|
description: input selection register
|
||||||
fields:
|
fields:
|
||||||
- name: TISEL
|
- name: TISEL
|
||||||
|
Loading…
x
Reference in New Issue
Block a user