diff --git a/data/registers/tim1ch_v2.yaml b/data/registers/tim1ch_v2.yaml
index 4cbb8f6..8be4617 100644
--- a/data/registers/tim1ch_v2.yaml
+++ b/data/registers/tim1ch_v2.yaml
@@ -1,83 +1,83 @@
-block/TIM:
-  description: Advanced-timers
+block/TIM_1CH:
+  description: 1-channel timers
   items:
   - name: CR1
     description: control register 1
     byte_offset: 0
-    fieldset: CR1
+    fieldset: CR1_1CH
   - name: DIER
     description: DMA/Interrupt enable register
     byte_offset: 12
-    fieldset: DIER
+    fieldset: DIER_1CH
   - name: SR
     description: status register
     byte_offset: 16
-    fieldset: SR
+    fieldset: SR_1CH
   - name: EGR
     description: event generation register
     byte_offset: 20
     access: Write
-    fieldset: EGR
+    fieldset: EGR_1CH
   - name: CCMR_Input
     description: capture/compare mode register 1 (input mode)
     array:
       len: 1
       stride: 4
     byte_offset: 24
-    fieldset: CCMR_Input
+    fieldset: CCMR_Input_1CH
   - name: CCMR_Output
     description: capture/compare mode register 1 (output mode)
     array:
       len: 1
       stride: 4
     byte_offset: 24
-    fieldset: CCMR_Output
+    fieldset: CCMR_Output_1CH
   - name: CCER
     description: capture/compare enable register
     byte_offset: 32
-    fieldset: CCER
+    fieldset: CCER_1CH
   - name: CNT
     description: counter
     byte_offset: 36
-    fieldset: CNT
+    fieldset: CNT_1CH
   - name: PSC
     description: prescaler
     byte_offset: 40
-    fieldset: PSC
+    fieldset: PSC_1CH
   - name: ARR
     description: auto-reload register (Dither mode disabled)
     byte_offset: 44
-    fieldset: ARR
+    fieldset: ARR_1CH
   - name: ARR_DITHER
     description: auto-reload register (Dither mode enabled)
     byte_offset: 44
-    fieldset: ARR_DITHER
+    fieldset: ARR_DITHER_1CH
   - name: CCR
     description: capture/compare register x (x=1) (Dither mode disabled)
     array:
       len: 1
       stride: 4
     byte_offset: 52
-    fieldset: CCR
+    fieldset: CCR_1CH
   - name: CCR_DITHER
     description: capture/compare register x (x=1) (Dither mode enabled)
     array:
       len: 1
       stride: 4
     byte_offset: 52
-    fieldset: CCR_DITHER
+    fieldset: CCR_DITHER_1CH
   - name: TISEL
     description: input selection register
     byte_offset: 92
-    fieldset: TISEL
-fieldset/ARR:
+    fieldset: TISEL_1CH
+fieldset/ARR_1CH:
   description: auto-reload register (Dither mode disabled)
   fields:
   - name: ARR
     description: Auto-reload value
     bit_offset: 0
     bit_size: 16
-fieldset/ARR_DITHER:
+fieldset/ARR_DITHER_1CH:
   description: auto-reload register (Dither mode enabled)
   fields:
   - name: DITHER
@@ -88,7 +88,7 @@ fieldset/ARR_DITHER:
     description: Auto-reload value
     bit_offset: 4
     bit_size: 16
-fieldset/CCER:
+fieldset/CCER_1CH:
   description: capture/compare enable register
   fields:
   - name: CCE
@@ -112,7 +112,7 @@ fieldset/CCER:
     array:
       len: 1
       stride: 4
-fieldset/CCMR_Input:
+fieldset/CCMR_Input_1CH:
   description: capture/compare mode register x (x=1) (input mode)
   fields:
   - name: CCS
@@ -138,7 +138,7 @@ fieldset/CCMR_Input:
       len: 1
       stride: 8
     enum: FilterValue
-fieldset/CCMR_Output:
+fieldset/CCMR_Output_1CH:
   description: capture/compare mode register x (x=1) (output mode)
   fields:
   - name: CCS
@@ -171,14 +171,14 @@ fieldset/CCMR_Output:
       len: 1
       stride: 8
     enum: OCM
-fieldset/CCR:
+fieldset/CCR_1CH:
   description: capture/compare register x (x=1) (Dither mode disabled)
   fields:
   - name: CCR
     description: capture/compare x (x=1) value
     bit_offset: 0
     bit_size: 16
-fieldset/CCR_DITHER:
+fieldset/CCR_DITHER_1CH:
   description: capture/compare register x (x=1) (Dither mode enabled)
   fields:
   - name: DITHER
@@ -189,7 +189,7 @@ fieldset/CCR_DITHER:
     description: capture/compare x (x=1) value
     bit_offset: 4
     bit_size: 16
-fieldset/CNT:
+fieldset/CNT_1CH:
   description: counter
   fields:
   - name: CNT
@@ -200,7 +200,7 @@ fieldset/CNT:
     description: UIF copy
     bit_offset: 31
     bit_size: 1
-fieldset/CR1:
+fieldset/CR1_1CH:
   description: control register 1
   fields:
   - name: CEN
@@ -237,7 +237,7 @@ fieldset/CR1:
     description: Dithering enable
     bit_offset: 12
     bit_size: 1
-fieldset/DIER:
+fieldset/DIER_1CH:
   description: DMA/Interrupt enable register
   fields:
   - name: UIE
@@ -251,7 +251,7 @@ fieldset/DIER:
     array:
       len: 1
       stride: 1
-fieldset/EGR:
+fieldset/EGR_1CH:
   description: event generation register
   fields:
   - name: UG
@@ -265,14 +265,14 @@ fieldset/EGR:
     array:
       len: 1
       stride: 1
-fieldset/PSC:
+fieldset/PSC_1CH:
   description: prescaler
   fields:
   - name: PSC
     description: Prescaler value
     bit_offset: 0
     bit_size: 16
-fieldset/SR:
+fieldset/SR_1CH:
   description: status register
   fields:
   - name: UIF
@@ -293,7 +293,7 @@ fieldset/SR:
     array:
       len: 1
       stride: 1
-fieldset/TISEL:
+fieldset/TISEL_1CH:
   description: input selection register
   fields:
   - name: TISEL
diff --git a/data/registers/tim1chcmp_v2.yaml b/data/registers/tim1chcmp_v2.yaml
index 238fb2c..e3e8743 100644
--- a/data/registers/tim1chcmp_v2.yaml
+++ b/data/registers/tim1chcmp_v2.yaml
@@ -1,108 +1,108 @@
-block/TIM:
-  description: Advanced-timers
+block/TIM_1CH_CMP:
+  description: 1-channel with one complementary output timers
   items:
   - name: CR1
     description: control register 1
     byte_offset: 0
-    fieldset: CR1
+    fieldset: CR1_1CH_CMP
   - name: CR2
     description: control register 2
     byte_offset: 4
-    fieldset: CR2
+    fieldset: CR2_1CH_CMP
   - name: DIER
     description: DMA/Interrupt enable register
     byte_offset: 12
-    fieldset: DIER
+    fieldset: DIER_1CH_CMP
   - name: SR
     description: status register
     byte_offset: 16
-    fieldset: SR
+    fieldset: SR_1CH_CMP
   - name: EGR
     description: event generation register
     byte_offset: 20
     access: Write
-    fieldset: EGR
+    fieldset: EGR_1CH_CMP
   - name: CCMR_Input
     description: capture/compare mode register 1 (input mode)
     array:
       len: 1
       stride: 4
     byte_offset: 24
-    fieldset: CCMR_Input
+    fieldset: CCMR_Input_1CH_CMP
   - name: CCMR_Output
     description: capture/compare mode register 1 (output mode)
     array:
       len: 1
       stride: 4
     byte_offset: 24
-    fieldset: CCMR_Output
+    fieldset: CCMR_Output_1CH_CMP
   - name: CCER
     description: capture/compare enable register
     byte_offset: 32
-    fieldset: CCER
+    fieldset: CCER_1CH_CMP
   - name: CNT
     description: counter
     byte_offset: 36
-    fieldset: CNT
+    fieldset: CNT_1CH_CMP
   - name: PSC
     description: prescaler
     byte_offset: 40
-    fieldset: PSC
+    fieldset: PSC_1CH_CMP
   - name: ARR
     description: auto-reload register (Dither mode disabled)
     byte_offset: 44
-    fieldset: ARR
+    fieldset: ARR_1CH_CMP
   - name: ARR_DITHER
     description: auto-reload register (Dither mode enabled)
     byte_offset: 44
-    fieldset: ARR_DITHER
+    fieldset: ARR_DITHER_1CH_CMP
   - name: RCR
     description: repetition counter register
     byte_offset: 48
-    fieldset: RCR
+    fieldset: RCR_1CH_CMP
   - name: CCR
     description: capture/compare register x (x=1) (Dither mode disabled)
     array:
       len: 1
       stride: 4
     byte_offset: 52
-    fieldset: CCR
+    fieldset: CCR_1CH_CMP
   - name: CCR_DITHER
     description: capture/compare register x (x=1) (Dither mode enabled)
     array:
       len: 1
       stride: 4
     byte_offset: 52
-    fieldset: CCR_DITHER
+    fieldset: CCR_DITHER_1CH_CMP
   - name: BDTR
     description: break and dead-time register
     byte_offset: 68
-    fieldset: BDTR
+    fieldset: BDTR_1CH_CMP
   - name: DTR2
     description: break and dead-time register
     byte_offset: 84
-    fieldset: DTR2
+    fieldset: DTR2_1CH_CMP
   - name: TISEL
     description: input selection register
     byte_offset: 92
-    fieldset: TISEL
+    fieldset: TISEL_1CH_CMP
   - name: AF1
     description: alternate function register 1
     byte_offset: 96
-    fieldset: AF1
+    fieldset: AF1_1CH_CMP
   - name: AF2
     description: alternate function register 2
     byte_offset: 100
-    fieldset: AF2
+    fieldset: AF2_1CH_CMP
   - name: DCR
     description: DMA control register
     byte_offset: 988
-    fieldset: DCR
+    fieldset: DCR_1CH_CMP
   - name: DMAR
     description: DMA address for full transfer
     byte_offset: 992
-    fieldset: DMAR
-fieldset/AF1:
+    fieldset: DMAR_1CH_CMP
+fieldset/AF1_1CH_CMP:
   description: alternate function register 1
   fields:
   - name: BKINE
@@ -129,21 +129,21 @@ fieldset/AF1:
       len: 4
       stride: 1
     enum: BKINP
-fieldset/AF2:
+fieldset/AF2_1CH_CMP:
   description: alternate function register 2
   fields:
   - name: OCRSEL
     description: ocref_clr source selection
     bit_offset: 16
     bit_size: 3
-fieldset/ARR:
+fieldset/ARR_1CH_CMP:
   description: auto-reload register (Dither mode disabled)
   fields:
   - name: ARR
     description: Auto-reload value
     bit_offset: 0
     bit_size: 16
-fieldset/ARR_DITHER:
+fieldset/ARR_DITHER_1CH_CMP:
   description: auto-reload register (Dither mode enabled)
   fields:
   - name: DITHER
@@ -154,7 +154,7 @@ fieldset/ARR_DITHER:
     description: Auto-reload value
     bit_offset: 4
     bit_size: 16
-fieldset/BDTR:
+fieldset/BDTR_1CH_CMP:
   description: break and dead-time register
   fields:
   - name: DTG
@@ -223,7 +223,7 @@ fieldset/BDTR:
       len: 1
       stride: 1
     enum: BKBID
-fieldset/CCER:
+fieldset/CCER_1CH_CMP:
   description: capture/compare enable register
   fields:
   - name: CCE
@@ -254,7 +254,7 @@ fieldset/CCER:
     array:
       len: 1
       stride: 4
-fieldset/CCMR_Input:
+fieldset/CCMR_Input_1CH_CMP:
   description: capture/compare mode register x (x=1) (input mode)
   fields:
   - name: CCS
@@ -280,7 +280,7 @@ fieldset/CCMR_Input:
       len: 1
       stride: 8
     enum: FilterValue
-fieldset/CCMR_Output:
+fieldset/CCMR_Output_1CH_CMP:
   description: capture/compare mode register x (x=1) (output mode)
   fields:
   - name: CCS
@@ -320,14 +320,14 @@ fieldset/CCMR_Output:
     array:
       len: 1
       stride: 8
-fieldset/CCR:
+fieldset/CCR_1CH_CMP:
   description: capture/compare register x (x=1) (Dither mode disabled)
   fields:
   - name: CCR
     description: capture/compare x (x=1) value
     bit_offset: 0
     bit_size: 16
-fieldset/CCR_DITHER:
+fieldset/CCR_DITHER_1CH_CMP:
   description: capture/compare register x (x=1) (Dither mode enabled)
   fields:
   - name: DITHER
@@ -338,7 +338,7 @@ fieldset/CCR_DITHER:
     description: capture/compare x (x=1) value
     bit_offset: 4
     bit_size: 16
-fieldset/CNT:
+fieldset/CNT_1CH_CMP:
   description: counter
   fields:
   - name: CNT
@@ -349,7 +349,7 @@ fieldset/CNT:
     description: UIF copy
     bit_offset: 31
     bit_size: 1
-fieldset/CR1:
+fieldset/CR1_1CH_CMP:
   description: control register 1
   fields:
   - name: CEN
@@ -386,7 +386,7 @@ fieldset/CR1:
     description: Dithering enable
     bit_offset: 12
     bit_size: 1
-fieldset/CR2:
+fieldset/CR2_1CH_CMP:
   description: control register 2
   fields:
   - name: CCPC
@@ -416,7 +416,7 @@ fieldset/CR2:
     array:
       len: 1
       stride: 2
-fieldset/DCR:
+fieldset/DCR_1CH_CMP:
   description: DMA control register
   fields:
   - name: DBA
@@ -432,7 +432,7 @@ fieldset/DCR:
     bit_offset: 16
     bit_size: 4
     enum: DBSS
-fieldset/DIER:
+fieldset/DIER_1CH_CMP:
   description: DMA/Interrupt enable register
   fields:
   - name: UIE
@@ -465,14 +465,14 @@ fieldset/DIER:
     array:
       len: 1
       stride: 1
-fieldset/DMAR:
+fieldset/DMAR_1CH_CMP:
   description: DMA address for full transfer
   fields:
   - name: DMAB
     description: DMA register for burst accesses
     bit_offset: 0
     bit_size: 32
-fieldset/DTR2:
+fieldset/DTR2_1CH_CMP:
   description: deadtime register 2
   fields:
   - name: DTGF
@@ -488,7 +488,7 @@ fieldset/DTR2:
     description: Deadtime preload enable
     bit_offset: 17
     bit_size: 1
-fieldset/EGR:
+fieldset/EGR_1CH_CMP:
   description: event generation register
   fields:
   - name: UG
@@ -513,21 +513,21 @@ fieldset/EGR:
     array:
       len: 1
       stride: 1
-fieldset/PSC:
+fieldset/PSC_1CH_CMP:
   description: prescaler
   fields:
   - name: PSC
     description: Prescaler value
     bit_offset: 0
     bit_size: 16
-fieldset/RCR:
+fieldset/RCR_1CH_CMP:
   description: repetition counter register
   fields:
   - name: REP
     description: Repetition counter value
     bit_offset: 0
     bit_size: 8
-fieldset/SR:
+fieldset/SR_1CH_CMP:
   description: status register
   fields:
   - name: UIF
@@ -559,7 +559,7 @@ fieldset/SR:
     array:
       len: 1
       stride: 1
-fieldset/TISEL:
+fieldset/TISEL_1CH_CMP:
   description: input selection register
   fields:
   - name: TISEL
diff --git a/data/registers/tim2ch_v2.yaml b/data/registers/tim2ch_v2.yaml
index 4eabba5..48a1f25 100644
--- a/data/registers/tim2ch_v2.yaml
+++ b/data/registers/tim2ch_v2.yaml
@@ -1,91 +1,91 @@
-block/TIM:
-  description: Advanced-timers
+block/TIM_2CH:
+  description: 2-channel timers
   items:
   - name: CR1
     description: control register 1
     byte_offset: 0
-    fieldset: CR1
+    fieldset: CR1_2CH
   - name: CR2
     description: control register 2
     byte_offset: 4
-    fieldset: CR2
+    fieldset: CR2_2CH
   - name: SMCR
     description: slave mode control register
     byte_offset: 8
-    fieldset: SMCR
+    fieldset: SMCR_2CH
   - name: DIER
     description: DMA/Interrupt enable register
     byte_offset: 12
-    fieldset: DIER
+    fieldset: DIER_2CH
   - name: SR
     description: status register
     byte_offset: 16
-    fieldset: SR
+    fieldset: SR_2CH
   - name: EGR
     description: event generation register
     byte_offset: 20
     access: Write
-    fieldset: EGR
+    fieldset: EGR_2CH
   - name: CCMR_Input
     description: capture/compare mode register 1 (input mode)
     array:
       len: 1
       stride: 4
     byte_offset: 24
-    fieldset: CCMR_Input
+    fieldset: CCMR_Input_2CH
   - name: CCMR_Output
     description: capture/compare mode register 1 (output mode)
     array:
       len: 1
       stride: 4
     byte_offset: 24
-    fieldset: CCMR_Output
+    fieldset: CCMR_Output_2CH
   - name: CCER
     description: capture/compare enable register
     byte_offset: 32
-    fieldset: CCER
+    fieldset: CCER_2CH
   - name: CNT
     description: counter
     byte_offset: 36
-    fieldset: CNT
+    fieldset: CNT_2CH
   - name: PSC
     description: prescaler
     byte_offset: 40
-    fieldset: PSC
+    fieldset: PSC_2CH
   - name: ARR
     description: auto-reload register (Dither mode disabled)
     byte_offset: 44
-    fieldset: ARR
+    fieldset: ARR_2CH
   - name: ARR_DITHER
     description: auto-reload register (Dither mode enabled)
     byte_offset: 44
-    fieldset: ARR_DITHER
+    fieldset: ARR_DITHER_2CH
   - name: CCR
     description: capture/compare register x (x=1-2) (Dither mode disabled)
     array:
       len: 2
       stride: 4
     byte_offset: 52
-    fieldset: CCR
+    fieldset: CCR_2CH
   - name: CCR_DITHER
     description: capture/compare register x (x=1-2) (Dither mode enabled)
     array:
       len: 2
       stride: 4
     byte_offset: 52
-    fieldset: CCR_DITHER
+    fieldset: CCR_DITHER_2CH
   - name: TISEL
     description: input selection register
     byte_offset: 92
-    fieldset: TISEL
-fieldset/ARR:
+    fieldset: TISEL_2CH
+fieldset/ARR_2CH:
   description: auto-reload register (Dither mode disabled)
   fields:
   - name: ARR
     description: Auto-reload value
     bit_offset: 0
     bit_size: 16
-fieldset/ARR_DITHER:
+fieldset/ARR_DITHER_2CH:
   description: auto-reload register (Dither mode enabled)
   fields:
   - name: DITHER
@@ -96,7 +96,7 @@ fieldset/ARR_DITHER:
     description: Auto-reload value
     bit_offset: 4
     bit_size: 16
-fieldset/CCER:
+fieldset/CCER_2CH:
   description: capture/compare enable register
   fields:
   - name: CCE
@@ -120,7 +120,7 @@ fieldset/CCER:
     array:
       len: 2
       stride: 4
-fieldset/CCMR_Input:
+fieldset/CCMR_Input_2CH:
   description: capture/compare mode register x (x=1) (input mode)
   fields:
   - name: CCS
@@ -146,7 +146,7 @@ fieldset/CCMR_Input:
       len: 2
       stride: 8
     enum: FilterValue
-fieldset/CCMR_Output:
+fieldset/CCMR_Output_2CH:
   description: capture/compare mode register x (x=1) (output mode)
   fields:
   - name: CCS
@@ -179,14 +179,14 @@ fieldset/CCMR_Output:
       len: 2
       stride: 8
     enum: OCM
-fieldset/CCR:
+fieldset/CCR_2CH:
   description: capture/compare register x (x=1,2) (Dither mode disabled)
   fields:
   - name: CCR
     description: capture/compare x (x=1,2) value
     bit_offset: 0
     bit_size: 16
-fieldset/CCR_DITHER:
+fieldset/CCR_DITHER_2CH:
   description: capture/compare register x (x=1,2) (Dither mode enabled)
   fields:
   - name: DITHER
@@ -197,7 +197,7 @@ fieldset/CCR_DITHER:
     description: capture/compare x (x=1-2) value
     bit_offset: 4
     bit_size: 16
-fieldset/CNT:
+fieldset/CNT_2CH:
   description: counter
   fields:
   - name: CNT
@@ -208,7 +208,7 @@ fieldset/CNT:
     description: UIF copy
     bit_offset: 31
     bit_size: 1
-fieldset/CR1:
+fieldset/CR1_2CH:
   description: control register 1
   fields:
   - name: CEN
@@ -245,7 +245,7 @@ fieldset/CR1:
     description: Dithering enable
     bit_offset: 12
     bit_size: 1
-fieldset/CR2:
+fieldset/CR2_2CH:
   description: control register 2
   fields:
   - name: MMS
@@ -258,7 +258,7 @@ fieldset/CR2:
     bit_offset: 7
     bit_size: 1
     enum: TI1S
-fieldset/DIER:
+fieldset/DIER_2CH:
   description: DMA/Interrupt enable register
   fields:
   - name: UIE
@@ -276,7 +276,7 @@ fieldset/DIER:
     description: Trigger interrupt enable
     bit_offset: 6
     bit_size: 1
-fieldset/EGR:
+fieldset/EGR_2CH:
   description: event generation register
   fields:
   - name: UG
@@ -294,14 +294,14 @@ fieldset/EGR:
     description: Trigger generation
     bit_offset: 6
     bit_size: 1
-fieldset/PSC:
+fieldset/PSC_2CH:
   description: prescaler
   fields:
   - name: PSC
     description: Prescaler value
     bit_offset: 0
     bit_size: 16
-fieldset/SMCR:
+fieldset/SMCR_2CH:
   description: slave mode control register
   fields:
   - name: SMS
@@ -319,7 +319,7 @@ fieldset/SMCR:
     bit_offset: 7
     bit_size: 1
     enum: MSM
-fieldset/SR:
+fieldset/SR_2CH:
   description: status register
   fields:
   - name: UIF
@@ -344,7 +344,7 @@ fieldset/SR:
     array:
       len: 2
       stride: 1
-fieldset/TISEL:
+fieldset/TISEL_2CH:
   description: input selection register
   fields:
   - name: TISEL
diff --git a/data/registers/tim2chcmp_v2.yaml b/data/registers/tim2chcmp_v2.yaml
index 222031a..b5d4050 100644
--- a/data/registers/tim2chcmp_v2.yaml
+++ b/data/registers/tim2chcmp_v2.yaml
@@ -1,112 +1,112 @@
-block/TIM:
-  description: Advanced-timers
+block/TIM_2CH_CMP:
+  description: 2-channel with one complementary output timers
   items:
   - name: CR1
     description: control register 1
     byte_offset: 0
-    fieldset: CR1
+    fieldset: CR1_1CH_CMP
   - name: CR2
     description: control register 2
     byte_offset: 4
-    fieldset: CR2
+    fieldset: CR2_1CH_CMP
   - name: SMCR
     description: slave mode control register
     byte_offset: 8
-    fieldset: SMCR
+    fieldset: SMCR_1CH_CMP
   - name: DIER
     description: DMA/Interrupt enable register
     byte_offset: 12
-    fieldset: DIER
+    fieldset: DIER_1CH_CMP
   - name: SR
     description: status register
     byte_offset: 16
-    fieldset: SR
+    fieldset: SR_1CH_CMP
   - name: EGR
     description: event generation register
     byte_offset: 20
     access: Write
-    fieldset: EGR
+    fieldset: EGR_1CH_CMP
   - name: CCMR_Input
     description: capture/compare mode register 1 (input mode)
     array:
       len: 1
       stride: 4
     byte_offset: 24
-    fieldset: CCMR_Input
+    fieldset: CCMR_Input_1CH_CMP
   - name: CCMR_Output
     description: capture/compare mode register 1 (output mode)
     array:
       len: 1
       stride: 4
     byte_offset: 24
-    fieldset: CCMR_Output
+    fieldset: CCMR_Output_1CH_CMP
   - name: CCER
     description: capture/compare enable register
     byte_offset: 32
-    fieldset: CCER
+    fieldset: CCER_1CH_CMP
   - name: CNT
     description: counter
     byte_offset: 36
-    fieldset: CNT
+    fieldset: CNT_1CH_CMP
   - name: PSC
     description: prescaler
     byte_offset: 40
-    fieldset: PSC
+    fieldset: PSC_1CH_CMP
   - name: ARR
     description: auto-reload register (Dither mode disabled)
     byte_offset: 44
-    fieldset: ARR
+    fieldset: ARR_1CH_CMP
   - name: ARR_DITHER
     description: auto-reload register (Dither mode enabled)
     byte_offset: 44
-    fieldset: ARR_DITHER
+    fieldset: ARR_DITHER_1CH_CMP
   - name: RCR
     description: repetition counter register
     byte_offset: 48
-    fieldset: RCR
+    fieldset: RCR_1CH_CMP
   - name: CCR
     description: capture/compare register x (x=1-2) (Dither mode disabled)
     array:
       len: 2
       stride: 4
     byte_offset: 52
-    fieldset: CCR
+    fieldset: CCR_1CH_CMP
   - name: CCR_DITHER
     description: capture/compare register x (x=1-2) (Dither mode enabled)
     array:
       len: 2
       stride: 4
     byte_offset: 52
-    fieldset: CCR_DITHER
+    fieldset: CCR_DITHER_1CH_CMP
   - name: BDTR
     description: break and dead-time register
     byte_offset: 68
-    fieldset: BDTR
+    fieldset: BDTR_1CH_CMP
   - name: DTR2
     description: break and dead-time register
     byte_offset: 84
-    fieldset: DTR2
+    fieldset: DTR2_1CH_CMP
   - name: TISEL
     description: input selection register
     byte_offset: 92
-    fieldset: TISEL
+    fieldset: TISEL_1CH_CMP
   - name: AF1
     description: alternate function register 1
     byte_offset: 96
-    fieldset: AF1
+    fieldset: AF1_1CH_CMP
   - name: AF2
     description: alternate function register 2
     byte_offset: 100
-    fieldset: AF2
+    fieldset: AF2_1CH_CMP
   - name: DCR
     description: DMA control register
     byte_offset: 988
-    fieldset: DCR
+    fieldset: DCR_1CH_CMP
   - name: DMAR
     description: DMA address for full transfer
     byte_offset: 992
-    fieldset: DMAR
-fieldset/AF1:
+    fieldset: DMAR_1CH_CMP
+fieldset/AF1_1CH_CMP:
   description: alternate function register 1
   fields:
   - name: BKINE
@@ -133,21 +133,21 @@ fieldset/AF1:
       len: 4
       stride: 1
     enum: BKINP
-fieldset/AF2:
+fieldset/AF2_1CH_CMP:
   description: alternate function register 2
   fields:
   - name: OCRSEL
     description: ocref_clr source selection
     bit_offset: 16
     bit_size: 3
-fieldset/ARR:
+fieldset/ARR_1CH_CMP:
   description: auto-reload register (Dither mode disabled)
   fields:
   - name: ARR
     description: Auto-reload value
     bit_offset: 0
     bit_size: 16
-fieldset/ARR_DITHER:
+fieldset/ARR_DITHER_1CH_CMP:
   description: auto-reload register (Dither mode enabled)
   fields:
   - name: DITHER
@@ -158,7 +158,7 @@ fieldset/ARR_DITHER:
     description: Auto-reload value
     bit_offset: 4
     bit_size: 16
-fieldset/BDTR:
+fieldset/BDTR_1CH_CMP:
   description: break and dead-time register
   fields:
   - name: DTG
@@ -227,7 +227,7 @@ fieldset/BDTR:
       len: 1
       stride: 1
     enum: BKBID
-fieldset/CCER:
+fieldset/CCER_1CH_CMP:
   description: capture/compare enable register
   fields:
   - name: CCE
@@ -258,7 +258,7 @@ fieldset/CCER:
     array:
       len: 2
       stride: 4
-fieldset/CCMR_Input:
+fieldset/CCMR_Input_1CH_CMP:
   description: capture/compare mode register x (x=1) (input mode)
   fields:
   - name: CCS
@@ -284,7 +284,7 @@ fieldset/CCMR_Input:
       len: 2
       stride: 8
     enum: FilterValue
-fieldset/CCMR_Output:
+fieldset/CCMR_Output_1CH_CMP:
   description: capture/compare mode register x (x=1) (output mode)
   fields:
   - name: CCS
@@ -324,14 +324,14 @@ fieldset/CCMR_Output:
     array:
       len: 2
       stride: 8
-fieldset/CCR:
+fieldset/CCR_1CH_CMP:
   description: capture/compare register x (x=1,2) (Dither mode disabled)
   fields:
   - name: CCR
     description: capture/compare x (x=1,2) value
     bit_offset: 0
     bit_size: 16
-fieldset/CCR_DITHER:
+fieldset/CCR_DITHER_1CH_CMP:
   description: capture/compare register x (x=1,2) (Dither mode enabled)
   fields:
   - name: DITHER
@@ -342,7 +342,7 @@ fieldset/CCR_DITHER:
     description: capture/compare x (x=1-2) value
     bit_offset: 4
     bit_size: 16
-fieldset/CNT:
+fieldset/CNT_1CH_CMP:
   description: counter
   fields:
   - name: CNT
@@ -353,7 +353,7 @@ fieldset/CNT:
     description: UIF copy
     bit_offset: 31
     bit_size: 1
-fieldset/CR1:
+fieldset/CR1_1CH_CMP:
   description: control register 1
   fields:
   - name: CEN
@@ -390,7 +390,7 @@ fieldset/CR1:
     description: Dithering enable
     bit_offset: 12
     bit_size: 1
-fieldset/CR2:
+fieldset/CR2_1CH_CMP:
   description: control register 2
   fields:
   - name: CCPC
@@ -430,7 +430,7 @@ fieldset/CR2:
     array:
       len: 1
       stride: 2
-fieldset/DCR:
+fieldset/DCR_1CH_CMP:
   description: DMA control register
   fields:
   - name: DBA
@@ -446,7 +446,7 @@ fieldset/DCR:
     bit_offset: 16
     bit_size: 4
     enum: DBSS
-fieldset/DIER:
+fieldset/DIER_1CH_CMP:
   description: DMA/Interrupt enable register
   fields:
   - name: UIE
@@ -491,14 +491,14 @@ fieldset/DIER:
     description: Trigger DMA request enable
     bit_offset: 14
     bit_size: 1
-fieldset/DMAR:
+fieldset/DMAR_1CH_CMP:
   description: DMA address for full transfer
   fields:
   - name: DMAB
     description: DMA register for burst accesses
     bit_offset: 0
     bit_size: 32
-fieldset/DTR2:
+fieldset/DTR2_1CH_CMP:
   description: deadtime register 2
   fields:
   - name: DTGF
@@ -514,7 +514,7 @@ fieldset/DTR2:
     description: Deadtime preload enable
     bit_offset: 17
     bit_size: 1
-fieldset/EGR:
+fieldset/EGR_1CH_CMP:
   description: event generation register
   fields:
   - name: UG
@@ -543,21 +543,21 @@ fieldset/EGR:
     array:
       len: 1
       stride: 1
-fieldset/PSC:
+fieldset/PSC_1CH_CMP:
   description: prescaler
   fields:
   - name: PSC
     description: Prescaler value
     bit_offset: 0
     bit_size: 16
-fieldset/RCR:
+fieldset/RCR_1CH_CMP:
   description: repetition counter register
   fields:
   - name: REP
     description: Repetition counter value
     bit_offset: 0
     bit_size: 8
-fieldset/SMCR:
+fieldset/SMCR_1CH_CMP:
   description: slave mode control register
   fields:
   - name: SMS
@@ -579,7 +579,7 @@ fieldset/SMCR:
     description: SMS preload enable
     bit_offset: 24
     bit_size: 1
-fieldset/SR:
+fieldset/SR_1CH_CMP:
   description: status register
   fields:
   - name: UIF
@@ -615,7 +615,7 @@ fieldset/SR:
     array:
       len: 2
       stride: 1
-fieldset/TISEL:
+fieldset/TISEL_1CH_CMP:
   description: input selection register
   fields:
   - name: TISEL
diff --git a/data/registers/timadv_v2.yaml b/data/registers/timadv_v2.yaml
index c6a860b..5470f20 100644
--- a/data/registers/timadv_v2.yaml
+++ b/data/registers/timadv_v2.yaml
@@ -1,136 +1,136 @@
-block/TIM:
-  description: Advanced-timers
+block/TIM_ADV:
+  description: Advanced Control timers
   items:
   - name: CR1
     description: control register 1
     byte_offset: 0
-    fieldset: CR1
+    fieldset: CR1_ADV
   - name: CR2
     description: control register 2
     byte_offset: 4
-    fieldset: CR2
+    fieldset: CR2_ADV
   - name: SMCR
     description: slave mode control register
     byte_offset: 8
-    fieldset: SMCR
+    fieldset: SMCR_ADV
   - name: DIER
     description: DMA/Interrupt enable register
     byte_offset: 12
-    fieldset: DIER
+    fieldset: DIER_ADV
   - name: SR
     description: status register
     byte_offset: 16
-    fieldset: SR
+    fieldset: SR_ADV
   - name: EGR
     description: event generation register
     byte_offset: 20
     access: Write
-    fieldset: EGR
+    fieldset: EGR_ADV
   - name: CCMR_Input
     description: capture/compare mode register 1-2 (input mode)
     array:
       len: 2
       stride: 4
     byte_offset: 24
-    fieldset: CCMR_Input
+    fieldset: CCMR_Input_ADV
   - name: CCMR_Output
     description: capture/compare mode register 1-2 (output mode)
     array:
       len: 2
       stride: 4
     byte_offset: 24
-    fieldset: CCMR_Output
+    fieldset: CCMR_Output_ADV
   - name: CCER
     description: capture/compare enable register
     byte_offset: 32
-    fieldset: CCER
+    fieldset: CCER_ADV
   - name: CNT
     description: counter
     byte_offset: 36
-    fieldset: CNT
+    fieldset: CNT_ADV
   - name: PSC
     description: prescaler
     byte_offset: 40
-    fieldset: PSC
+    fieldset: PSC_ADV
   - name: ARR
     description: auto-reload register (Dither mode disabled)
     byte_offset: 44
-    fieldset: ARR
+    fieldset: ARR_ADV
   - name: ARR_DITHER
     description: auto-reload register (Dither mode enabled)
     byte_offset: 44
-    fieldset: ARR_DITHER
+    fieldset: ARR_DITHER_ADV
   - name: RCR
     description: repetition counter register
     byte_offset: 48
-    fieldset: RCR
+    fieldset: RCR_ADV
   - name: CCR
     description: capture/compare register x (x=1-4) (Dither mode disabled)
     array:
       len: 4
       stride: 4
     byte_offset: 52
-    fieldset: CCR
+    fieldset: CCR_ADV
   - name: CCR_DITHER
     description: capture/compare register x (x=1-4) (Dither mode enabled)
     array:
       len: 4
       stride: 4
     byte_offset: 52
-    fieldset: CCR_DITHER
+    fieldset: CCR_DITHER_ADV
   - name: BDTR
     description: break and dead-time register
     byte_offset: 68
-    fieldset: BDTR
+    fieldset: BDTR_ADV
   - name: CCR5
     description: capture/compare register 5 (Dither mode disabled)
     byte_offset: 72
-    fieldset: CCR5
+    fieldset: CCR5_ADV
   - name: CCR5_DITHER
     description: capture/compare register 5 (Dither mode enabled)
     byte_offset: 72
-    fieldset: CCR5_DITHER
+    fieldset: CCR5_DITHER_ADV
   - name: CCR6
     description: capture/compare register 6 (Dither mode disabled)
     byte_offset: 76
-    fieldset: CCR
+    fieldset: CCR_ADV
   - name: CCR6_DITHER
     description: capture/compare register 6 (Dither mode enabled)
     byte_offset: 76
-    fieldset: CCR_DITHER
+    fieldset: CCR_DITHER_ADV
   - name: CCMR3
     description: capture/compare mode register 3
     byte_offset: 80
-    fieldset: CCMR3
+    fieldset: CCMR3_ADV
   - name: DTR2
     description: break and dead-time register
     byte_offset: 84
-    fieldset: DTR2
+    fieldset: DTR2_ADV
   - name: ECR
     description: encoder control register
     byte_offset: 88
-    fieldset: ECR
+    fieldset: ECR_ADV
   - name: TISEL
     description: input selection register
     byte_offset: 92
-    fieldset: TISEL
+    fieldset: TISEL_ADV
   - name: AF1
     description: alternate function register 1
     byte_offset: 96
-    fieldset: AF1
+    fieldset: AF1_ADV
   - name: AF2
     description: alternate function register 2
     byte_offset: 100
-    fieldset: AF2
+    fieldset: AF2_ADV
   - name: DCR
     description: DMA control register
     byte_offset: 988
-    fieldset: DCR
+    fieldset: DCR_ADV
   - name: DMAR
     description: DMA address for full transfer
     byte_offset: 992
-    fieldset: DMAR
-fieldset/AF1:
+    fieldset: DMAR_ADV
+fieldset/AF1_ADV:
   description: alternate function register 1
   fields:
   - name: BKINE
@@ -161,7 +161,7 @@ fieldset/AF1:
     description: etr_in source selection
     bit_offset: 14
     bit_size: 4
-fieldset/AF2:
+fieldset/AF2_ADV:
   description: alternate function register 2
   fields:
   - name: BK2INE
@@ -192,14 +192,14 @@ fieldset/AF2:
     description: ocref_clr source selection
     bit_offset: 16
     bit_size: 3
-fieldset/ARR:
+fieldset/ARR_ADV:
   description: auto-reload register (Dither mode disabled)
   fields:
   - name: ARR
     description: Auto-reload value
     bit_offset: 0
     bit_size: 16
-fieldset/ARR_DITHER:
+fieldset/ARR_DITHER_ADV:
   description: auto-reload register (Dither mode enabled)
   fields:
   - name: DITHER
@@ -210,7 +210,7 @@ fieldset/ARR_DITHER:
     description: Auto-reload value
     bit_offset: 4
     bit_size: 16
-fieldset/BDTR:
+fieldset/BDTR_ADV:
   description: break and dead-time register
   fields:
   - name: DTG
@@ -279,7 +279,7 @@ fieldset/BDTR:
       len: 2
       stride: 1
     enum: BKBID
-fieldset/CCER:
+fieldset/CCER_ADV:
   description: capture/compare enable register
   fields:
   - name: CCE
@@ -310,7 +310,7 @@ fieldset/CCER:
     array:
       len: 4
       stride: 4
-fieldset/CCMR3:
+fieldset/CCMR3_ADV:
   description: capture/compare mode register 3
   fields:
   - name: OCFE
@@ -342,7 +342,7 @@ fieldset/CCMR3:
     array:
       len: 2
       stride: 8
-fieldset/CCMR_Input:
+fieldset/CCMR_Input_ADV:
   description: capture/compare mode register x (x=1-2) (input mode)
   fields:
   - name: CCS
@@ -368,7 +368,7 @@ fieldset/CCMR_Input:
       len: 2
       stride: 8
     enum: FilterValue
-fieldset/CCMR_Output:
+fieldset/CCMR_Output_ADV:
   description: capture/compare mode register x (x=1-3) (output mode)
   fields:
   - name: CCS
@@ -408,14 +408,14 @@ fieldset/CCMR_Output:
     array:
       len: 2
       stride: 8
-fieldset/CCR:
+fieldset/CCR_ADV:
   description: capture/compare register x (x=1-4,6) (Dither mode disabled)
   fields:
   - name: CCR
     description: capture/compare x (x=1-4,6) value
     bit_offset: 0
     bit_size: 16
-fieldset/CCR5:
+fieldset/CCR5_ADV:
   extends: CCR
   description: capture/compare register 5 (Dither mode disabled)
   fields:
@@ -427,7 +427,7 @@ fieldset/CCR5:
       len: 3
       stride: 1
     enum: GC5C
-fieldset/CCR5_DITHER:
+fieldset/CCR5_DITHER_ADV:
   extends: CCR_DITHER
   description: capture/compare register 5 (Dither mode enabled)
   fields:
@@ -439,7 +439,7 @@ fieldset/CCR5_DITHER:
       len: 3
       stride: 1
     enum: GC5C
-fieldset/CCR_DITHER:
+fieldset/CCR_DITHER_ADV:
   description: capture/compare register x (x=1-4,6) (Dither mode enabled)
   fields:
   - name: DITHER
@@ -450,7 +450,7 @@ fieldset/CCR_DITHER:
     description: capture/compare x (x=1-4,6) value
     bit_offset: 4
     bit_size: 16
-fieldset/CNT:
+fieldset/CNT_ADV:
   description: counter
   fields:
   - name: CNT
@@ -461,7 +461,7 @@ fieldset/CNT:
     description: UIF copy
     bit_offset: 31
     bit_size: 1
-fieldset/CR1:
+fieldset/CR1_ADV:
   description: control register 1
   fields:
   - name: CEN
@@ -508,7 +508,7 @@ fieldset/CR1:
     description: Dithering enable
     bit_offset: 12
     bit_size: 1
-fieldset/CR2:
+fieldset/CR2_ADV:
   description: control register 2
   fields:
   - name: CCPC
@@ -553,7 +553,7 @@ fieldset/CR2:
     bit_offset: 20
     bit_size: 4
     enum: MMS2
-fieldset/DCR:
+fieldset/DCR_ADV:
   description: DMA control register
   fields:
   - name: DBA
@@ -569,7 +569,7 @@ fieldset/DCR:
     bit_offset: 16
     bit_size: 4
     enum: DBSS
-fieldset/DIER:
+fieldset/DIER_ADV:
   description: DMA/Interrupt enable register
   fields:
   - name: UIE
@@ -630,14 +630,14 @@ fieldset/DIER:
     description: Transition error interrupt enable
     bit_offset: 23
     bit_size: 1
-fieldset/DMAR:
+fieldset/DMAR_ADV:
   description: DMA address for full transfer
   fields:
   - name: DMAB
     description: DMA register for burst accesses
     bit_offset: 0
     bit_size: 32
-fieldset/DTR2:
+fieldset/DTR2_ADV:
   description: deadtime register 2
   fields:
   - name: DTGF
@@ -653,7 +653,7 @@ fieldset/DTR2:
     description: Deadtime preload enable
     bit_offset: 17
     bit_size: 1
-fieldset/ECR:
+fieldset/ECR_ADV:
   description: encoder control register
   fields:
   - name: IE
@@ -687,7 +687,7 @@ fieldset/ECR:
     description: Pulse width prescaler
     bit_offset: 24
     bit_size: 2
-fieldset/EGR:
+fieldset/EGR_ADV:
   description: event generation register
   fields:
   - name: UG
@@ -716,21 +716,21 @@ fieldset/EGR:
     array:
       len: 2
       stride: 1
-fieldset/PSC:
+fieldset/PSC_ADV:
   description: prescaler
   fields:
   - name: PSC
     description: Prescaler value
     bit_offset: 0
     bit_size: 16
-fieldset/RCR:
+fieldset/RCR_ADV:
   description: repetition counter register
   fields:
   - name: REP
     description: Repetition counter value
     bit_offset: 0
     bit_size: 16
-fieldset/SMCR:
+fieldset/SMCR_ADV:
   description: slave mode control register
   fields:
   - name: SMS
@@ -781,7 +781,7 @@ fieldset/SMCR:
     bit_offset: 25
     bit_size: 1
     enum: SMSPS
-fieldset/SR:
+fieldset/SR_ADV:
   description: status register
   fields:
   - name: UIF
@@ -841,7 +841,7 @@ fieldset/SR:
     description: Transition error interrupt flag
     bit_offset: 23
     bit_size: 1
-fieldset/TISEL:
+fieldset/TISEL_ADV:
   description: input selection register
   fields:
   - name: TISEL
diff --git a/data/registers/timbasic_v2.yaml b/data/registers/timbasic_v2.yaml
index b1115d2..5793f50 100644
--- a/data/registers/timbasic_v2.yaml
+++ b/data/registers/timbasic_v2.yaml
@@ -1,51 +1,51 @@
-block/TIM:
-  description: Advanced-timers
+block/TIM_BASIC:
+  description: Basic timers
   items:
   - name: CR1
     description: control register 1
     byte_offset: 0
-    fieldset: CR1
+    fieldset: CR1_BASIC
   - name: CR2
     description: control register 2
     byte_offset: 4
-    fieldset: CR2
+    fieldset: CR2_BASIC
   - name: DIER
     description: DMA/Interrupt enable register
     byte_offset: 12
-    fieldset: DIER
+    fieldset: DIER_BASIC
   - name: SR
     description: status register
     byte_offset: 16
-    fieldset: SR
+    fieldset: SR_BASIC
   - name: EGR
     description: event generation register
     byte_offset: 20
     access: Write
-    fieldset: EGR
+    fieldset: EGR_BASIC
   - name: CNT
     description: counter
     byte_offset: 36
-    fieldset: CNT
+    fieldset: CNT_BASIC
   - name: PSC
     description: prescaler
     byte_offset: 40
-    fieldset: PSC
+    fieldset: PSC_BASIC
   - name: ARR
     description: auto-reload register (Dither mode disabled)
     byte_offset: 44
-    fieldset: ARR
+    fieldset: ARR_BASIC
   - name: ARR_DITHER
     description: auto-reload register (Dither mode enabled)
     byte_offset: 44
-    fieldset: ARR_DITHER
-fieldset/ARR:
+    fieldset: ARR_DITHER_BASIC
+fieldset/ARR_BASIC:
   description: auto-reload register (Dither mode disabled)
   fields:
   - name: ARR
     description: Auto-reload value
     bit_offset: 0
     bit_size: 16
-fieldset/ARR_DITHER:
+fieldset/ARR_DITHER_BASIC:
   description: auto-reload register (Dither mode enabled)
   fields:
   - name: DITHER
@@ -56,7 +56,7 @@ fieldset/ARR_DITHER:
     description: Auto-reload value
     bit_offset: 4
     bit_size: 16
-fieldset/CNT:
+fieldset/CNT_BASIC:
   description: counter
   fields:
   - name: CNT
@@ -67,7 +67,7 @@ fieldset/CNT:
     description: UIF copy
     bit_offset: 31
     bit_size: 1
-fieldset/CR1:
+fieldset/CR1_BASIC:
   description: control register 1
   fields:
   - name: CEN
@@ -99,7 +99,7 @@ fieldset/CR1:
     description: Dithering enable
     bit_offset: 12
     bit_size: 1
-fieldset/CR2:
+fieldset/CR2_BASIC:
   description: control register 2
   fields:
   - name: MMS
@@ -107,7 +107,7 @@ fieldset/CR2:
     bit_offset: 4
     bit_size: 3
     enum: MMS
-fieldset/DIER:
+fieldset/DIER_BASIC:
   description: DMA/Interrupt enable register
   fields:
   - name: UIE
@@ -118,21 +118,21 @@ fieldset/DIER:
     description: Update DMA request enable
     bit_offset: 8
     bit_size: 1
-fieldset/EGR:
+fieldset/EGR_BASIC:
   description: event generation register
   fields:
   - name: UG
     description: Update generation
     bit_offset: 0
     bit_size: 1
-fieldset/PSC:
+fieldset/PSC_BASIC:
   description: prescaler
   fields:
   - name: PSC
     description: Prescaler value
     bit_offset: 0
     bit_size: 16
-fieldset/SR:
+fieldset/SR_BASIC:
   description: status register
   fields:
   - name: UIF
diff --git a/data/registers/timgp16_v2.yaml b/data/registers/timgp16_v2.yaml
index e0b19ff..d5cfc29 100644
--- a/data/registers/timgp16_v2.yaml
+++ b/data/registers/timgp16_v2.yaml
@@ -1,129 +1,129 @@
-block/TIM:
-  description: Advanced-timers
+block/TIM_GP16:
+  description: General purpose 16-bit timers
   items:
   - name: CR1
     description: control register 1
     byte_offset: 0
-    fieldset: CR1
+    fieldset: CR1_GP16
   - name: CR2
     description: control register 2
     byte_offset: 4
-    fieldset: CR2
+    fieldset: CR2_GP16
   - name: SMCR
     description: slave mode control register
     byte_offset: 8
-    fieldset: SMCR
+    fieldset: SMCR_GP16
   - name: DIER
     description: DMA/Interrupt enable register
     byte_offset: 12
-    fieldset: DIER
+    fieldset: DIER_GP16
   - name: SR
     description: status register
     byte_offset: 16
-    fieldset: SR
+    fieldset: SR_GP16
   - name: EGR
     description: event generation register
     byte_offset: 20
     access: Write
-    fieldset: EGR
+    fieldset: EGR_GP16
   - name: CCMR_Input
     description: capture/compare mode register 1-2 (input mode)
     array:
       len: 2
       stride: 4
     byte_offset: 24
-    fieldset: CCMR_Input
+    fieldset: CCMR_Input_GP16
   - name: CCMR_Output
     description: capture/compare mode register 1-2 (output mode)
     array:
       len: 2
       stride: 4
     byte_offset: 24
-    fieldset: CCMR_Output
+    fieldset: CCMR_Output_GP16
   - name: CCER
     description: capture/compare enable register
     byte_offset: 32
-    fieldset: CCER
+    fieldset: CCER_GP16
   - name: CNT
     description: counter
     byte_offset: 36
-    fieldset: CNT
+    fieldset: CNT_GP16
   - name: PSC
     description: prescaler
     byte_offset: 40
-    fieldset: PSC
+    fieldset: PSC_GP16
   - name: ARR
     description: auto-reload register (Dither mode disabled)
     byte_offset: 44
-    fieldset: ARR
+    fieldset: ARR_GP16
   - name: ARR_DITHER
     description: auto-reload register (Dither mode enabled)
     byte_offset: 44
-    fieldset: ARR_DITHER
+    fieldset: ARR_DITHER_GP16
   - name: RCR
     description: repetition counter register
     byte_offset: 48
-    fieldset: RCR
+    fieldset: RCR_GP16
   - name: CCR
     description: capture/compare register x (x=1-4) (Dither mode disabled)
     array:
       len: 4
       stride: 4
     byte_offset: 52
-    fieldset: CCR
+    fieldset: CCR_GP16
   - name: CCR_DITHER
     description: capture/compare register x (x=1-4) (Dither mode enabled)
     array:
       len: 4
       stride: 4
     byte_offset: 52
-    fieldset: CCR_DITHER
+    fieldset: CCR_DITHER_GP16
   - name: ECR
     description: encoder control register
     byte_offset: 88
-    fieldset: ECR
+    fieldset: ECR_GP16
   - name: TISEL
     description: input selection register
     byte_offset: 92
-    fieldset: TISEL
+    fieldset: TISEL_GP16
   - name: AF1
     description: alternate function register 1
     byte_offset: 96
-    fieldset: AF1
+    fieldset: AF1_GP16
   - name: AF2
     description: alternate function register 2
     byte_offset: 100
-    fieldset: AF2
+    fieldset: AF2_GP16
   - name: DCR
     description: DMA control register
     byte_offset: 988
-    fieldset: DCR
+    fieldset: DCR_GP16
   - name: DMAR
     description: DMA address for full transfer
     byte_offset: 992
-    fieldset: DMAR
-fieldset/AF1:
+    fieldset: DMAR_GP16
+fieldset/AF1_GP16:
   description: alternate function register 1
   fields:
   - name: ETRSEL
     description: etr_in source selection
     bit_offset: 14
     bit_size: 4
-fieldset/AF2:
+fieldset/AF2_GP16:
   description: alternate function register 2
   fields:
   - name: OCRSEL
     description: ocref_clr source selection
     bit_offset: 16
     bit_size: 3
-fieldset/ARR:
+fieldset/ARR_GP16:
   description: auto-reload register (Dither mode disabled)
   fields:
   - name: ARR
     description: Auto-reload value
     bit_offset: 0
     bit_size: 16
-fieldset/ARR_DITHER:
+fieldset/ARR_DITHER_GP16:
   description: auto-reload register (Dither mode enabled)
   fields:
   - name: DITHER
@@ -134,7 +134,7 @@ fieldset/ARR_DITHER:
     description: Auto-reload value
     bit_offset: 4
     bit_size: 16
-fieldset/CCER:
+fieldset/CCER_GP16:
   description: capture/compare enable register
   fields:
   - name: CCE
@@ -158,7 +158,7 @@ fieldset/CCER:
     array:
       len: 4
       stride: 4
-fieldset/CCMR_Input:
+fieldset/CCMR_Input_GP16:
   description: capture/compare mode register x (x=1-2) (input mode)
   fields:
   - name: CCS
@@ -184,7 +184,7 @@ fieldset/CCMR_Input:
       len: 2
       stride: 8
     enum: FilterValue
-fieldset/CCMR_Output:
+fieldset/CCMR_Output_GP16:
   description: capture/compare mode register x (x=1-3) (output mode)
   fields:
   - name: CCS
@@ -224,14 +224,14 @@ fieldset/CCMR_Output:
     array:
       len: 2
       stride: 8
-fieldset/CCR:
+fieldset/CCR_GP16:
   description: capture/compare register x (x=1-4,6) (Dither mode disabled)
   fields:
   - name: CCR
     description: capture/compare x (x=1-4,6) value
     bit_offset: 0
     bit_size: 16
-fieldset/CCR_DITHER:
+fieldset/CCR_DITHER_GP16:
   description: capture/compare register x (x=1-4,6) (Dither mode enabled)
   fields:
   - name: DITHER
@@ -242,7 +242,7 @@ fieldset/CCR_DITHER:
     description: capture/compare x (x=1-4,6) value
     bit_offset: 4
     bit_size: 16
-fieldset/CNT:
+fieldset/CNT_GP16:
   description: counter
   fields:
   - name: CNT
@@ -253,7 +253,7 @@ fieldset/CNT:
     description: UIF copy
     bit_offset: 31
     bit_size: 1
-fieldset/CR1:
+fieldset/CR1_GP16:
   description: control register 1
   fields:
   - name: CEN
@@ -300,7 +300,7 @@ fieldset/CR1:
     description: Dithering enable
     bit_offset: 12
     bit_size: 1
-fieldset/CR2:
+fieldset/CR2_GP16:
   description: control register 2
   fields:
   - name: CCDS
@@ -318,7 +318,7 @@ fieldset/CR2:
     bit_offset: 7
     bit_size: 1
     enum: TI1S
-fieldset/DCR:
+fieldset/DCR_GP16:
   description: DMA control register
   fields:
   - name: DBA
@@ -334,7 +334,7 @@ fieldset/DCR:
     bit_offset: 16
     bit_size: 4
     enum: DBSS
-fieldset/DIER:
+fieldset/DIER_GP16:
   description: DMA/Interrupt enable register
   fields:
   - name: UIE
@@ -387,14 +387,14 @@ fieldset/DIER:
     description: Transition error interrupt enable
     bit_offset: 23
     bit_size: 1
-fieldset/DMAR:
+fieldset/DMAR_GP16:
   description: DMA address for full transfer
   fields:
   - name: DMAB
     description: DMA register for burst accesses
     bit_offset: 0
     bit_size: 32
-fieldset/ECR:
+fieldset/ECR_GP16:
   description: encoder control register
   fields:
   - name: IE
@@ -428,7 +428,7 @@ fieldset/ECR:
     description: Pulse width prescaler
     bit_offset: 24
     bit_size: 2
-fieldset/EGR:
+fieldset/EGR_GP16:
   description: event generation register
   fields:
   - name: UG
@@ -446,21 +446,21 @@ fieldset/EGR:
     description: Trigger generation
     bit_offset: 6
     bit_size: 1
-fieldset/PSC:
+fieldset/PSC_GP16:
   description: prescaler
   fields:
   - name: PSC
     description: Prescaler value
     bit_offset: 0
     bit_size: 16
-fieldset/RCR:
+fieldset/RCR_GP16:
   description: repetition counter register
   fields:
   - name: REP
     description: Repetition counter value
     bit_offset: 0
     bit_size: 16
-fieldset/SMCR:
+fieldset/SMCR_GP16:
   description: slave mode control register
   fields:
   - name: SMS
@@ -506,7 +506,7 @@ fieldset/SMCR:
     bit_offset: 25
     bit_size: 1
     enum: SMSPS
-fieldset/SR:
+fieldset/SR_GP16:
   description: status register
   fields:
   - name: UIF
@@ -547,7 +547,7 @@ fieldset/SR:
     description: Transition error interrupt flag
     bit_offset: 23
     bit_size: 1
-fieldset/TISEL:
+fieldset/TISEL_GP16:
   description: input selection register
   fields:
   - name: TISEL
diff --git a/data/registers/timgp32_v2.yaml b/data/registers/timgp32_v2.yaml
index eff0ec6..ab32bb7 100644
--- a/data/registers/timgp32_v2.yaml
+++ b/data/registers/timgp32_v2.yaml
@@ -1,133 +1,133 @@
-block/TIM:
-  description: Advanced-timers
+block/TIM_GP32:
+  description: General purpose 32-bit timers
   items:
   - name: CR1
     description: control register 1
     byte_offset: 0
-    fieldset: CR1
+    fieldset: CR1_GP32
   - name: CR2
     description: control register 2
     byte_offset: 4
-    fieldset: CR2
+    fieldset: CR2_GP32
   - name: SMCR
     description: slave mode control register
     byte_offset: 8
-    fieldset: SMCR
+    fieldset: SMCR_GP32
   - name: DIER
     description: DMA/Interrupt enable register
     byte_offset: 12
-    fieldset: DIER
+    fieldset: DIER_GP32
   - name: SR
     description: status register
     byte_offset: 16
-    fieldset: SR
+    fieldset: SR_GP32
   - name: EGR
     description: event generation register
     byte_offset: 20
     access: Write
-    fieldset: EGR
+    fieldset: EGR_GP32
   - name: CCMR_Input
     description: capture/compare mode register 1-2 (input mode)
     array:
       len: 2
       stride: 4
     byte_offset: 24
-    fieldset: CCMR_Input
+    fieldset: CCMR_Input_GP32
   - name: CCMR_Output
     description: capture/compare mode register 1-2 (output mode)
     array:
       len: 2
       stride: 4
     byte_offset: 24
-    fieldset: CCMR_Output
+    fieldset: CCMR_Output_GP32
   - name: CCER
     description: capture/compare enable register
     byte_offset: 32
-    fieldset: CCER
+    fieldset: CCER_GP32
   - name: CNT
     description: counter (Dither mode disabled)
     byte_offset: 36
-    fieldset: CNT
+    fieldset: CNT_GP32
   - name: CNT_DITHER
     description: counter (Dither mode enbled)
     byte_offset: 36
-    fieldset: CNT_DITHER
+    fieldset: CNT_DITHER_GP32
   - name: PSC
     description: prescaler
     byte_offset: 40
-    fieldset: PSC
+    fieldset: PSC_GP32
   - name: ARR
     description: auto-reload register (Dither mode disabled)
     byte_offset: 44
-    fieldset: ARR
+    fieldset: ARR_GP32
   - name: ARR_DITHER
     description: auto-reload register (Dither mode enabled)
     byte_offset: 44
-    fieldset: ARR_DITHER
+    fieldset: ARR_DITHER_GP32
   - name: RCR
     description: repetition counter register
     byte_offset: 48
-    fieldset: RCR
+    fieldset: RCR_GP32
   - name: CCR
     description: capture/compare register x (x=1-4) (Dither mode disabled)
     array:
       len: 4
       stride: 4
     byte_offset: 52
-    fieldset: CCR
+    fieldset: CCR_GP32
   - name: CCR_DITHER
     description: capture/compare register x (x=1-4) (Dither mode enabled)
     array:
       len: 4
       stride: 4
     byte_offset: 52
-    fieldset: CCR_DITHER
+    fieldset: CCR_DITHER_GP32
   - name: ECR
     description: encoder control register
     byte_offset: 88
-    fieldset: ECR
+    fieldset: ECR_GP32
   - name: TISEL
     description: input selection register
     byte_offset: 92
-    fieldset: TISEL
+    fieldset: TISEL_GP32
   - name: AF1
     description: alternate function register 1
     byte_offset: 96
-    fieldset: AF1
+    fieldset: AF1_GP32
   - name: AF2
     description: alternate function register 2
     byte_offset: 100
-    fieldset: AF2
+    fieldset: AF2_GP32
   - name: DCR
     description: DMA control register
     byte_offset: 988
-    fieldset: DCR
+    fieldset: DCR_GP32
   - name: DMAR
     description: DMA address for full transfer
     byte_offset: 992
-    fieldset: DMAR
-fieldset/AF1:
+    fieldset: DMAR_GP32
+fieldset/AF1_GP32:
   description: alternate function register 1
   fields:
   - name: ETRSEL
     description: etr_in source selection
     bit_offset: 14
     bit_size: 4
-fieldset/AF2:
+fieldset/AF2_GP32:
   description: alternate function register 2
   fields:
   - name: OCRSEL
     description: ocref_clr source selection
     bit_offset: 16
     bit_size: 3
-fieldset/ARR:
+fieldset/ARR_GP32:
   description: auto-reload register (Dither mode disabled)
   fields:
   - name: ARR
     description: Auto-reload value
     bit_offset: 0
     bit_size: 32
-fieldset/ARR_DITHER:
+fieldset/ARR_DITHER_GP32:
   description: auto-reload register (Dither mode enabled)
   fields:
   - name: DITHER
@@ -138,7 +138,7 @@ fieldset/ARR_DITHER:
     description: Auto-reload value
     bit_offset: 4
     bit_size: 28
-fieldset/CCER:
+fieldset/CCER_GP32:
   description: capture/compare enable register
   fields:
   - name: CCE
@@ -162,7 +162,7 @@ fieldset/CCER:
     array:
       len: 4
       stride: 4
-fieldset/CCMR_Input:
+fieldset/CCMR_Input_GP32:
   description: capture/compare mode register x (x=1-2) (input mode)
   fields:
   - name: CCS
@@ -188,7 +188,7 @@ fieldset/CCMR_Input:
       len: 2
       stride: 8
     enum: FilterValue
-fieldset/CCMR_Output:
+fieldset/CCMR_Output_GP32:
   description: capture/compare mode register x (x=1-3) (output mode)
   fields:
   - name: CCS
@@ -228,14 +228,14 @@ fieldset/CCMR_Output:
     array:
       len: 2
       stride: 8
-fieldset/CCR:
+fieldset/CCR_GP32:
   description: capture/compare register x (x=1-4,6) (Dither mode disabled)
   fields:
   - name: CCR
     description: capture/compare x (x=1-4,6) value
     bit_offset: 0
     bit_size: 32
-fieldset/CCR_DITHER:
+fieldset/CCR_DITHER_GP32:
   description: capture/compare register x (x=1-4,6) (Dither mode enabled)
   fields:
   - name: DITHER
@@ -246,14 +246,14 @@ fieldset/CCR_DITHER:
     description: capture/compare x (x=1-4,6) value
     bit_offset: 4
     bit_size: 28
-fieldset/CNT:
+fieldset/CNT_GP32:
   description: counter (Dither mode disabled)
   fields:
   - name: CNT
     description: counter value
     bit_offset: 0
     bit_size: 32
-fieldset/CNT_DITHER:
+fieldset/CNT_DITHER_GP32:
   description: counter (Dither mode enabled)
   fields:
   - name: CNT
@@ -264,7 +264,7 @@ fieldset/CNT_DITHER:
     description: UIF copy
     bit_offset: 31
     bit_size: 1
-fieldset/CR1:
+fieldset/CR1_GP32:
   description: control register 1
   fields:
   - name: CEN
@@ -311,7 +311,7 @@ fieldset/CR1:
     description: Dithering enable
     bit_offset: 12
     bit_size: 1
-fieldset/CR2:
+fieldset/CR2_GP32:
   description: control register 2
   fields:
   - name: CCDS
@@ -329,7 +329,7 @@ fieldset/CR2:
     bit_offset: 7
     bit_size: 1
     enum: TI1S
-fieldset/DCR:
+fieldset/DCR_GP32:
   description: DMA control register
   fields:
   - name: DBA
@@ -345,7 +345,7 @@ fieldset/DCR:
     bit_offset: 16
     bit_size: 4
     enum: DBSS
-fieldset/DIER:
+fieldset/DIER_GP32:
   description: DMA/Interrupt enable register
   fields:
   - name: UIE
@@ -398,14 +398,14 @@ fieldset/DIER:
     description: Transition error interrupt enable
     bit_offset: 23
     bit_size: 1
-fieldset/DMAR:
+fieldset/DMAR_GP32:
   description: DMA address for full transfer
   fields:
   - name: DMAB
     description: DMA register for burst accesses
     bit_offset: 0
     bit_size: 32
-fieldset/ECR:
+fieldset/ECR_GP32:
   description: encoder control register
   fields:
   - name: IE
@@ -439,7 +439,7 @@ fieldset/ECR:
     description: Pulse width prescaler
     bit_offset: 24
     bit_size: 2
-fieldset/EGR:
+fieldset/EGR_GP32:
   description: event generation register
   fields:
   - name: UG
@@ -457,21 +457,21 @@ fieldset/EGR:
     description: Trigger generation
     bit_offset: 6
     bit_size: 1
-fieldset/PSC:
+fieldset/PSC_GP32:
   description: prescaler
   fields:
   - name: PSC
     description: Prescaler value
     bit_offset: 0
     bit_size: 16
-fieldset/RCR:
+fieldset/RCR_GP32:
   description: repetition counter register
   fields:
   - name: REP
     description: Repetition counter value
     bit_offset: 0
     bit_size: 16
-fieldset/SMCR:
+fieldset/SMCR_GP32:
   description: slave mode control register
   fields:
   - name: SMS
@@ -517,7 +517,7 @@ fieldset/SMCR:
     bit_offset: 25
     bit_size: 1
     enum: SMSPS
-fieldset/SR:
+fieldset/SR_GP32:
   description: status register
   fields:
   - name: UIF
@@ -558,7 +558,7 @@ fieldset/SR:
     description: Transition error interrupt flag
     bit_offset: 23
     bit_size: 1
-fieldset/TISEL:
+fieldset/TISEL_GP32:
   description: input selection register
   fields:
   - name: TISEL