guangzong/stm32-data
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

chiptool fmt.

Browse Source
This commit is contained in:
Dario Nieuwenhuis 2024-02-15 23:25:16 +01:00
parent 3a9e43b7e9
commit c8698f3cd8
2 changed files with 46 additions and 46 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
data/registers/timer_v2.yaml
View File

@ -2336,7 +2336,7 @@ enum/OCM:
description: Inversely to PwmMode1 description: Inversely to PwmMode1
value: 7 value: 7
- name: Retrigerrable_OPM_Mode_1 - name: Retrigerrable_OPM_Mode_1
description: | description: |-
In up-counting mode, the channel is active until a trigger In up-counting mode, the channel is active until a trigger
event is detected (on tim_trgi signal). Then, a comparison is performed as in PWM event is detected (on tim_trgi signal). Then, a comparison is performed as in PWM
mode 1 and the channels becomes active again at the next update. In down-counting mode 1 and the channels becomes active again at the next update. In down-counting
@ -2345,7 +2345,7 @@ enum/OCM:
inactive again at the next update. inactive again at the next update.
value: 8 value: 8
- name: Retrigerrable_OPM_Mode_2 - name: Retrigerrable_OPM_Mode_2
description: | description: |-
In up-counting mode, the channel is inactive until a In up-counting mode, the channel is inactive until a
trigger event is detected (on tim_trgi signal). Then, a comparison is performed as in trigger event is detected (on tim_trgi signal). Then, a comparison is performed as in
PWM mode 2 and the channels becomes inactive again at the next update. In down- PWM mode 2 and the channels becomes inactive again at the next update. In down-
@ -2360,23 +2360,23 @@ enum/OCM:
description: _reserved2 description: _reserved2
value: 11 value: 11
- name: Combined_PWM_Mode_1 - name: Combined_PWM_Mode_1
description: | description: |-
tim_oc1ref has the same behavior as in PWM mode 1. tim_oc1ref has the same behavior as in PWM mode 1.
tim_oc1refc is the logical OR between tim_oc1ref and tim_oc2ref. tim_oc1refc is the logical OR between tim_oc1ref and tim_oc2ref.
value: 12 value: 12
- name: Combined_PWM_Mode_2 - name: Combined_PWM_Mode_2
description: | description: |-
tim_oc1ref has the same behavior as in PWM mode 2. tim_oc1ref has the same behavior as in PWM mode 2.
tim_oc1refc is the logical AND between tim_oc1ref and tim_oc2ref. tim_oc1refc is the logical AND between tim_oc1ref and tim_oc2ref.
value: 13 value: 13
- name: Asymmetric_PWM_Mode_1 - name: Asymmetric_PWM_Mode_1
description: | description: |-
tim_oc1ref has the same behavior as in PWM mode 1. tim_oc1ref has the same behavior as in PWM mode 1.
tim_oc1refc outputs tim_oc1ref when the counter is counting up, tim_oc2ref when it is tim_oc1refc outputs tim_oc1ref when the counter is counting up, tim_oc2ref when it is
counting down. counting down.
value: 14 value: 14
- name: Asymmetric_PWM_Mode_2 - name: Asymmetric_PWM_Mode_2
description: | description: |-
tim_oc1ref has the same behavior as in PWM mode 2. tim_oc1ref has the same behavior as in PWM mode 2.
tim_oc1refc outputs tim_oc1ref when the counter is counting up, tim_oc2ref when it is tim_oc1refc outputs tim_oc1ref when the counter is counting up, tim_oc2ref when it is
counting down. counting down.