extract lptim_v2a from l5
This commit is contained in:
eZio Pan
parent
029320446b
commit
c25b401647
280
data/registers/lptim_v2a.yaml
Normal file
280
data/registers/lptim_v2a.yaml
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block/LPTIM1:
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description: Low power timer.
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items:
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- name: ISR
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description: Interrupt and Status Register.
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byte_offset: 0
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access: Read
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fieldset: ISR
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- name: ICR
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description: Interrupt Clear Register.
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byte_offset: 4
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access: Write
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fieldset: ICR
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- name: IER
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description: Interrupt Enable Register.
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byte_offset: 8
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fieldset: IER
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- name: CFGR
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description: Configuration Register.
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byte_offset: 12
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fieldset: CFGR
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- name: CR
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description: Control Register.
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byte_offset: 16
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fieldset: CR
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- name: CMP
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description: Compare Register.
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byte_offset: 20
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fieldset: CMP
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- name: ARR
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description: Autoreload Register.
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byte_offset: 24
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fieldset: ARR
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- name: CNT
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description: Counter Register.
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byte_offset: 28
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access: Read
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fieldset: CNT
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- name: OR
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description: LPTIM option register.
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byte_offset: 32
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fieldset: OR
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- name: RCR
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description: LPTIM repetition register.
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byte_offset: 40
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fieldset: RCR
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fieldset/ARR:
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description: Autoreload Register.
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fields:
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- name: ARR
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description: Auto reload value.
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bit_offset: 0
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bit_size: 16
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fieldset/CFGR:
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description: Configuration Register.
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fields:
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- name: CKSEL
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description: Clock selector.
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bit_offset: 0
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bit_size: 1
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- name: CKPOL
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description: Clock Polarity.
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bit_offset: 1
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bit_size: 2
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- name: CKFLT
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description: Configurable digital filter for external clock.
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bit_offset: 3
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bit_size: 2
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- name: TRGFLT
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description: Configurable digital filter for trigger.
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bit_offset: 6
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bit_size: 2
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- name: PRESC
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description: Clock prescaler.
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bit_offset: 9
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bit_size: 3
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- name: TRIGSEL
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description: Trigger selector.
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bit_offset: 13
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bit_size: 3
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- name: TRIGEN
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description: Trigger enable and polarity.
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bit_offset: 17
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bit_size: 2
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- name: TIMOUT
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description: Timeout enable.
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bit_offset: 19
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bit_size: 1
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- name: WAVE
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description: Waveform shape.
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bit_offset: 20
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bit_size: 1
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- name: WAVPOL
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description: Waveform shape polarity.
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bit_offset: 21
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bit_size: 1
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- name: PRELOAD
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description: Registers update mode.
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bit_offset: 22
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bit_size: 1
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- name: COUNTMODE
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description: counter mode enabled.
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bit_offset: 23
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bit_size: 1
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- name: ENC
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description: Encoder mode enable.
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bit_offset: 24
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bit_size: 1
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fieldset/CMP:
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description: Compare Register.
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fields:
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- name: CMP
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description: Compare value.
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bit_offset: 0
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bit_size: 16
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fieldset/CNT:
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description: Counter Register.
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fields:
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- name: CNT
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description: Counter value.
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bit_offset: 0
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bit_size: 16
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fieldset/CR:
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description: Control Register.
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fields:
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- name: ENABLE
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description: LPTIM Enable.
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bit_offset: 0
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bit_size: 1
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- name: SNGSTRT
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description: LPTIM start in single mode.
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bit_offset: 1
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bit_size: 1
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- name: CNTSTRT
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description: Timer start in continuous mode.
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bit_offset: 2
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bit_size: 1
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- name: RSTARE
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description: Reset after read enable.
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bit_offset: 3
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bit_size: 1
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- name: COUNTRST
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description: Counter reset.
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bit_offset: 4
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bit_size: 1
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fieldset/ICR:
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description: Interrupt Clear Register.
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fields:
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- name: CMPMCF
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description: compare match Clear Flag.
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bit_offset: 0
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bit_size: 1
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- name: ARRMCF
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description: Autoreload match Clear Flag.
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bit_offset: 1
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bit_size: 1
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- name: EXTTRIGCF
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description: External trigger valid edge Clear Flag.
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bit_offset: 2
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bit_size: 1
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- name: CMPOKCF
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description: Compare register update OK Clear Flag.
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bit_offset: 3
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bit_size: 1
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- name: ARROKCF
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description: Autoreload register update OK Clear Flag.
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bit_offset: 4
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bit_size: 1
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- name: UPCF
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description: Direction change to UP Clear Flag.
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bit_offset: 5
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bit_size: 1
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- name: DOWNCF
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description: Direction change to down Clear Flag.
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bit_offset: 6
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bit_size: 1
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- name: UECF
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description: Update event clear flag.
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bit_offset: 7
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bit_size: 1
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- name: REPOKCF
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description: Repetition register update OK clear flag.
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bit_offset: 8
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bit_size: 1
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fieldset/IER:
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description: Interrupt Enable Register.
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fields:
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- name: CMPMIE
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description: Compare match Interrupt Enable.
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bit_offset: 0
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bit_size: 1
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- name: ARRMIE
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description: Autoreload match Interrupt Enable.
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bit_offset: 1
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bit_size: 1
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- name: EXTTRIGIE
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description: External trigger valid edge Interrupt Enable.
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bit_offset: 2
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bit_size: 1
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- name: CMPOKIE
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description: Compare register update OK Interrupt Enable.
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bit_offset: 3
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bit_size: 1
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- name: ARROKIE
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description: Autoreload register update OK Interrupt Enable.
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bit_offset: 4
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bit_size: 1
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- name: UPIE
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description: Direction change to UP Interrupt Enable.
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bit_offset: 5
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bit_size: 1
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- name: DOWNIE
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description: Direction change to down Interrupt Enable.
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bit_offset: 6
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bit_size: 1
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- name: UEIE
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description: Update event interrupt enable.
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bit_offset: 7
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bit_size: 1
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- name: REPOKIE
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description: REPOKIE.
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bit_offset: 8
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bit_size: 1
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fieldset/ISR:
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description: Interrupt and Status Register.
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fields:
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- name: CMPM
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description: Compare match.
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bit_offset: 0
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bit_size: 1
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- name: ARRM
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description: Autoreload match.
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bit_offset: 1
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bit_size: 1
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- name: EXTTRIG
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description: External trigger edge event.
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bit_offset: 2
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bit_size: 1
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- name: CMPOK
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description: Compare register update OK.
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bit_offset: 3
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bit_size: 1
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- name: ARROK
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description: Autoreload register update OK.
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bit_offset: 4
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bit_size: 1
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- name: UP
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description: Counter direction change down to up.
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bit_offset: 5
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bit_size: 1
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- name: DOWN
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description: Counter direction change up to down.
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bit_offset: 6
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bit_size: 1
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- name: UE
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description: LPTIM update event occurred.
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bit_offset: 7
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bit_size: 1
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- name: REPOK
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description: Repetition register update Ok.
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bit_offset: 8
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bit_size: 1
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fieldset/OR:
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description: LPTIM option register.
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fields:
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- name: OR_0
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description: Option register bit 0.
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bit_offset: 0
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bit_size: 1
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- name: OR_1
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description: Option register bit 1.
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bit_offset: 1
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bit_size: 1
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fieldset/RCR:
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description: LPTIM repetition register.
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fields:
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- name: REP
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description: Repetition register value.
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bit_offset: 0
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bit_size: 8
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