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Run through transform again

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This commit is contained in:
Ulf Lilleengen 2021-06-07 12:22:09 +02:00
parent 1d0b8db2ee
commit c1aae8d3d8
3 changed files with 29 additions and 25 deletions
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24
data/registers/rcc_f4.yaml
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@ -2264,26 +2264,25 @@ fieldset/CFGR:
description: AHB prescaler description: AHB prescaler
enum: HPRE enum: HPRE
name: HPRE name: HPRE
- array: - bit_offset: 10
len: 2
stride: 3
bit_offset: 10
bit_size: 3 bit_size: 3
description: APB Low speed prescaler (APB1) description: APB Low speed prescaler (APB1)
enum: PPRE enum: PPRE
name: PPRE name: PPRE1
- bit_offset: 13
bit_size: 3
description: APB high-speed prescaler (APB2)
enum: PPRE
name: PPRE2
- bit_offset: 16 - bit_offset: 16
bit_size: 5 bit_size: 5
description: HSE division factor for RTC clock description: HSE division factor for RTC clock
name: RTCPRE name: RTCPRE
- array: - bit_offset: 21
len: 2
stride: 9
bit_offset: 21
bit_size: 2 bit_size: 2
description: Microcontroller clock output 1 description: Microcontroller clock output 1
enum: MCO1 enum: MCO1
name: MCO name: MCO1
- bit_offset: 23 - bit_offset: 23
bit_size: 1 bit_size: 1
description: I2S clock selection description: I2S clock selection
@ -2299,6 +2298,11 @@ fieldset/CFGR:
description: MCO2 prescaler description: MCO2 prescaler
enum: MCOPRE enum: MCOPRE
name: MCO2PRE name: MCO2PRE
- bit_offset: 30
bit_size: 2
description: Microcontroller clock output 2
enum: MCO2
name: MCO2
- bit_offset: 8 - bit_offset: 8
bit_size: 1 bit_size: 1
description: MCO output enable description: MCO output enable

12
data/registers/rcc_l0.yaml
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@ -1103,14 +1103,16 @@ fieldset/CFGR:
description: AHB prescaler description: AHB prescaler
enum: HPRE enum: HPRE
name: HPRE name: HPRE
- array: - bit_offset: 8
len: 2
stride: 3
bit_offset: 8
bit_size: 3 bit_size: 3
description: APB low-speed prescaler (APB1) description: APB low-speed prescaler (APB1)
enum: PPRE enum: PPRE
name: PPRE name: PPRE1
- bit_offset: 11
bit_size: 3
description: APB high-speed prescaler (APB2)
enum: PPRE
name: PPRE2
- bit_offset: 15 - bit_offset: 15
bit_size: 1 bit_size: 1
description: Wake-up from stop clock selection description: Wake-up from stop clock selection

18
data/registers/rcc_l4.yaml
View File

@ -561,13 +561,10 @@ fieldset/AHB3SMENR:
bit_size: 1 bit_size: 1
description: Flexible memory controller clocks enable during Sleep and Stop modes description: Flexible memory controller clocks enable during Sleep and Stop modes
name: FMCSMEN name: FMCSMEN
- array: - bit_offset: 9
len: 1
stride: 0
bit_offset: 9
bit_size: 1 bit_size: 1
description: OctoSPI2 memory interface clocks enable during Sleep and Stop modes description: OctoSPI2 memory interface clocks enable during Sleep and Stop modes
name: OCTOSPI name: OCTOSPI2
- bit_offset: 8 - bit_offset: 8
bit_size: 1 bit_size: 1
description: QSPISMEN description: QSPISMEN
@ -1343,13 +1340,14 @@ fieldset/CFGR:
bit_size: 4 bit_size: 4
description: AHB prescaler description: AHB prescaler
name: HPRE name: HPRE
- array: - bit_offset: 8
len: 2
stride: 3
bit_offset: 8
bit_size: 3 bit_size: 3
description: PB low-speed prescaler (APB1) description: PB low-speed prescaler (APB1)
name: PPRE name: PPRE1
- bit_offset: 11
bit_size: 3
description: APB high-speed prescaler (APB2)
name: PPRE2
- bit_offset: 15 - bit_offset: 15
bit_size: 1 bit_size: 1
description: Wakeup from Stop and CSS backup clock selection description: Wakeup from Stop and CSS backup clock selection