diff --git a/data/registers/rcc_f4.yaml b/data/registers/rcc_f4.yaml
index f10a001..a919c9c 100644
--- a/data/registers/rcc_f4.yaml
+++ b/data/registers/rcc_f4.yaml
@@ -2264,26 +2264,25 @@ fieldset/CFGR:
     description: AHB prescaler
     enum: HPRE
     name: HPRE
-  - array:
-      len: 2
-      stride: 3
-    bit_offset: 10
+  - bit_offset: 10
     bit_size: 3
     description: APB Low speed prescaler (APB1)
     enum: PPRE
-    name: PPRE
+    name: PPRE1
+  - bit_offset: 13
+    bit_size: 3
+    description: APB high-speed prescaler (APB2)
+    enum: PPRE
+    name: PPRE2
   - bit_offset: 16
     bit_size: 5
     description: HSE division factor for RTC clock
     name: RTCPRE
-  - array:
-      len: 2
-      stride: 9
-    bit_offset: 21
+  - bit_offset: 21
     bit_size: 2
     description: Microcontroller clock output 1
     enum: MCO1
-    name: MCO
+    name: MCO1
   - bit_offset: 23
     bit_size: 1
     description: I2S clock selection
@@ -2299,6 +2298,11 @@ fieldset/CFGR:
     description: MCO2 prescaler
     enum: MCOPRE
     name: MCO2PRE
+  - bit_offset: 30
+    bit_size: 2
+    description: Microcontroller clock output 2
+    enum: MCO2
+    name: MCO2
   - bit_offset: 8
     bit_size: 1
     description: MCO output enable
diff --git a/data/registers/rcc_l0.yaml b/data/registers/rcc_l0.yaml
index c652c82..eb962d2 100644
--- a/data/registers/rcc_l0.yaml
+++ b/data/registers/rcc_l0.yaml
@@ -1103,14 +1103,16 @@ fieldset/CFGR:
     description: AHB prescaler
     enum: HPRE
     name: HPRE
-  - array:
-      len: 2
-      stride: 3
-    bit_offset: 8
+  - bit_offset: 8
     bit_size: 3
     description: APB low-speed prescaler (APB1)
     enum: PPRE
-    name: PPRE
+    name: PPRE1
+  - bit_offset: 11
+    bit_size: 3
+    description: APB high-speed prescaler (APB2)
+    enum: PPRE
+    name: PPRE2
   - bit_offset: 15
     bit_size: 1
     description: Wake-up from stop clock selection
diff --git a/data/registers/rcc_l4.yaml b/data/registers/rcc_l4.yaml
index 0e4480e..7ffe705 100644
--- a/data/registers/rcc_l4.yaml
+++ b/data/registers/rcc_l4.yaml
@@ -561,13 +561,10 @@ fieldset/AHB3SMENR:
     bit_size: 1
     description: Flexible memory controller clocks enable during Sleep and Stop modes
     name: FMCSMEN
-  - array:
-      len: 1
-      stride: 0
-    bit_offset: 9
+  - bit_offset: 9
     bit_size: 1
     description: OctoSPI2 memory interface clocks enable during Sleep and Stop modes
-    name: OCTOSPI
+    name: OCTOSPI2
   - bit_offset: 8
     bit_size: 1
     description: QSPISMEN
@@ -1343,13 +1340,14 @@ fieldset/CFGR:
     bit_size: 4
     description: AHB prescaler
     name: HPRE
-  - array:
-      len: 2
-      stride: 3
-    bit_offset: 8
+  - bit_offset: 8
     bit_size: 3
     description: PB low-speed prescaler (APB1)
-    name: PPRE
+    name: PPRE1
+  - bit_offset: 11
+    bit_size: 3
+    description: APB high-speed prescaler (APB2)
+    name: PPRE2
   - bit_offset: 15
     bit_size: 1
     description: Wakeup from Stop and CSS backup clock selection